REVISIONS
LTR DESCRIPTION DATE (YR-MO-DA) APPROVED
A
Add device type 02. Add vendor CAGE 27014 and 75569. Add logic diagram.
Technical and editorial changes throughout.
91-04-11 M. A. Frye
B
Changes in accordance with notice of revision 5962-R190-92. - jak 92-06-19 Tim H. Noh
C
Redraw the switching waveforms in figure 4, switching waveforms and test
circuit. Update the boilerplate to current requirements as specified in
MIL-PRF-38535. Editorial changes throughout. – jak
06-07-11 Thomas M. Hess
D
Add footnote 4/ to ICC test in table I. – jak 10-01-06 Thomas M. Hess
REV
SHEET
REV
SHEET
REV STATUS REV D D D D D D D D D D D D
OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12
PMIC N/A PREPARED BY
Marcia B. Kelleher
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 4321 8-3990
http://www.dscc.dla.mil
STANDARD
MICROCIRCUIT
DRAWING
CHECKED BY
Monica L. Poelking
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
APPROVED BY
Michael A. Frye
MICROCIRCUIT, DIGITAL, FAST CMOS,
OCTAL TRANSPARENT LATCH WITH THREE-
STATE OUTPUTS, TTL COMPATIBLE,
MONOLITHIC SILICON
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
DRAWING APPROVAL DATE
88-09-08
AMSC N/A
REVISION LEVEL
D
SIZE
A
CAGE CODE
67268
5962-88639
SHEET
1 OF
12
DSCC FORM 2233
APR 97 5962-E073-10
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-88639
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
D
SHEET 2
DSCC FORM 2234
APR 97
1. SCOPE
1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in
accordance with MIL-PRF-38535, appendix A.
1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example:
5962-88639 01 R A
Drawing numbe
r
Device type
(
see 1.2.1
)
Case outline
(
see 1.2.2
)
Lead finish
(
see 1.2.3
)
1.2.1 Device type(s). The device type(s) identify the circuit function as follows:
Device type Generic number Circuit function
01 54FCT573 Octal transparent latch with three-state outputs,
TTL compatible
02 54FCT573A Octal transparent latch with three-state outputs,
TTL compatible
1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter Descriptive designator Terminals Package style
R GDIP1-T20 or CDIP2-T20 20 Dual-in-line
S GDFP2-F20 or CDFP3-F20 20 Flat pack
2 CQCC1-N20 20 Square leadless chip carrier
1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A.
1.3 Absolute maximum ratings. 1/
Supply voltage range (VCC) ........................................................................... -0.5 V dc to +7.0 V dc
DC input voltage range (VIN) 2/ .................................................................... -0.5 V dc to VCC + 0.5 V dc
DC output voltage range (VOUT) 2/ ............................................................... -0.5 V dc to VCC + 0.5 V dc
DC input diode current (IIK) ........................................................................... -20 mA
DC output diode current (IOK) ........................................................................ -50 mA
DC output current (IOUT) ................................................................................ 100 mA
Maximum power dissipation (PD) 3/ ............................................................. 500 mW
Thermal resistance, junction-to-case (JC) .................................................... See MIL-STD-1835
Storage temperature range (TSTG) ................................................................ -65C to +150C
Junction temperature (TJ) ............................................................................. +175C
Lead temperature (soldering, 10 seconds) ................................................... +300C
1.4 Recommended operating conditions.
Supply voltage range (VCC) ........................................................................... +4.5 V dc to +5.5 V dc
Maximum low level input voltage (VIL)........................................................... 0.8 V dc
Minimum high level input voltage (VIH) .......................................................... 2.0 V dc
Case operating temperature range (TC) ........................................................ -55C to +125C
Minimum setup time, high or low (Dn to LE) (ts) ............................................ 2.0 ns
Minimum hold time, high or low (Dn to LE) (th).............................................. 1.5 ns
Minimum LE pulse width, high or low (tw) ...................................................... 6.0 ns
1/ Unless other wise specified, all voltages are referenced to ground.
2/ For VCC > 6.5 V dc, the upper bound is limited to VCC.
3/ Must withstand the added PD due to short circuit test, e.g., IOS.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-88639
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
D
SHEET 3
DSCC FORM 2234
APR 97
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the
solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 - Test Method Standard Microcircuits.
MIL-STD-1835 - Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 - List of Standard Microcircuit Drawings.
MIL-HDBK-780 - Standard Microcircuit Drawings.
(Copies of these documents are available online at https://assist.daps.dla.mil/quicksearch/ or from the Standardization
Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for
non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified
Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional
certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program
plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality
Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or
function of the device. These modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in
accordance with MIL-PRF-38535 is required to identify when the QML flow option is used.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535, appendix A and herein.
3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Truth table. The truth table shall be as specified on figure 2.
3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3.
3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4.
3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are
as specified in table I and shall apply over the full case operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are described in table I.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-88639
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
D
SHEET 4
DSCC FORM 2234
APR 97
3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN
listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD
PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device.
3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance
to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a "Q" or "QML" certification mark in
accordance with MIL-PRF-38535 to identify when the QML flow option is used.
3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an
approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to
listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements of
MIL-PRF-38535, appendix A and the requirements herein.
3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided
with each lot of microcircuits delivered to this drawing.
3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing.
3.9 Verification and review. DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's
facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the
reviewer.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-88639
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
D
SHEET 5
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics.
Test
Symbol
Conditions
-55C TC +125C
VCC = 5.0 V dc ±10%
unless otherwise specified
Device
type
VCC
Group A
subgroups
Limits
Unit
Min Max
High level output voltage VOH V
IL = 0.8 V
VIH = 2.0 V
IOH = -300 A
All 4.5 V 1, 2, 3 4.3 V
VIL = 0.8 V
VIH = 2.0 V
IOH = -12 mA
All 4.5 V 2.4
Low level output voltage VOL V
IL = 0.8 V
VIH = 2.0 V
IOL = 300 A
All 4.5 V 1, 2, 3 0.2 V
VIL = 0.8 V
VIH = 2.0 V
IOL = 32 mA
All 4.5 V 0.5
Input clamp voltage VIK I
IN = -18 mA All 4.5 V 1 -1.2 V
High level input current IIH V
IN = 5.5 V All 5.5 V 1, 2, 3 5.0 A
Low level input current IIL V
IN = GND All 5.5 V 1, 2, 3 -5.0 A
Short circuit output current IOS 1/ All 5.5 V 1, 2, 3 -60 mA
Quiescent power supply
current (CMOS inputs)
ICCQ V
IN ≤ 0.2 V or VIN ≥ 5.3 V
fi = 0 MHz
All 5.5 V 1, 2, 3 1.5 mA
Quiescent power supply
current (TTL inputs)
ICC
2/
VIN = 3.4 V
All 5.5 V 1, 2, 3 2.0 mA
Dynamic power supply
current
ICCD
3/ 4/ OE = GND, LE = VCC
VIN ≤ 0.2 V or VIN ≥ 5.3 V
Outputs open
One bit toggling
50% duty cycle
All 5.5 V 3/ 0.4
mA/
MHz
Total power supply
current
ICC
4/ 5/ OE = GND, LE = VCC
VIN ≤ 0.2 V or VIN ≥ 5.3 V
Outputs open
One bit toggling
50% duty cycle
fCP= 10 MHz
All 5.5 V 1, 2, 3 5.5 mA
OE = GND, LE = VCC
VIN = 3.4 V or VIN = GND
Outputs open
Eight bits toggling
fCP= 2.5 MHz
50% duty cycle
All 5.5 V 1, 2, 3 6.0 mA
Input capacitance CIN See 4.3.1c All 4 10 pF
Output capacitance COUT See 4.3.1c All 4 12 pF
Functional tests See 4.3.1d All 7, 8
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-88639
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
D
SHEET 6
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics – Continued.
Test
Symbol
Conditions
-55C TC +125C
VCC = 5.0 V dc ±10%
unless otherwise specified
Device
type
VCC
Group A
subgroups
Limits
Unit
Min Max
Propagation delay time,
Dn to On
tPLH1,
tPHL1
6/
CL = 50 pF
RL = 500Ω
See figure 4
01 4.5 V 9, 10, 11 1.0 8.5 ns
02 1.0 5.6
Propagation delay time,
LE to On
tPLH2,
tPHL2
6/
01 4.5 V 9, 10, 11 1.0 15.0 ns
02 1.0 9.8
Propagation delay time,
output enable, OE to On
tPZH,
tPZL
6/
01 4.5 V 9, 10, 11 1.0 13.5 ns
02 1.0 7.5
Propagation delay time,
output disable, OE to On
tPLZ,
tPHZ
6/
01 4.5 V 9, 10, 11 1.0 10.0 ns
02 1.0 6.5
1/ Not more than one output should be shorted at one time and the duration of the short circuit condition should not exceed 1
second.
2/ In accordance with TTL driven input (VIN = 3.4 V); all other inputs at VCC or GND.
3/ This parameter is not directly testable but is derived for use in total power supply calculations.
4/ For ICC tests, in an ATE environment, the effect of parasitic output capacitive loading from the test environment must be taken
into account,as its effect is not intended to be included in the test results. The impact must be characterized and
appropriate offset factors must be applied to the test result."
5/ ICC = ICCQ + (ICC x DH x NT) + (ICCD x fI x NI), where:
D
H = Duty cycle for TTL inputs at DH.
N
T = Number of TTL inputs high.
f
I = Input frequency in MHz.
N
I = Number of inputs at fI.
6/ Minimum limits shall be guaranteed, if not tested, to the limits specified in table I.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-88639
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
D
SHEET 7
DSCC FORM 2234
APR 97
Device types 01 and 02
Case outlines R, S, and 2
Terminal
number
Terminal symbol
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
OE
D0
D1
D2
D3
D4
D5
D6
D7
GND
LE
O7
O6
O5
O4
O3
O2
O1
O0
VCC
FIGURE 1. Terminal connections.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-88639
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
D
SHEET 8
DSCC FORM 2234
APR 97
Inputs Outputs
Dn LE OE On
H H L H
L H L L
X X H Z
L = Low voltage level
H = High voltage level
X = Irrelevant
Z = High impedance
FIGURE 2. Truth table.
FIGURE 3. Logic diagram.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-88639
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
D
SHEET 9
DSCC FORM 2234
APR 97
FIGURE 4. Switching waveforms and test circuit.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-88639
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
D
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DSCC FORM 2234
APR 97
NOTES:
1. When measuring tPLH, tPHL, tPZH, and tPHZ: S1 = Open.
When measuring tPLZ and tPZL: S1 = 7V.
2. RL = 500Ω or equivalent.
3. RT = 50Ω or equivalent, terminal resistance which should be equal to ZOUT of the pulse generator.
4. CL = 50 pF or equivalent (includes test jig and probe capacitance).
5. Pulse generator for all pulses: tr ≤ 2.5 ns; tf ≤ 2.5 ns.
FIGURE 4. Switching waveforms and test circuit – Continued.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-88639
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
D
SHEET 11
DSCC FORM 2234
APR 97
4. VERIFICATION
4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535,
appendix A.
4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices
prior to quality conformance inspection. The following additional criteria shall apply:
a. Burn-in test, method 1015 of MIL-STD-883.
(1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify
the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method
1015 of MIL-STD-883.
(2) TA = +125C, minimum.
b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter
tests prior to burn-in are optional at the discretion of the manufacturer.
TABLE II. Electrical test requirements.
MIL-STD-883 test requirements Subgroups
(in accordance with
MIL-STD-883, method 5005, table I)
Interim electrical parameters
(method 5004)
- - -
Final electrical test parameters
(method 5004)
1*, 2, 3, 7, 8, 9, 10, 11
Group A test requirements
(method 5005)
1, 2, 3, 4, 7, 8, 9, 10, 11
Groups C and D end-point
electrical parameters
(method 5005)
1, 2, 3
* PDA applies to subgroup 1.
4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of
MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply.
4.3.1 Group A inspection.
a. Tests shall be as specified in table II herein.
b. Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted.
c. Subgroup 4 (CIN and COUT measurements) shall be measured only for the initial test and after process or design
changes which may affect input capacitance. Capacitance shall be measured between the designated terminal and
GND at a frequency of 1 MHz. Test all applicable pins on 5 devices with zero failures.
d. Subgroup 7 and 8 tests shall include verification of the truth table as specified on figure 2.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-88639
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
D
SHEET 12
DSCC FORM 2234
APR 97
4.3.2 Groups C and D inspections.
a. End-point electrical parameters shall be as specified in table II herein.
b. Steady-state life test conditions, method 1005 of MIL-STD-883.
(1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision
level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1005 of MIL-STD-883.
(2) TA = +125C, minimum.
(3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535, appendix A.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor-
prepared specification or drawing.
6.3 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.
6.4 Record of users. Military and industrial users should inform Defense Supply Center Columbus (DSCC) when a system
application requires configuration control and the applicable SMD. DSCC will maintain a record of users and this list will be
used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronics devices (FSC
5962) should contact DSCC-VA, telephone (614) 692-0544.
6.5 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43218-3990, or telephone
(614) 692-0547.
6.6 Approved sources of supply. Approved sources of supply are listed in MIL-HDBK-103. The vendors listed in
MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and
accepted by DSCC-VA.
STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 10-01-06
Approved sources of supply for SMD 5962-88639 are listed below for immediate acquisition information only and
shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be
revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a
certificate of compliance has been submitted to and accepted by DSCC-VA. This information bulletin is superseded
by the next dated revision of MIL-HDBK-103 and QML-38535. DSCC maintains an online database of all current
sources of supply at http://www.dscc.dla.mil/Programs/Smcr/.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962-8863901RA 0C7V7 QP54FCT573DMQB
5962-8863901SA 0C7V7 QP54FCT573FMQB
5962-88639012A 0C7V7 QP54FCT573LMQB
5962-8863902RA 0C7V7 QP54FCT573ADMQB
5962-8863902SA 0C7V7 QP54FCT573AFMQB
5962-88639022A 0C7V7 QP54FCT573ALMQB
1/ The lead finish shown for each PIN representing
a hermetic package is the most readily available
from the manufacturer listed for that part. If the
desired lead finish is not listed, contact the vendor
to determine its availability.
2/ Caution. Do not use this number for item
acquisition. Items acquired to this number may not
satisfy the performance requirements of this drawing.
Vendor CAGE Vendor name
number and address
0C7V7 QP Semiconductor
2945 Oakmead Village Court
Santa Clara, CA 95051
The information contained herein is disseminated for convenience only and the
Government assumes no liability whatsoever for any inaccuracies in the
information bulletin.
