CD74HC4051-EP
ANALOG MULTIPLEXER/DEMULTIPLEXER
SCLS464 – SEPTEMBER 2002
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D
Controlled Baseline
– One Assembly/Test Site, One Fabrication
Site
D
Extended Temperature Performance of
–55°C to 125°C
D
Enhanced Diminishing Manufacturing
Sources (DMS) Support
D
Enhanced Product Change Notification
D
Qualification Pedigree
D
Wide Analog Input Voltage Range of
±5 V Max
D
Low ON Resistance
– 70 Typical (VCC – VEE = 4.5 V)
– 40 Typical (VCC – VEE = 9 V)
Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life. Such qualification
testing should not be viewed as justifying use of this component
beyond specified performance and environmental limits.
D
Low Crosstalk Between Switches
D
Fast Switching and Propagation Speeds
D
Break-Before-Make Switching
D
Operation Control Voltage = 2 V to 6 V
D
Switch Voltage = 0 V to 10 V
D
High Noise Immunity NIL = 30%, NIH = 30%
of VCC, VCC = 5 V
description
This device is a digitally controlled analog switch that utilizes silicon gate CMOS technology to achieve operating
speeds similar to LSTTL, with the low power consumption of standard CMOS integrated circuits.
This analog multiplexer/demultiplexer controls analog voltages that may vary across the voltage supply range
(i.e., VCC to VEE). These bidirectional switches allow any analog input to be used as an output and vice versa.
The switches have low ON resistance and low OFF leakages. In addition, the device has an enable control (E)
that, when high, disables all switches to their OFF state.
ORDERING INFORMATION
TAPACKAGEORDERABLE
PART NUMBER TOP-SIDE
MARKING
–55°C to 125°CSOIC – M Tape and reel CD74HC4051MM96EP HC4051MEP
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Copyright 2002, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
M PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CHANNEL I/O A4
CHANNEL I/O A6
COM OUT/IN A
CHANNEL I/O A7
CHANNEL I/O A5
E
VEE
GND
VCC
CHANNEL I/O A2
CHANNEL I/O A1
CHANNEL I/O A0
CHANNEL I/O A3
ADDRESS SEL S0
ADDRESS SEL S1
ADDRESS SEL S2
CD74HC4051-EP
ANALOG MULTIPLEXER/DEMULTIPLEXER
SCLS464 SEPTEMBER 2002
2POST OFFICE BOX 655303 DALLAS, TEXAS 75265
FUNCTION TABLE
INPUTS ON
ES2S1S0CHANNEL(S)
L L L L A0
L L L H A1
L L H L A2
L L H H A3
L H L L A4
L H L H A5
L H H L A6
L H H H A7
H X X X None
X = Dont care
logic diagram (positive logic)
TG
TG
TG
TG
TG
TG
TG
3
11
10
9
6
E
S2
S1
S0
8 7
GND VEE
16
VCC
131415121524
A7A6A5A4A3A2A1A0
CHANNEL I/O
TG
COM OUT/IN A
Logic
Level
Conversion
Binary
To
1 of 8
Decoder
With
Enable
CD74HC4051-EP
ANALOG MULTIPLEXER/DEMULTIPLEXER
SCLS464 SEPTEMBER 2002
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC VEE (see Note 1) 0.5 V to 10.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply voltage range, VCC 0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply voltage range, VEE +0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0.5 V or VI > VCC + 0.5 V) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < VEE 0.5 V or VO > VCC + 0.5 V) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . .
Switch current (VI > VEE 0.5 V or VI < VCC + 0.5 V) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VEE current, IEE 20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 2): M package 73°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum junction temperature, TJ 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature (during soldering):
At distance 1/16 ±1/32 inch (1,59 ±0,79 mm) from case for 10 s max 300°C. . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg 65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. All voltages referenced to GND unless otherwise specified.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
MIN MAX UNIT
VCC Supply voltage (see Note 4) 2 6 V
Supply voltage, VCC VEE (see Figure 1) 2 10 V
VEE Supply voltage, (see Note 4 and Figure 2) 06 V
VCC = 2 V 1.5
VIH High-level input voltage VCC = 4.5 V 3.15 V
VCC = 6 V 4.2
VCC = 2 V 0.5
VIL Low-level input voltage VCC = 4.5 V 1.35 V
VCC = 6 V 1.8
VIInput control voltage 0 VCC V
VIS Analog switch I/O voltage VEE VCC V
VCC = 2 V 0 1000
ttInput transition (rise and fall) time VCC = 4.5 V 0 500 ns
VCC = 6 V 0 400
TAOperating free-air temperature 55 125 °C
NOTES: 3. All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4. In certain applications, the external load resistor current may include both VCC and signal-line components. To avoid drawing VCC
current when switch current flows into the transmission gate inputs, the voltage drop across the bidirectional switch must not exceed
0.6 V (calculated from ron values shown in electrical characteristics table). No VCC current flows through RL if the switch current flows
into the COM OUT/IN A terminal.
CD74HC4051-EP
ANALOG MULTIPLEXER/DEMULTIPLEXER
SCLS464 SEPTEMBER 2002
4POST OFFICE BOX 655303 DALLAS, TEXAS 75265
recommended operating area as a function of supply voltages
Figure 1
(VCC VEE) V
GND) V
(V
CC
HCT
8
6
4
2
0024681012
HC
Figure 2
(VEE GND) V
HCT
8
6
4
2
002468
HC
GND) V
(V
CC
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER TEST CONDITIONS V
EE
V
CC
TA = 25°CTA = 55°C
TO 125°CUNIT
EE
CC
MIN TYP MAX MIN MAX
0 V 4.5 V 70 160 240
VIS = VCC or VEE 0 V 6 V 60 140 210
r
IO = 1 mA,
VIVIH or VIL
4.5 V 4.5 V 40 120 180
r
on
V
I =
V
IH or
V
IL,
See
Fi
gu
r
e
8
0 V 4.5 V 90 180 270
See
Figure
8
VIS = VCC to VEE 0 V 6 V 80 160 240
4.5 V 4.5 V 45 130 195
0 V 4.5 V 10
ron Between any two channels 0 V 6 V 8.5
4.5 V 4.5 V 5
IIZ
For switch OFF:
When VIS = VCC, VOS = VEE;
When VIS = VEE, VOS = VCC
For switch ON:
0 V 6 V ±0.2 ±2
µA
I
IZ
For
s
w
itch
ON
:
All applicable combinations of VIS and VOS
voltage levels,
VI = VIH or VIL 5 V 5 V ±0.4 ±4
µ
A
IIL VI = VCC or GND 0 V 6 V ±0.1 ±1µA
ICC
IO = 0, When VIS = VEE,
VOS = VCC 0 V 6 V 8 160
µA
I
CC
O
VI = VCC or GND When VIS = VCC,
VOS = VEE 5 V 5 V 16 320 µ
A
CD74HC4051-EP
ANALOG MULTIPLEXER/DEMULTIPLEXER
SCLS464 SEPTEMBER 2002
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figure 7)
PARAMETER FROM
(INPUT)
TO
(OUTPUT)
LOAD
V
EE
V
CC
TA = 25°CTA = 55°C
TO 125°CUNIT
(INPUT)
(OUTPUT)
EE
CC
MIN MAX MIN MAX
CL = 15 pF 5 V 4 ns
2 V 60 90
tpd IN OUT
p
0 V 4.5 V 12 18
ns
L =
6 V 10 15
ns
4.5 V 4.5 V 8 12
CL = 15 pF 5 V 19
2 V 225 340
ten ADDRESS SEL or E OUT
p
0 V 4.5 V 45 68 ns
L =
6 V 38 57
4.5 V 4.5 V 32 48
CL = 15 pF 5 V 19
2 V 225 340
tdis ADDRESS SEL or E OUT
p
0 V 4.5 V 45 68 ns
L =
6 V 38 57
4.5 V 4.5 V 32 48
CIControl CL = 50 pF 10 10 pF
operating characteristics, VCC = 5 V, TA = 25°C, Input tr, tf = 6 ns
PARAMETER TYP UNIT
Cpd Power dissipation capacitance (see Note 5) 50 pF
NOTE 5: Cpd is used to determine the dynamic power consumption, per package.
PD = Cpd VCC2 fI + Σ (CL + CS) VCC2 fO
fO = output frequency
fI = input frequency
CL = output load capacitance
CS = switch capacitance
VCC = supply voltage
CD74HC4051-EP
ANALOG MULTIPLEXER/DEMULTIPLEXER
SCLS464 SEPTEMBER 2002
6POST OFFICE BOX 655303 DALLAS, TEXAS 75265
analog channel characteristics, TA = 25°C
PARAMETER TEST CONDITIONS VEE VCC MIN TYP MAX UNIT
CISwitch input capacitance 5 pF
CCOM Common output capacitance 25 pF
f
Minimum switch frequenc
y
See Fi
g
ure 3 and Fi
g
ure 9, and 2.25 V 2.25 V 145
MHz
f
max
qy
response at 3 dB
gg,
Notes 6 and 7 4.5 V 4.5 V 180
MHz
Sine wave distortion
See Figure 4
2.25 V 2.25 V 0.035
%
Sine
-
wave
distortion
See
Figure
4
4.5 V 4.5 V 0.018
%
E or ADDRESS SEL to
See Figure 5 and Notes 7 and 8
2.25 V 2.25 V (TBD)
mV
switch feed-through noise
See
Figure
5
,
and
Notes
7
and
8
4.5 V 4.5 V (TBD)
mV
Switch OFF signal feed See Figure 6 and Figure 10, and 2.25 V 2.25 V 73
dB
g
through
gg
Notes 7 and 8 4.5 V 4.5 V 75
dB
NOTES: 6. Adjust input voltage to obtain 0 dBm at VOS for fIN = 1 MHz.
7. VIS is centered at (VCC VEE)/2.
8. Adjust input for 0 dBm.
PARAMETER MEASUREMENT INFORMATION
Figure 3. Frequency-Response Test Circuit
5010 pF
SWITCH
ON
dB
METER
VCC
VCC/2
0.1
m
F
VIS VOS
Figure 4. Sine-Wave Distortion Test Circuit
10k 50 pF
SWITCH
ON
DISTORTION
METER
VCC
VCC/2
10
m
F
SINE-
WAVE
VIS VOS
VIS
VI = VIH
fIS = 1 kHz to 10 kHz
CD74HC4051-EP
ANALOG MULTIPLEXER/DEMULTIPLEXER
SCLS464 SEPTEMBER 2002
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
Figure 5. Control to Switch Feed-Through Noise
Test Circuit
600 50 pF
VOS
600
VOS
VPP
E
SCOPE
SWITCH
ALTERNATING
ON AND OFF
tr, tf 6 ns
fCONT = 1 MHz
50% DUTY
CYCLE
VCC
VCC/2
VCC/2
Figure 6. Switch OFF Signal Feed-Through
Test Circuit
VIS
0.1 µF
RC
VOS
SWITCH
OFF
dB
METER
R
VCC
VCC/2VCC/2
fIS 1-MHz SINE WAVE
R = 50
C = 10 pF
VC = VIL
CD74HC4051-EP
ANALOG MULTIPLEXER/DEMULTIPLEXER
SCLS464 SEPTEMBER 2002
8POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
Test
Point
From Output
Under TestCL
(see Note A)
VCC
S1
S2
LOAD CIRCUIT
PARAMETER
tPZH
tpd
tdis
ten tPZL
tPHZ
tPLZ
Open Closed
S1
Closed Open
S2
Open Closed
Closed Open
Open Open
NOTES: A. CL includes probe and test-fixture capacitance.
B. W aveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
W aveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. Phase relationships between waveforms were chosen arbitrarily . All input pulses are supplied by generators having the following
characteristics: PRR 1 MHz, ZO = 50 , tr = 6 ns, tf = 6 ns.
D. For clock inputs, fmax is measured with the input duty cycle at 50%.
E. The outputs are measured one at a time with one input transition per measurement.
F. tPLZ and tPHZ are the same as tdis.
G. tPZL and tPZH are the same as ten.
H. tPLH and tPHL are the same as tpd.
RL = 1 k
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
50% VCC
50% VCC
50% 10%10% 90% 90%
VCC
VOH
VOL
VEE
trtf
Input
In-Phase
Output
50% VCC
tPLH tPHL
50% VCC 50%
10% 10% 90%90% VOH
VOL
tr
tf
tPHL tPLH
Out-of-Phase
Output
Output
Control
Output
W aveform 1
(see Note B)
Output
W aveform 2
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
VCC
0 V
50% VCC 10%
50% VCC 0 V
VOLTAGE WAVEFORMS
OUTPUT ENABLE AND DISABLE TIMES
50% VCC 50% VCC
90%
VCC
VEE
Figure 7. Load Circuit and Voltage Waveforms
CD74HC4051-EP
ANALOG MULTIPLEXER/DEMULTIPLEXER
SCLS464 SEPTEMBER 2002
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Input Signal Voltage V
ON Resistance
Figure 8. Typical ON Resistance vs Input Signal Voltage
120
100
80
60
40
20
123456789
VCC VEE = 4.5 V
VCC VEE = 6 V
VCC VEE = 9 V
Frequency Hz
dB
Figure 9. Channel ON Bandwidth
10K 100K 1M 10M 100M
4
6
8
10
2
0
VCC = 4.5 V
GND = 4.5 V
VEE = 4.5 V
RL = 50
PIN 12 TO 3 VCC = 2.25 V
GND = 2.25 V
VEE = 2.25 V
RL = 50
PIN 12 TO 3
Figure 10. Channel OFF Feed Through
dB
Frequency Hz
10K 100K 1M 10M 100M
80
100
20
0
40
60
VCC = 4.5 V
GND = 4.5 V
VEE = 4.5 V
RL = 50
PIN 12 TO 3
VCC = 2.25 V
GND = 2.25 V
VEE = 2.25 V
RL = 50
PIN 12 TO 3
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
CD74HC4051MM96EP ACTIVE SOIC D 16 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
V62/03606-01XE ACTIVE SOIC D 16 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF CD74HC4051-EP :
Catalog: CD74HC4051
Automotive: CD74HC4051-Q1
Military: CD54HC4051
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Military - QML certified for Military and Defense Applications
PACKAGE OPTION ADDENDUM
www.ti.com 18-Sep-2008
Addendum-Page 1
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm) W
(mm) Pin1
Quadrant
CD74HC4051MM96EP SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 5-Nov-2008
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
CD74HC4051MM96EP SOIC D 16 2500 333.2 345.9 28.6
PACKAGE MATERIALS INFORMATION
www.ti.com 5-Nov-2008
Pack Materials-Page 2
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