HEF40098B Hex inverting buffer; 3-state Rev. 8 -- 21 November 2011 Product data sheet 1. General description The HEF40098B is a hex inverting buffer with 3-state outputs. The 3-state outputs are controlled by two active LOW enable inputs (1OE and 2OE). A HIGH on 1OE causes four of the six active LOW buffer elements (1Y0 to 1Y3) to assume a high-impedance or OFF-state regardless of the other input conditions and a HIGH on 2OE causes the outputs of the remaining two buffer elements (2Y0 and 2Y1) to assume a high-impedance or OFF-state regardless of the other input conditions. It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input. 2. Features and benefits Fully static operation 5 V, 10 V, and 15 V parametric ratings Standardized symmetrical output characteristics Specified from 40 C to +85 C Complies with JEDEC standard JESD 13-B 3. Ordering information Table 1. Ordering information All types operate from 40 C to +85 C Type number Package Name Description Version HEF40098BP DIP16 plastic dual in-line package; 16-leads (300 mil) SOT38-4 HEF40098BT SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 HEF40098B NXP Semiconductors Hex inverting buffer; 3-state 4. Functional diagram 2 1A0 1Y0 3 4 1A1 1Y1 5 6 1A2 1Y2 7 10 1A3 1Y3 9 1 1OE 1Y0 14 2A0 2Y0 13 1A1 1Y1 12 2A1 2Y1 11 1A2 1Y2 2A0 2Y0 1A3 1Y3 2A1 2Y1 15 2OE 1OE 001aae553 Fig 1. 1A0 Functional diagram Fig 2. 2OE 001aae555 Logic diagram 5. Pinning information 5.1 Pinning HEF40098B 1OE 1 16 VDD 1A0 2 15 2OE 1Y0 3 14 2A0 1A1 4 13 2Y0 1Y1 5 12 2A1 1A2 6 11 2Y1 1Y2 7 10 1A3 VSS 8 9 1Y3 001aae554 Fig 3. Pin configuration HEF40098B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 21 November 2011 (c) NXP B.V. 2011. All rights reserved. 2 of 13 HEF40098B NXP Semiconductors Hex inverting buffer; 3-state 5.2 Pin description Table 2. Pin description Symbol Pin Description 1OE 1 output enable input (active LOW) 1A0, 1A1, 1A2, 1A3 2, 4, 6, 10 buffer input 1Y0, 1Y1, 1Y2, 1Y3 3, 5, 7, 9 buffer output (active LOW) VSS 8 supply voltage 2Y0, 2Y1 13, 11 buffer output (active LOW) 2A0, 2A1 14, 12 buffer input 2OE 15 output enable input (active LOW) VDD 16 supply voltage 6. Functional description Table 3. Function table[1] Inputs Output nAn nOE nYn H L L L L H X H Z [1] H = HIGH voltage level; L = LOW voltage level; X = don't care; Z = high-impedance OFF-state. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDD supply voltage IIK input clamping current VI input voltage IOK output clamping current II/O input/output current IDD supply current - 50 mA Tstg storage temperature 65 +150 C Tamb ambient temperature 40 +85 C Ptot total power dissipation P Conditions VI < 0.5 V or VI > VDD + 0.5 V VO < 0.5 V or VO > VDD + 0.5 V Unit 0.5 +18 V - 10 mA 0.5 VDD + 0.5 V - 10 mA - 10 mA DIP16 package [1] - 750 mW SO16 package [2] - 500 mW - 100 mW [1] For DIP16 package: Ptot derates linearly with 12 mW/K above 70 C. [2] For SO16 package: Ptot derates linearly with 8 mW/K above 70 C. Product data sheet Max Tamb = 40 to +85 C power dissipation HEF40098B Min All information provided in this document is subject to legal disclaimers. Rev. 8 -- 21 November 2011 (c) NXP B.V. 2011. All rights reserved. 3 of 13 HEF40098B NXP Semiconductors Hex inverting buffer; 3-state 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter VDD VI Conditions Min Typ Max Unit supply voltage 3 - 15 V input voltage 0 - VDD V Tamb ambient temperature in free air 40 - +85 C t/V input transition rise and fall rate VDD = 5 V - - 3.75 ns/V VDD = 10 V - - 0.5 ns/V VDD = 15 V - - 0.08 ns/V 9. Static characteristics Table 6. Static characteristics VSS = 0 V; VI = VSS or VDD; unless otherwise specified. Symbol Parameter VIH VIL VOH VOL IOH IOL HIGH-level input voltage LOW-level input voltage Conditions IO < 1 A IO < 1 A HIGH-level output voltage IO < 1 A VDD Tamb = 40 C Tamb = 25 C Tamb = 85 C Unit Min Max Min Max Min Max 5V 3.5 - 3.5 - 3.5 - V 10 V 7.0 - 7.0 - 7.0 - V 15 V 11.0 - 11.0 - 11.0 - V 5V - 1.5 - 1.5 - 1.5 V 10 V - 3.0 - 3.0 - 3.0 V 15 V - 4.0 - 4.0 - 4.0 V 5V 4.95 - 4.95 - 4.95 - V 10 V 9.95 - 9.95 - 9.95 - V 15 V 14.95 - 14.95 - 14.95 - V 5V - 0.05 - 0.05 - 0.05 V 10 V - 0.05 - 0.05 - 0.05 V 15 V - 0.05 - 0.05 - 0.05 V HIGH-level output current VO = 2.5 V 5V - 3.8 - 3.2 - 2.5 mA VO = 4.6 V 5V - 1.2 - 1.0 - 0.8 mA VO = 9.5 V 10 V - 3.8 - 3.2 - 2.5 mA VO = 13.5 V 15 V - 12.0 - 10.0 - 8.0 mA 3.5 - 2.9 - 2.3 - mA - 10.0 - 8.0 - mA LOW-level output voltage LOW-level output current IO < 1 A VO = 0.4 V; 4.75 V VO = 0.5 V; 10 V 12.0 VO = 1.5 V; 15 V 24.0 - 20.0 - 16.0 - mA II input leakage current VI = 0 V or 15 V 15 V - 0.3 - 0.3 - 1.0 A IDD supply current IO = 0 A 5V - 4 - 4 - 30 A 10 V - 8 - 8 - 60 A 15 V - 16 - 16 - 120 A 15 V - 1.6 - 1.6 - 12.0 A - - - 7.5 - - pF IOZ OFF-state output current CI input capacitance HEF40098B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 21 November 2011 (c) NXP B.V. 2011. All rights reserved. 4 of 13 HEF40098B NXP Semiconductors Hex inverting buffer; 3-state 10. Dynamic characteristics Table 7. Dynamic characteristics VSS = 0 V; Tamb = 25 C; for test circuit see Figure 6; unless otherwise specified. Symbol Parameter Conditions tPHL HIGH to LOW propagation delay nAn to nYn; see Figure 4 tPLH tTHL nAn to nYn; see Figure 4 HIGH to LOW output transition time see Figure 4 LOW to HIGH output transition time tTLH HiGH to OFF-state propagation delay tPHZ tPLZ tPZH see Figure 4 nOE, to nYn; see Figure 5 LOW to OFF-state propagation delay nOE, to nYn; see Figure 5 OFF-state to HIGH propagation delay nOE, to nYn; see Figure 5 OFF-state to LOW propagation delay tPZL [1] LOW to HIGH propagation delay nOE, to nYn; see Figure 5 Extrapolation formula[1] Min Typ Max Unit 5V 70 ns + (0.20 ns/pF)CL - 80 160 ns 10 V 31 ns + (0.08 ns/pF)CL - 35 70 ns 15 V 22 ns + (0.06 ns/pF)CL - 25 50 ns 5V 50 ns + (0.30 ns/pF)CL - 65 130 ns 10 V 24 ns + (0.13 ns/pF)CL - 30 60 ns 15 V 23 ns + (0.05 ns/pF)CL - 25 50 ns 5V 15 ns + (0.30 ns/pF)CL - 30 60 ns 10 V 10 ns + (0.11 ns/pF)CL - 15 30 ns 15 V 7 ns + (0.07 ns/pF)CL - 10 20 ns VDD 5V 10 ns + (0.50 ns/pF)CL - 35 70 ns 10 V 8 ns + (0.24 ns/pF)CL - 20 40 ns 15 V 6 ns + (0.18 ns/pF)CL - 15 30 ns 5V - 45 85 ns 10 V - 35 65 ns 15 V - 30 60 ns 5V - 65 135 ns 10 V - 40 80 ns 15 V - 35 70 ns 5V - 70 140 ns 10 V - 35 75 ns 15 V - 30 65 ns 5V - 90 185 ns 10 V - 40 85 ns 15 V - 35 70 ns The typical value of the propagation delay and transition times are calculated from the extrapolation formula as shown (CL in pF). Table 8. Dynamic power dissipation PD PD can be calculated (in W) from the formulas shown. VSS = 0 V; tr = tf 20 ns; Tamb = 25 C. Symbol PD Parameter dynamic power dissipation VDD 5V Typical formula for PD (W) PD = 5000 fi + (fo CL) VDD where: 2 fi = input frequency in MHz, 10 V PD = 22800 fi + (fo CL) VDD2 fo = output frequency in MHz, 15 V PD = 81000 fi + (fo CL) VDD CL = output load capacitance in pF, 2 VDD = supply voltage in V, (CL fo) = sum of the outputs. HEF40098B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 21 November 2011 (c) NXP B.V. 2011. All rights reserved. 5 of 13 HEF40098B NXP Semiconductors Hex inverting buffer; 3-state 11. AC waveforms VI input VM 0V tPHL VOH tPLH 90 % output VM 10 % VOL tTHL tTLH 001aai615 Measurement points are given in Table 9, VOL and VOH are typical output voltage levels that occur with the output load. Fig 4. Input (nAn) to output (nYn) propagation delays VI nOE input VM GND tPLZ tPZL VCC nYn output LOW-to-OFF OFF-to-LOW VM VX VOL tPHZ VOH tPZH VY nYn output HIGH-to-OFF OFF-to-HIGH VM GND outputs enabled outputs disabled outputs enabled mgu782 Measurement points are given in Table 9, VOL and VOH are typical output voltage levels that occur with the output load. Fig 5. 3-state enable and disable times Table 9. Measurement points Supply voltage Input Output VDD VM VM VX VY 5 V to 15 V 0.5VDD 0.5VDD 0.1VDD 0.9VDD HEF40098B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 21 November 2011 (c) NXP B.V. 2011. All rights reserved. 6 of 13 HEF40098B NXP Semiconductors Hex inverting buffer; 3-state VI tW 90 % negative pulse VM 0V tf tr tr tf VI 90 % positive pulse 0V VM 10 % VM VM 10 % tW VEXT VCC VI RL VO G DUT RT RL CL 001aae331 Test data is given in Table 10. Definitions for test circuit: DUT = Device Under Test; RL = Load resistance; CL = Load capacitance including jig and probe capacitance; RT = Termination resistance should be equal to output impedance Zo of the pulse generator; VEXT = External voltage for measuring switching times. Fig 6. Test circuitry for switching times Table 10. Test data Supply voltage 5 V to 15 V HEF40098B Product data sheet Input Load VEXT VI tr, tf CL RL tPLH, tPHL tPLZ, tPZL tPHZ, tPZH VDD 20 ns 50 pF 1 k open 2VDD GND All information provided in this document is subject to legal disclaimers. Rev. 8 -- 21 November 2011 (c) NXP B.V. 2011. All rights reserved. 7 of 13 HEF40098B NXP Semiconductors Hex inverting buffer; 3-state 12. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4 ME seating plane D A2 A A1 L c e Z w M b1 (e 1) b b2 MH 9 16 pin 1 index E 1 8 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 b2 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.2 0.51 3.2 1.73 1.30 0.53 0.38 1.25 0.85 0.36 0.23 19.50 18.55 6.48 6.20 2.54 7.62 3.60 3.05 8.25 7.80 10.0 8.3 0.254 0.76 inches 0.17 0.02 0.13 0.068 0.051 0.021 0.015 0.049 0.033 0.014 0.009 0.77 0.73 0.26 0.24 0.1 0.3 0.14 0.12 0.32 0.31 0.39 0.33 0.01 0.03 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC JEITA ISSUE DATE 95-01-14 03-02-13 SOT38-4 Fig 7. EUROPEAN PROJECTION Package outline SOT38-4 (DIP16) HEF40098B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 21 November 2011 (c) NXP B.V. 2011. All rights reserved. 8 of 13 HEF40098B NXP Semiconductors Hex inverting buffer; 3-state SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index Lp 1 L 8 e 0 detail X w M bp 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.01 0.019 0.0100 0.39 0.014 0.0075 0.38 0.039 0.016 0.028 0.020 inches 0.010 0.057 0.069 0.004 0.049 0.16 0.15 0.05 0.244 0.041 0.228 0.01 0.01 0.028 0.004 0.012 8o o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. Fig 8. REFERENCES OUTLINE VERSION IEC JEDEC SOT109-1 076E07 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Package outline SOT109-1 (SO16) HEF40098B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 21 November 2011 (c) NXP B.V. 2011. All rights reserved. 9 of 13 HEF40098B NXP Semiconductors Hex inverting buffer; 3-state 13. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes HEF40098B v.8 20111121 Product data sheet - HEF40098B v.7 Modifications: * * * Legal pages updated. Changes in "General description" and "Features and benefits". Section "Applications" removed. HEF40098B v.7 20110914 Product data sheet - HEF40098B v.6 HEF40098B v.6 20090624 Product data sheet - HEF40098B v.5 HEF40098B v.5 20081031 Product data sheet - HEF40098B v.4 HEF40098B v.4 20080731 Product data sheet - HEF40098B_CNV v.3 HEF40098B_CNV v.3 19950101 Product specification - HEF40098B_CNV v.2 HEF40098B_CNV v.2 19950101 Product specification - - HEF40098B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 21 November 2011 (c) NXP B.V. 2011. All rights reserved. 10 of 13 HEF40098B NXP Semiconductors Hex inverting buffer; 3-state 14. Legal information 14.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term `short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 14.2 Definitions Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. 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In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 14.3 Disclaimers Limited warranty and liability -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors' aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer's sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer's applications and products planned, as well as for the planned application and use of customer's third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer's applications or products, or the application or use by customer's third party customer(s). Customer is responsible for doing all necessary testing for the customer's applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer's third party customer(s). NXP does not accept any liability in this respect. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. 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All rights reserved. 11 of 13 HEF40098B NXP Semiconductors Hex inverting buffer; 3-state Non-automotive qualified products -- Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. NXP Semiconductors' specifications such use shall be solely at customer's own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors' standard warranty and NXP Semiconductors' product specifications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors' warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond 14.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 15. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com HEF40098B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 21 November 2011 (c) NXP B.V. 2011. All rights reserved. 12 of 13 HEF40098B NXP Semiconductors Hex inverting buffer; 3-state 16. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 14.1 14.2 14.3 14.4 15 16 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 Legal information. . . . . . . . . . . . . . . . . . . . . . . 11 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Contact information. . . . . . . . . . . . . . . . . . . . . 12 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'. (c) NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 21 November 2011 Document identifier: HEF40098B