February 2010 Doc ID 2325 Rev 6 1/20
20
TS912, TS912A, TS912B
Rail-to-rail CMOS dual operational amplifier
Features
Rail-to-rail input and output voltage ranges
Single (or dual) supply operation from 2.7 to
16 V
Extremely low input bias current: 1 pA typ.
Low input offset voltage: 2 mV max.
Specified for 600 Ω and 100 Ω loads
Low supply current: 200 μA/amplifier
(VCC = 3 V)
Latch-up immunity
ESD tolerance: 3 kV
Spice macromodel included in this specification
Description
The TS912 is a rail-to-rail CMOS dual operational
amplifier designed to operate with a single or dual
supply voltage.
The input voltage range Vicm includes the two
supply rails VCC+ and VCC-.
The output reaches VCC- +30 mV, VCC+ -40 mV,
with RL = 10 kΩ and VCC- +300 mV, VCC+ -
400 mV, with RL = 600 Ω.
This product offers a broad supply voltage
operating range from 2.7 to 16 V and a supply
current of only 200 μA/amp (VCC = 3 V).
Source and sink output current capability is
typically 40 mA (at VCC = 3 V), fixed by an internal
limitation circuit.
N
DIP-8
(Plastic package)
D
SO-8
(Plastic micropackage)
1
2
3
45
6
7
8
-
+-
+
Inverting Input 1
Output 1
Non-inverting Input 1
V
CC
V
CC
+
Output 2
Inverting Input 2
Non-inverting Input 2
Pin connections (top view)
www.st.com
Absolute maximum ratings and operating conditions TS912, TS912A, TS912B
2/20 Doc ID 2325 Rev 6
1 Absolute maximum ratings and operating conditions
Table 1. Absolute maximum ratings
Symbol Parameter Value Unit
VCC Supply voltage (1) 18 V
Vid Differential input voltage (2) ±18 V
ViInput voltage (3) -0.3 to 18 V
Iin Current on inputs ±50 mA
IoCurrent on outputs ±130 mA
Tstg Storage temperature -65 to +150 °C
TjMaximum junction temperature 150 °C
Rthja
Thermal resistance junction to ambient (4)
DIP8
SO-8
85
125
°C/W
Rthjc
Thermal resistance junction to case (4)
DIP8
SO-8
41
40
°C/W
ESD
HBM: human body model(5) 3kV
MM: machine model(6) 200 V
CDM: charged device model(7) 1500 V
1. All voltage values, except differential voltage are with respect to network ground terminal.
2. Differential voltages are non-inverting input terminal with respect to the inverting input terminal.
3. The magnitude of input and output voltages must never exceed VCC+ +0.3 V.
4. Short-circuits can cause excessive heating. Destructive dissipation can result from simultaneous short-circuits on all
amplifiers. These values are typical.
5. Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 kΩ resistor
between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating.
6. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the
device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of connected pin combinations
while the other pins are floating.
7. Charged device model: all pins and the package are charged together to the specified voltage and then discharged directly
to the ground through only one pin. This is done for all pins.
Table 2. Operating conditions
Symbol Parameter Value Unit
VCC Supply voltage 2.7 to 16 V
Vicm Common mode input voltage range VCC--0.2 to VCC++0.2 V
Toper Operating free air temperature range -40 to + 125 °C
TS912, TS912A, TS912B Schematic diagram
Doc ID 2325 Rev 6 3/20
2 Schematic diagram
Figure 1. Schematic diagram (1/2 TS912)
Non-inverting
Input Inverting
Input
Internal
Vref
Output
V
CC
V
CC
Electrical characteristics TS912, TS912A, TS912B
4/20 Doc ID 2325 Rev 6
3 Electrical characteristics
Table 3. VCC+ = 3 V, VCC- = 0 V, RL, CL connected to VCC/2, Tamb = 25°C (unless otherwise
specified)
Symbol Parameter Min. Typ. Max. Unit
Vio
Input offset voltage (Vic = Vo = VCC/2)
TS912
TS912A
TS912B
Tmin T
amb T
max
TS912
TS912A
TS912B
10
5
2
12
7
3
mV
ΔVio Input offset voltage drift 5 μV/°C
Iio
Input offset current (1)
Tmin T
amb T
max
1100
200 pA
Iib
Input bias current (1)
Tmin T
amb T
max
1150
300 pA
ICC
Supply current (per amplifier, AVCL = 1, no load)
Tmin T
amb T
max
200 300
400 μA
CMR Common mode rejection ratio
Vic = 0 to 3 V, Vo = 1.5 V 70 dB
SVR Supply voltage rejection ratio (VCC+ = 2.7 to 3.3 V, Vo = VCC/2) 50 80 dB
Avd
Large signal voltage gain (RL = 10 kΩ, Vo = 1.2 V to 1.8 V)
Tmin T
amb T
max
3
2
10 V/mV
VOH
High level output voltage (Vid = 1 V)
RL = 100 kΩ
RL = 10 kΩ
RL = 600 Ω
RL = 100 Ω
Tmin T
amb T
max
RL = 10 kΩ
RL = 600 Ω
2.95
2.9
2.3
2.8
2.1
2.96
2.6
2V
VOL
Low level output voltage (Vid = -1 V)
RL = 100 kΩ
RL = 10 kΩ
RL = 600 Ω
RL = 100 Ω
Tmin T
amb T
max
RL = 10 kΩ
RL = 600 Ω
30
300
900
50
70
400
100
600
mV
Io
Output short-circuit current (Vid = ±1 V)
Source (Vo = VCC-)
Sink (Vo = VCC+)
20
20
40
40
mA
GBP Gain bandwidth product
(AVCL = 100, RL = 10 kΩ, CL = 100 pF, f = 100 kHz) 0.8 MHz
TS912, TS912A, TS912B Electrical characteristics
Doc ID 2325 Rev 6 5/20
SR+Slew rate (AVCL = 1, RL = 10 kΩ, CL = 100 pF, Vi = 1.3 V to 1.7 V) 0.4 V/μs
SR-Slew rate (AVCL = 1, RL = 10 kΩ, CL = 100 pF, Vi = 1.3 V to 1.7 V) 0.3 V/μs
φm Phase margin 30 Degrees
en Equivalent input noise voltage (Rs = 100 Ω, f = 1 kHz) 30 nV/Hz
1. Maximum values include unavoidable inaccuracies of the industrial tests.
Table 3. VCC+ = 3 V, VCC- = 0 V, RL, CL connected to VCC/2, Tamb = 25°C (unless otherwise
specified) (continued)
Symbol Parameter Min. Typ. Max. Unit
Electrical characteristics TS912, TS912A, TS912B
6/20 Doc ID 2325 Rev 6
Table 4. VCC+ = 5 V, VCC- = 0 V, RL, CL connected to VCC/2, Tamb = 25°C (unless otherwise
specified)
Symbol Parameter Min. Typ. Max. Unit
Vio
Input offset voltage (Vic = Vo = VCC/2)
TS912
TS912A
TS912B
Tmin T
amb T
max
TS912
TS912A
TS912B
10
5
2
12
7
3
mV
ΔVio Input offset voltage drift 5 μV/°C
Iio
Input offset current (1)
Tmin T
amb T
max
1 100
200 pA
Iib
Input bias current (1)
Tmin T
amb T
max
1 150
300 pA
ICC
Supply current (per amplifier, AVCL = 1, no load)
Tmin T
amb T
max
230 350
450 μA
CMR Common mode rejection ratio
Vic = 1.5 to 3.5 V, Vo = 2.5 V 60 85 dB
SVR Supply voltage rejection ratio (VCC+ = 3 to 5 V, Vo = VCC/2) 55 80 dB
Avd
Large signal voltage gain (RL = 10 kΩ, Vo = 1.5 V to 3.5 V)
Tmin T
amb T
max
10
7
40 V/mV
VOH
High level output voltage (Vid = 1V)
RL = 100 kΩ
RL = 10 kΩ
RL = 600 Ω
RL = 100 Ω
Tmin T
amb T
max
RL = 10 kΩ
RL = 600 Ω
4.95
4.9
4.25
4.8
4.1
4.95
4.55
3.7 V
VOL
Low level output voltage (Vid = -1 V)
RL = 100 kΩ
RL = 10 kΩ
RL = 600 Ω
RL = 100 Ω
Tmin T
amb T
max
RL = 10 kΩ
RL = 600 Ω
40
350
1400
50
100
500
150
750
mV
Io
Output short-circuit current (Vid = ±1 V)
Source (Vo = VCC-)
Sink (Vo = VCC+)
45
45
65
65
mA
GBP Gain bandwidth product
(AVCL = 100, RL = 10 kΩ, CL = 100 pF, f = 100 kHz) 1MHz
SR+Slew rate (AVCL = 1, RL = 10 kΩ, CL = 100 pF, Vi = 1 V to 4 V) 0.8 V/μs
SR-Slew rate (AVCL = 1, RL = 10 kΩ, CL = 100 pF, Vi = 1 V to 4 V) 0.6 V/μs
TS912, TS912A, TS912B Electrical characteristics
Doc ID 2325 Rev 6 7/20
en Equivalent input noise voltage (Rs = 100 Ω, f = 1 kHz) 30 nV/Hz
VO1/VO2 Channel separation (f = 1 kHz) 120 dB
φm Phase margin 30 Degrees
1. Maximum values include unavoidable inaccuracies of the industrial tests.
Table 4. VCC+ = 5 V, VCC- = 0 V, RL, CL connected to VCC/2, Tamb = 25°C (unless otherwise
specified) (continued)
Symbol Parameter Min. Typ. Max. Unit
Electrical characteristics TS912, TS912A, TS912B
8/20 Doc ID 2325 Rev 6
Table 5. VCC+ = 10 V, VCC- = 0 V, RL, CL connected to VCC/2, Tamb = 25°C (unless otherwise
specified)
Symbol Parameter Min. Typ. Max. Unit
Vio
Input offset voltage (Vic = Vo = VCC/2)
TS912
TS912A
TS912B
Tmin T
amb T
max
TS912
TS912A
TS912B
10
5
2
12
7
3
mV
ΔVio Input offset voltage drift 5 μV/°C
Iio
Input offset current (1)
Tmin T
amb T
max
1 100
200 pA
Iib
Input bias current (1)
Tmin T
amb T
max
1 150
300 pA
ICC
Supply current (per amplifier, AVCL = 1, no load)
Tmin T
amb T
max
400 600
700 μA
CMR
Common mode rejection ratio
Vic = 3 to 7 V, Vo = 5 V
Vic = 0 to 10 V, Vo = 5 V
60
50
90
75
dB
SVR Supply voltage rejection ratio (VCC+ = 5 to 10 V, Vo = VCC/2) 60 90 dB
Avd
Large signal voltage gain (RL = 10 kΩ, Vo = 2.5 V to 7.5 V)
Tmin T
amb T
max
15
10
50 V/mV
VOH
High level output voltage (Vid = 1V)
RL = 100 kΩ
RL = 10 kΩ
RL = 600 Ω
RL = 100 Ω
Tmin T
amb T
max
RL = 10 kΩ
RL = 600 Ω
9.95
9.85
9
9.8
8.8
9.95
9.35
7.8 V
VOL
Low level output voltage (Vid = -1 V)
RL = 100 kΩ
RL = 10 kΩ
RL = 600 Ω
RL = 100 Ω
Tmin T
amb T
max
RL = 10 kΩ
RL = 600 Ω
50
650
2300
50
150
800
150
900
mV
Io
Output short circuit current (Vid = ±1 V)
Source (Vo = VCC-)
Sink (Vo = VCC+)
45
50
65
75
mA
GBP Gain bandwidth product
(AVCL = 100, RL = 10 kΩ, CL = 100 pF, f = 100 kHz) 1.4 MHz
TS912, TS912A, TS912B Electrical characteristics
Doc ID 2325 Rev 6 9/20
SR+Slew rate
(AVCL = 1, RL = 10 kΩ, CL = 100 pF, Vi = 2.5 V to 7.5 V) 1.3 V/μs
SR-Slew rate
(AVCL = 1, RL = 10 kΩ, CL = 100 pF, Vi = 2.5 V to 7.5 V) 0.8 V/μs
φm Phase margin 40 Degrees
en Equivalent input noise voltage (Rs = 100 Ω, f = 1 kHz) 30 nV/Hz
THD
Total harmonic distortion
(AVCL = 1, RL = 10 kΩ, CL = 100 pF, Vo= 4.75 V to 5.25 V,
f = 1 kHz)
0.02 %
Cin Input capacitance 1.5 pF
1. Maximum values include unavoidable inaccuracies of the industrial tests.
Table 5. VCC+ = 10 V, VCC- = 0 V, RL, CL connected to VCC/2, Tamb = 25°C (unless otherwise
specified) (continued)
Symbol Parameter Min. Typ. Max. Unit
Electrical characteristics TS912, TS912A, TS912B
10/20 Doc ID 2325 Rev 6
Figure 2. Supply current (each amplifier)
vs. supply voltage
Figure 3. High level output voltage vs. high
level output current
CC
SUPPLY VOLTAGE, V (V)
0 4 8 12 16
T = 25°C
A = 1
V = V / 2
amb
VCL
O CC
CC
m
SUPPLY CURRENT, I (
A)
600
500
400
300
200
100
5
-70 -56 -42 -28 -14 0
OUTPUT VOLTAGE, V (V)
OH
amb
id
T = 25 C
V = 100mV
°
V = +5V
CC
V = +3V
CC
4
3
2
1
0
OH
OUTPUT CURRENT, I (mA)
Figure 4. Low level output voltage vs. low
level output current
Figure 5. Input bias current vs. temperature
1
14 28 42 56 70
OUTPUT VOLTAGE, V (V)
OL
amb
id
T = 25 C
V = -100mV
°
V = +5V
CC
V = +3V
CC
0
OL
OUTPUT CURRENT, I (mA)
2
3
4
5
25 50 75 100 125
INPUT BIAS CURRENT, I (pA)
ib
V = 10V
V = 5V
No load
CC
i
100
10
1
amb
TEMPERATURE, T ( C)
°
Figure 6. High level output voltage vs. high
level output current
Figure 7. Low level output voltage vs. low
level output current
4
0
OUTPUT VOLTAGE, V (V)
OH
V = +16V
CC
V = +10V
CC
OH
OUTPUT CURRENT, I (mA)
12
8
20
16
-70 -56 -42 -28 -14 0
amb
id
°
T = 25 C
V = 100mV
2
OUTPUT VOLTAGE, V (V)
OL
amb
id
T = 25 C
V = -100mV
°
0
V = 10V
CC
V = 16V
CC
OL
OUTPUT CURRENT, I (mA)
4
6
8
10
14 28 42 56 70
TS912, TS912A, TS912B Electrical characteristics
Doc ID 2325 Rev 6 11/20
Figure 8. Gain and phase vs. frequency Figure 9. Gain bandwidth product vs. supply
voltage
50
40
30
20
10
0
-10
GAIN (dB)
PHASE (Degrees)
0
45
90
135
180
FREQUENCY, f (Hz)
PHASE
GAIN
Phase
Margin
Gain
Bandwidth
Product
6
10
10
23
10
4
10
5
10
7
10
T = 25°C
V = 10V
R = 10k W
C = 100pF
A = 100
amb
CC
L
L
VCL
SUPPLY VOLTAGE, V (V)
CC
0 4 8 12 1
6
1800
GAIN BANDW. PROD., GBP (kHz)
T = 25°C
R = 10k
W
C = 100pF
amb
L
L
1400
1000
600
200
Figure 10. Phase margin vs. supply voltage Figure 11. Gain and phase vs. frequency
SUPPLY VOLTAGE, V (V)
CC
0 4 8 12 1
6
60
50
40
30
20
PHASE MARGIN, m (Degrees)
T = 25°C
R = 10k
W
C = 100pF
amb
L
L
f
50
40
30
20
10
0
-
10
GAIN (dB)
PHASE (Degrees)
0
45
90
135
180
FREQUENCY, f (Hz)
PHASE
GAIN
Phase
Margin
Gain
Bandwidth
Product
6
10
10
23
10
4
10
5
10
7
10
T = 25°C
V = 10V
R = 600
W
C = 100pF
A = 100
amb
CC
L
L
VCL
Figure 12. Gain bandwidth product vs. supply
voltage
Figure 13. Phase margin vs. supply voltage
SUPPLY VOLTAGE, V (V)
CC
0 4 8 12 16
GAIN BANDW. PROD., GBP (kHz)
T = 25°C
R = 600
W
C = 100pF
amb
L
L
1800
1400
1000
600
200
SUPPLY VOLTAGE, V (V)
CC
0 4 8 12 1
6
60
50
40
30
20
PHASE MARGIN, m (Degrees)
f
T = 25°C
R = 600
W
C = 100pF
amb
L
L
Macromodel TS912, TS912A, TS912B
12/20 Doc ID 2325 Rev 6
4 Macromodel
4.1 Important note concerning this macromodel
All models are a trade-off between accuracy and complexity (i.e. simulation time).
Macromodels are not a substitute to breadboarding; rather, they confirm the validity of
a design approach and help to select surrounding component values.
A macromodel emulates the nominal performance of a typical device within specified
operating conditions (temperature, supply voltage, for example). Thus the
macromodel is often not as exhaustive as the datasheet, its purpose is to illustrate the
main parameters of the product.
Data derived from macromodels used outside of the specified conditions (VCC, temperature,
for example) or even worse, outside of the device operating conditions (VCC, Vicm, for
example), is not reliable in any way.
Figure 14. Input voltage noise vs. frequency
150
100
50
0
10 100 1000 10000
FREQUENCY (Hz)
= 10V
= 25°C
T
amb
V
CC
= 100
W
R
S
EQUIVALENT INPUT
VOLTAGE NOISE (nV/VHz)
TS912, TS912A, TS912B Macromodel
Doc ID 2325 Rev 6 13/20
4.2 Macromodel code
** Standard Linear Ics Macromodels, 1993.
** CONNECTIONS :
* 1 INVERTING INPUT
* 2 NON-INVERTING INPUT
* 3 OUTPUT
* 4 POSITIVE POWER SUPPLY
* 5 NEGATIVE POWER SUPPLY
.SUBCKT TS912 1 2 3 4 5
**********************************************************
.MODEL MDTH D IS=1E-8 KF=6.563355E-14 CJO=10F
* INPUT STAGE
CIP 2 5 1.500000E-12
CIN 1 5 1.500000E-12
EIP 10 5 2 5 1
EIN 16 5 1 5 1
RIP 10 11 6.500000E+00
RIN 15 16 6.500000E+00
RIS 11 15 7.655100E+00
DIP 11 12 MDTH 400E-12
DIN 15 14 MDTH 400E-12
VOFP 12 13 DC 0.000000E+00
VOFN 13 14 DC 0
IPOL 13 5 4.000000E-05
CPS 11 15 3.82E-08
DINN 17 13 MDTH 400E-12
VIN 17 5 -0.5000000e+00
DINR 15 18 MDTH 400E-12
VIP 4 18 -0.5000000E+00
FCP 4 5 VOFP 7.750000E+00
FCN 5 4 VOFN 7.750000E+00
* AMPLIFYING STAGE
FIP 5 19 VOFP 5.500000E+02
FIN 5 19 VOFN 5.500000E+02
RG1 19 5 5.087344E+05
RG2 19 4 5.087344E+05
CC 19 29 2.200000E-08
HZTP 30 29 VOFP 12.33E+02
HZTN 5 30 VOFN 12.33E+02
DOPM 19 22 MDTH 400E-12
DONM 21 19 MDTH 400E-12
HOPM 22 28 VOUT 3135
VIPM 28 4 150
HONM 21 27 VOUT 3135
VINM 5 27 150
EOUT 26 23 19 5 1
VOUT 23 5 0
ROUT 26 3 65
COUT 3 5 1.000000E-12
DOP 19 68 MDTH 400E-12
VOP 4 25 1.924
Macromodel TS912, TS912A, TS912B
14/20 Doc ID 2325 Rev 6
HSCP 68 25 VSCP1 1E8
DON 69 19 MDTH 400E-12
VON 24 5 2.4419107
HSCN 24 69 VSCN1 1.5E8
VSCTHP 60 61 0.1375
DSCP1 61 63 MDTH 400E-12
VSCP1 63 64 0
ISCP 64 0 1.000000E-8
DSCP2 0 64 MDTH 400E-12
DSCN2 0 74 MDTH 400E-12
ISCN 74 0 1.000000E-8
VSCN1 73 74 0
DSCN1 71 73 MDTH 400E-12
VSCTHN 71 70 -0.75
ESCP 60 0 2 1 500
ESCN 70 0 2 1 -2000
.ENDS
TS912, TS912A, TS912B Package information
Doc ID 2325 Rev 6 15/20
5 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Package information TS912, TS912A, TS912B
16/20 Doc ID 2325 Rev 6
5.1 DIP8 package information
Figure 15. DIP8 package mechanical drawing
Table 6. DIP8 package mechanical data
Ref.
Dimensions
Millimeters Inches
Min. Typ. Max. Min. Typ. Max.
A5.330.210
A1 0.38 0.015
A2 2.92 3.30 4.95 0.115 0.130 0.195
b 0.36 0.46 0.56 0.014 0.018 0.022
b2 1.14 1.52 1.78 0.045 0.060 0.070
c 0.20 0.25 0.36 0.008 0.010 0.014
D 9.02 9.27 10.16 0.355 0.365 0.400
E 7.62 7.87 8.26 0.300 0.310 0.325
E1 6.10 6.35 7.11 0.240 0.250 0.280
e 2.54 0.100
eA 7.62 0.300
eB 10.92 0.430
L 2.92 3.30 3.81 0.115 0.130 0.150
TS912, TS912A, TS912B Package information
Doc ID 2325 Rev 6 17/20
5.2 SO-8 package information
Figure 16. SO-8 package mechanical drawing
Table 7. SO-8 package mechanical data
Ref.
Dimensions
Millimeters Inches
Min. Typ. Max. Min. Typ. Max.
A1.750.069
A1 0.10 0.25 0.004 0.010
A2 1.25 0.049
b 0.28 0.48 0.011 0.019
c 0.17 0.23 0.007 0.010
D 4.80 4.90 5.00 0.189 0.193 0.197
E 5.80 6.00 6.20 0.228 0.236 0.244
E1 3.80 3.90 4.00 0.150 0.154 0.157
e 1.27 0.050
h 0.25 0.50 0.010 0.020
L 0.40 1.27 0.016 0.050
L1 1.04 0.040
k 0
ccc 0.10 0.004
Ordering information TS912, TS912A, TS912B
18/20 Doc ID 2325 Rev 6
6 Ordering information
Table 8. Order codes
Part number Temperature
range Package Packing Marking
TS912IN
-40°C, +125°C
DIP8 Tube TS912IN
TS912AIN TS912AIN
TS912ID
TS912IDT
SO-8
Tube or
Tape & reel
912I
TS912AID
TS912AIDT 912AI
TS912BID
TS912BIDT 912BI
TS912IYD
TS912IYDT(1)
1. Qualified and characterized according to AEC Q100 and Q003 or equivalent, advanced screening
according to AEC Q001 & Q 002 or equivalent.
SO-8
(Automotive grade level)
912IY
TS912AIYD
TS912AIYDT(1) 912AIY
TS912BIYD
TS912BIYDT(1) 912BY
TS912, TS912A, TS912B Revision history
Doc ID 2325 Rev 6 19/20
7 Revision history
Table 9. Document revision history
Date Revision Changes
04-Dec-2001 1 First release.
31-Jul-2005 2 PPAP references inserted in the datasheet, see order codes table.
ESD protection inserted in AMR table.
03-Oct-2005 3 Some errors in the Order Codes table were corrected.
Reorganization of Section 4: Macromodel.
13-Feb- 2006 4 Parameters added in AMR table (Tj, ESD, Rthja, Rthjc).
16-Oct-2007 5
Corrected units and ESD footnotes in Table 1: Absolute maximum
ratings.
Corrected misalignments in electrical characteristics table.
Updated Section 4: Macromodel.
Added missing automotive grade order codes and footnote in
Table 8: Order codes.
Format update.
01-Feb-2010 6 Added TS912A and TS912B part numbers on cover page.
TS912, TS912A, TS912B
20/20 Doc ID 2325 Rev 6
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