1. Product profile
1.1 General description
200 W LDMOS power transistor for base station applications at frequencies from
2110 MHz to 2170 MHz.
[1] Test signal: 3GPP; test model 1; 64 DPCH; PAR = 8.4 dB at 0.01 % probability on CCDF;
carrier spacing 5 MHz.
1.2 Features and benefits
Excellent ruggedness
High efficiency
Low Rth providing excellent thermal stability
Designed for low memory effects providing excellent pre-distortability
Internally matched for ease of use
Integrated ESD protection
Compliant to Directive 2002/95/EC, rega rd in g Re stri ctio n of Hazard ou s Sub stances
(RoHS)
1.3 Applications
RF power amplifiers for W-CDMA base stations and multi carrier applications in the
2110 MHz to 2170 MHz frequency range
BLF7G22L-200;
BLF7G22LS-200
Power LDMOS transistor
Rev. 4 — 22 July 2011 Product data sheet
Table 1. Typical performance
Ty pical RF performance at Tcase = 25
C in a common source class-AB production test circuit.
Mode of operation f IDq VDS PL(AV) GpDACPR
(MHz) (mA) (V) (W) (dB) (%) (dBc)
2-carrier W-CDMA 2110 to 2170 1620 28 55 18.5 31 31[1]
BLF7G22L-200_7G22LS-200 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 July 2011 2 of 13
NXP Semiconductors BLF7G22L-200; BLF7G22LS-200
Power LDMOS transistor
2. Pinning information
[1] Connected to flange.
3. Ordering information
4. Limiting values
5. Thermal characteristics
Table 2. Pinning
Pin Description Simplified outline Graphic symbol
BLF7G22L-200 (SOT 502A)
1drain
2gate
3source [1]
BLF7G22LS-200 (SOT5 02B)
1drain
2gate
3source [1]
3
2
1
sym112
1
3
2
3
2
1
sym112
1
3
2
Table 3. Ordering information
Type number Package
Name Description Version
BLF7G22L-200 - flanged LDMOST ceramic package; 2 mounting holes;
2 leads SOT502A
BLF7G22LS-200 - earless flanged LDMOST ceramic package; 2 leads SOT502B
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDS drain-source voltage - 65 V
VGS gate-source voltage 0.5 +13 V
Tstg storage temperature 65 +150 C
Tjjunction temperature - 200 C
Table 5. Thermal characteristics
Symbol Parameter Conditions Typ Unit
Rth(j-c) thermal resistance from junction to case Tcase =80C; PL= 80 W (CW);
VDS =28V; I
Dq = 1620 mA 0.26 K/W
BLF7G22L-200_7G22LS-200 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 July 2011 3 of 13
NXP Semiconductors BLF7G22L-200; BLF7G22LS-200
Power LDMOS transistor
6. Characteristics
7. Test information
7.1 Ruggedness in class-AB operation
The BLF7G22L-200 and BLF7G22LS-200 are capable of withstanding a load mismatch
corresponding to VSWR = 10 : 1 through all phases under the following conditions:
VDS =28V; I
Dq =1620mA; P
L= 200 W (CW); f = 2110 MHz to 2170 MHz.
Table 6. Characteristics
Tj = 25
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
V(BR)DSS drain-source breakdown voltage VGS =0V; I
D=1.5mA 65 - - V
VGS(th) gate-source threshold voltage VDS =10 V; I
D= 150 mA 1.5 1.9 2.3 V
IDSS drain leakage current VGS =0V; V
DS =28V--4.2A
IDSX drain cut-off current VGS =V
GS(th) +3.75 V;
VDS =10V 42 50.8 - A
IGSS gate leakage current VGS =11V; V
DS = 0 V - - 420 nA
gfs forward transconductance VDS =10V; I
D=5.25A - 18.9 - S
RDS(on) drain-source on-state resistance VGS =V
GS(th) + 3.75 V;
ID=5.25A -0.054-
Table 7. Functional test information
Mode of operation: 2-carrier W-CDMA; PAR = 8.4 dB at 0.01 % probability on the CCDF; 3GPP test
model 1; 1-64 DPC H; f1=2112.5MHz; f
2=2117.5MHz; f
3= 2162.5 MHz; f4= 2167.5 MHz;
RF performance at VDS =28V; I
Dq = 1620 mA; Tcase =25
C; unless otherwise specified; in a
class-AB production test circuit.
Symbol Parameter Conditions Min Typ Max Unit
PL(AV) average ou tput power - 55 - W
Gppower gain PL(AV) =55W 16.8 18.5 - dB
RLin input return loss PL(AV) =55W - 15 6dB
Ddrain efficiency PL(AV) =55W 27 31 - %
ACPR adjacent channel power ratio PL(AV) =55W - 31 25.5 dBc
BLF7G22L-200_7G22LS-200 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 July 2011 4 of 13
NXP Semiconductors BLF7G22L-200; BLF7G22LS-200
Power LDMOS transistor
7.2 Impedance information
[1] ZS and ZL defined in Figure 1.
7.3 1 Tone CW
Table 8. Typical impedance
Measured load-pull data; IDq = 1620 mA; VDS = 28 V.
f ZS[1] ZL[1]
(MHz) () ()
2050 1.05 j4.04 2.04 j1.28
2110 1.18 j4.17 1.67 j1.52
2140 1.32 j4.68 1.67 j1.52
2170 1.58 j4.37 1.62 j1.63
2230 2.55 j5.14 1.51 j1.83
Fig 1. Definition of transis tor imp e danc e
001aaf059
drain
Z
L
Z
S
gate
VDS = 28 V; IDq = 1620 mA.
(1) f = 2110 MHz
(2) f = 2140 MHz
(3) f = 2170 MHz
VDS = 28 V; IDq = 1620 mA.
(1) f = 2110 MHz
(2) f = 2140 MHz
(3) f = 2170 MHz
Fig 2. Power gain as a function of average load
power; typical values Fig 3. Drain efficiency as a fun ctio n o f average load
power; typical values
PL(AV) (W)
0 24016080
001aan064
17
18
19
Gp
(dB)
16
(1)
(2)
(3)
001aan065
PL(AV) (W)
0 24016080
30
40
20
50
60
ηD
(%)
10
(1)
(2)
(3)
BLF7G22L-200_7G22LS-200 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 July 2011 5 of 13
NXP Semiconductors BLF7G22L-200; BLF7G22LS-200
Power LDMOS transistor
7.4 1-carrier W-CDMA
VDS =28V; I
Dq = 1620 mA ; f = 2140 MHz; P AR = 7.2 dB
at 0.01 probability on the CCDF. VDS = 28 V; IDq = 1620 mA; PAR = 7.2 dB at 0.01
probability on the CCDF.
(1) f = 2110 MHz
(2) f = 2140 MHz
(3) f = 2170 MHz
Fig 4. Power gain and drain efficiency as functions
of average load power; typical value s Fig 5. Peak-to-average power ratio as func tio n of
peak power; typica l va l ues
VDS = 28 V; IDq = 1620 mA; PAR = 7.2 dB at 0.01 probability on the CCDF.
(1) f = 2110 MHz
(2) f = 2140 MHz
(3) f = 2170 MHz
Fig 6. Adjacent power channel ratio (5 MHZ) as function of averag e lo ad power; typical values
PL(AV) (W)
0 1008040 6020
001aan066
17.8
18.2
17.4
18.6
19.0
Gp
(dB)
17.0
20
30
10
40
50
ηD
(%)
0
ηD
Gp
PL(M) (W)
30 270190110
001aan067
4
6
8
PAR
2
(1)
(3)
(2)
PL(AV) (W)
0 1008040 6020
001aan068
−45
−35
−25
ACPR5M
(dBc)
−55
(1)
(2)
(3)
BLF7G22L-200_7G22LS-200 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 July 2011 6 of 13
NXP Semiconductors BLF7G22L-200; BLF7G22LS-200
Power LDMOS transistor
7.5 2-carrier W-CDMA
VDS =28V; I
Dq = 1620 mA; f = 2140 MHz; Channel
S p acing = 5 MHz; PAR = 8.4 dB at 0.01 probability on
the CCDF.
VDS = 28 V; IDq = 1620 mA; Channel Spacing = 5 MHz;
PAR = 8.4 dB at 0.01 probability on the CCDF.
(1) f = 2110 MHz
(2) f = 2140 MHz
(3) f = 2170 MHz
Fig 7. Power gain and drain efficiency as functions
of average load power; typical value s Fig 8. Power gain as a function of average load
power; typical values
VDS = 28 V; IDq = 1620 mA; Channel Spacing = 5 MHz;
PAR = 8.4 dB at 0.01 probability on the CCDF.
(1) f = 2110 MHz
(2) f = 2140 MHz
(3) f = 2170 MHz
VDS = 28 V; IDq = 1620 mA; Channel Spacing = 5 MHz;
PAR = 8.4 dB at 0.01 probability on the CCDF.
(1) f = 2110 MHz
(2) f = 2140 MHz
(3) f = 2170 MHz
Fig 9. Drain efficie ncy as function of average load
power; typical values Fig 10. Adjacent power channe l ratio (5 MHZ) as
function of average load power; typical valu es
001aan069
PL(AV) (W)
0 1208040
17.8
18.2
17.4
18.6
19.0
Gp
(dB)
17.0
20
30
10
40
50
ηD
(%)
0
ηD
Gp
001aan070
PL(AV) (W)
0 1208040
17.8
18.2
17.4
18.6
19.0
Gp
(dB)
17.0
(1)
(2)
(3)
001aan071
PL(AV) (W)
0 1208040
30
20
40
50
Gp
(dB)
10
(1)
(2)
(3)
PL(AV) (W)
0 1208040
001aan072
−40
−30
−20
ACPR5M
(dBc)
−50
(1)
(2)
(3)
BLF7G22L-200_7G22LS-200 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 July 2011 7 of 13
NXP Semiconductors BLF7G22L-200; BLF7G22LS-200
Power LDMOS transistor
7.6 Test circuit
[1] TDK or capacitor of same quality.
[2] American Technical Ceramics type 100B or capacitor of same quality.
See Table 9 for list of components.
Fig 11. Component layou t
001aan552
18 mm
11 mm
50.000 mm50.000 mm
65.000 mm
9 mm
C1 C2
C3
C15
R1
C4
C10
C9
C5
C14
C7
C8
C11
C12
C6
C13
Table 9. List of components
See Figure 11 for component layout.
Component Description Value Remarks
C1 multilayer ceramic chip capacitor 10 F[1] TDK
C2, C3 multilayer ceramic chip capacitor 4.7 F[1] TDK
C4, C5, C6, C7, C8 multilayer ceramic chip capacitor 22 pF [2] ATC100B
C9 multilayer ceramic chip capacitor 2.0 pF [2] ATC100B
C10 multilayer ceramic chip capacitor 2.1 pF [2] ATC100B
C11 multilayer ceramic chip capacitor 0.5 pF [2] ATC100B
C12 multilayer ceramic chip capacitor 0.9 pF [2] ATC100B
C13, C14 multilayer ceramic chip capacitor 330 nF [1] TDK
C15 electrolytic capacitor 470 F; 63 V
R1 chip resistor 10 Philips 1206
BLF7G22L-200_7G22LS-200 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 July 2011 8 of 13
NXP Semiconductors BLF7G22L-200; BLF7G22LS-200
Power LDMOS transistor
8. Package outline
Fig 12. Package outline SOT502A
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT502A 99-12-28
03-01-10
0 5 10 mm
scale
Flanged LDMOST ceramic package; 2 mounting holes; 2 leads SOT502A
p
L
AF
b
D
U2
H
Q
c
1
3
2
D1
E
A
C
q
U1
C
B
E1
M M
w2
UNIT A
mm
Db
12.83
12.57 0.15
0.08 20.02
19.61 9.53
9.25 19.94
18.92 9.91
9.65
4.72
3.43
cU2
0.25 0.5127.94
qw
2
w1
F
1.14
0.89
U1
34.16
33.91
L
5.33
4.32
p
3.38
3.12
Q
1.70
1.45
EE
1
9.50
9.30
inches 0.505
0.495 0.006
0.003 0.788
0.772
D1
19.96
19.66
0.786
0.774 0.375
0.364 0.785
0.745 0.390
0.380
0.186
0.135 0.01 0.021.100
0.045
0.035 1.345
1.335
0.210
0.170 0.133
0.123 0.067
0.057
0.374
0.366
H
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)
w1AB
M M M
BLF7G22L-200_7G22LS-200 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 July 2011 9 of 13
NXP Semiconductors BLF7G22L-200; BLF7G22LS-200
Power LDMOS transistor
Fig 13. Package outline SOT502B
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT502B 03-01-10
07-05-09
0 5 10 mm
scale
Earless flanged LDMOST ceramic package; 2 leads SOT502B
AF
b
D
U2
L
H
Q
c
1
3
2
D1
E
D
U1
D
E1
M M
w2
UNIT A
mm
Db
12.83
12.57 0.15
0.08 20.02
19.61 9.53
9.25 19.94
18.92 9.91
9.65
4.72
3.43
cU2
0.25
w2
F
1.14
0.89
U1
20.70
20.45
L
5.33
4.32
Q
1.70
1.45
EE
1
9.50
9.30
inches 0.505
0.495 0.006
0.003 0.788
0.772
D1
19.96
19.66
0.786
0.774 0.375
0.364 0.785
0.745 0.390
0.380
0.186
0.135 0.010
0.045
0.035 0.815
0.805
0.210
0.170 0.067
0.057
0.374
0.366
H
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)
BLF7G22L-200_7G22LS-200 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 July 2011 10 of 13
NXP Semiconductors BLF7G22L-200; BLF7G22LS-200
Power LDMOS transistor
9. Handling information
10. Abbreviations
11. Revision history
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Observe precautions for handling
electrostatic sensitive devices.
Such precautions are described in the ANSI/ESD S20.20, IEC/ST 61340-5, JESD625-A or
equivalent standards.
Table 10. Abbreviations
Acronym Description
3GPP Third Generation Partnership Project
CCDF Complementary Cumulative Distribution Function
CW Continuous Wave
DPCH Dedicated Physical CHannel
LDMOS Laterally Diffused Metal Oxide Semiconductor
LDMOST Laterally Diffused Metal Oxide Semiconductor Transistor
PAR Peak-to-Average power Ratio
RF Radio Frequency
VSWR Voltage Standing Wave Ratio
W-CDMA Wideband Code Division Multiple Access
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
BLF7G22L-200_7G22LS-200 v.4 20110722 Product data sheet - BLF7G22L-200_7G22LS-200
v.3
Modifications: •The status of this document has been changed to Product data sheet.
BLF7G22L-200_7G22LS-200 v.3 20110401 Preliminary data sheet - BLF7G22L-200_7G2 2LS-200
v.2
BLF7G22L-200_7G22LS-200 v.2 20101228 Preliminary data sheet - BLF7G22L-200_ 7G22LS-200
v.1
BLF7G22L-200_7G22LS-200 v.1 20100419 Objective data sheet - -
BLF7G22L-200_7G22LS-200 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 July 2011 11 of 13
NXP Semiconductors BLF7G22L-200; BLF7G22LS-200
Power LDMOS transistor
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[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is docume nt may have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
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Customers are responsible for the design and ope ration of their applications
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Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
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operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
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Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] dat a sheet Production This document contains the product specification.
BLF7G22L-200_7G22LS-200 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 July 2011 12 of 13
NXP Semiconductors BLF7G22L-200; BLF7G22LS-200
Power LDMOS transistor
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are the property of their respect i ve ow ners.
13. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors BLF7G22L-200; BLF7G22LS-200
Power LDMOS transistor
© NXP B.V. 2011. All rights reserved.
For more information, please visit: http://www.nxp.co m
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 22 July 2011
Document identifier: BLF7G22L-200_7G22LS-200
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
14. Contents
1 Product profile. . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Thermal characteristics . . . . . . . . . . . . . . . . . . 2
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 3
7 Test information. . . . . . . . . . . . . . . . . . . . . . . . . 3
7.1 Ruggedness in class-AB operation . . . . . . . . . 3
7.2 Impedance information. . . . . . . . . . . . . . . . . . . 4
7.3 1 Tone CW . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
7.4 1-carrier W-CDMA . . . . . . . . . . . . . . . . . . . . . . 5
7.5 2-carrier W-CDMA . . . . . . . . . . . . . . . . . . . . . . 6
7.6 Test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
9 Handling information. . . . . . . . . . . . . . . . . . . . 10
10 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 10
11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10
12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 11
12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11
12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
12.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 11
12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 12
13 Contact information. . . . . . . . . . . . . . . . . . . . . 12
14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
