SN65LBC172A, SN75LBC172A QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVERS SLLS447B - OCTOBER 2000 - REVISED MAY 2003 D Designed for TIA/EIA-485, TIA/EIA-422, D Driver Positive- and Negative-Current and ISO 8482 Applications Signaling Rates up to 30 Mbps Propagation Delay Times <11 ns Low Standby Power Consumption 1.5 mA Max Output ESD Protection Exceeds 13 kV D D D D Limiting D Power-Up and Power-Down Glitch-Free for D D Live Insertion Applications Thermal Shutdown Protection Industry Standard Pin-Out, Compatible With SN75172, AM26LS31, DS96172, LTC486, and MAX3045 description The SN65LBC172A and SN75LBC172A are quadruple differential line drivers with 3-state outputs, designed for TIA/EIA-485 (RS-485), TIA/EIA-422 (RS-422), and ISO 8482 applications. 1A 1Y 1Z G 2Z 2Y 2A GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 logic diagram (positive logic) 16-DW PACKAGE (TOP VIEW) N PACKAGE (TOP VIEW) G VCC 4A 4Y 4Z G 3Z 3Y 3A 1 2 3 4 5 6 7 8 1A 1Y 1Z G 2Z 2Y 2A GND 16 15 14 13 12 11 10 9 VCC 4A 4Y 4Z G 3Z 3Y 3A G 1A 2A 3A 4A 20-DW PACKAGE (TOP VIEW) 1A 1Y NC 1Z G 2Z NC 2Y 2A GND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 4 12 1 7 9 15 2 3 6 5 10 11 14 13 1Y 1Z 2Y 2Z 3Y 3Z 4Y 4Z logic diagram (positive logic) VCC 4A 4Y NC 4Z G 3Z NC 3Y 3A G G 1A 2A 3A 4A 5 15 1 9 11 19 2 4 8 6 12 14 18 16 1Y 1Z 2Y 2Z 3Y 3Z 4Y 4Z Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. LinBiCMOS is a trademark of Texas Instruments. The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second). Copyright 2001 - 2003, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 SN65LBC172A, SN75LBC172A QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVERS SLLS447B - OCTOBER 2000 - REVISED MAY 2003 description (continued) These devices are optimized for balanced multipoint bus transmission at signalling rates up to 30 million bits per second. The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment. Each driver features current limiting and thermal-shutdown circuitry making it suitable for high-speed mulitpoint data transmission applications in noisy environments. These devices are designed using LinBiCMOSt, facilitating low power consumption and robustness. The G and G inputs provide driver enable control using either positive or negative logic. When disabled or powered off, the driver outputs present a high-impedance to the bus for reduced system loading. The SN75LBC172A is characterized for operation over the temperature range of 0C to 70C. The SN65LBC172A is characterized over the temperature range from -40C to 85C. AVAILABLE OPTIONS PACKAGE TA 16-PIN PLASTIC SMALL OUTLINE (JEDEC MS-013) SN75LBC172A16DW 0C to 70C 20-PIN PLASTIC SMALL OUTLINE (JEDEC MS-013) 16-PIN PLASTIC THROUGH-HOLE (JEDEC MS-001) SN75LBC172ADW SN75LBC172AN Marked as 75LBC172A SN65LBC172A16DW SN65LBC172ADW - 40C to 85C Marked as 65LBC172A Add R suffix for taped and reeled version. FUNCTION TABLE (EACH DRIVER) INPUT ENABLES OUTPUTS A G G Y Z L H X L H L X L L H H H X H L H X L H L OPEN H X H L OPEN X L H L H OPEN X H L L OPEN X L H X L H Z Z X L OPEN Z Z H = high level, L = low level, X = irrelevant, Z = high impedance (off) 2 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN65LBC172AN SN65LBC172A, SN75LBC172A QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVERS SLLS447B - OCTOBER 2000 - REVISED MAY 2003 equivalent input and output schematic diagrams Y or Z Output A, G, or G Input VCC VCC 16 V 20 V 100 k 16 V 1 k Input Output 16 V 9V 17 V 16 V absolute maximum ratings Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to 6 V Output voltage range, VO, at any bus (steady state) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -10 V to 15 V Output voltage range, VO, at any bus (transient pulse through 100 , see Figure 8) . . . . . . . . . . . -30 V to 30 V Input voltage range, VI, at any A, G, or G terminal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to VCC + 0.5 V Electrostatic discharge: Human body model (see Note 2) Y, Z, and GND . . . . . . . . . . . . . . . . . . . . . 13 kV All pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 kV Charged-device model (see Note 3) All pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 kV Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65C to 150C Continuous power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential I/O bus voltages, are with respect to GND. 2. Tested in accordance with JEDEC standard 22, Test Method A114-A. 3. Tested in accordance with JEDEC standard 22, Test Method C101. PACKAGE 16 PIN DW 16-PIN 20 PIN DW 20-PIN 16-PIN N DISSIPATION RATING TABLE DERATING FACTOR ABOVE TA = 25C JEDEC BOARD MODEL TA 25C POWER RATING TA = 70C POWER RATING TA = 85C POWER RATING Low K 1200 mW 9.6 mW/C 769 mW 625 mW High K 2240 mW 17.9 mW/C 1434 mW 1165 mW Low K 1483 mW 11.86 mW/C 949 mW 771 mW High K 2753 mW 22 mW/C 1762 mW 1432 mW Low K 1150 mW 9.2 mW/C 736 mW 598 mW This is the inverse of the junction-to-ambient thermal resistance when board-mounted with no air flow. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 SN65LBC172A, SN75LBC172A QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVERS SLLS447B - OCTOBER 2000 - REVISED MAY 2003 recommended operating conditions Supply voltage, VCC Voltage at any bus terminal High-level input voltage, VIH Low-level input voltage, VIL Y, Z A G, A, G G Output current Operating free-air free air temperature, temperature TA MIN NOM MAX UNIT 4.75 5 5.25 V -7 12 V 2 0 VCC 0.8 V -60 60 SN75LBC172A 0 70 SN65LBC172A -40 85 mA C electrical characteristics over recommended operating conditions PARAMETER VIK VO VOD(SS) TEST CONDITIONS Input clamp voltage II = -18 mA Y or Z, No load Open-circuit output voltage S Steady-state differential output out ut voltage magnitude g MIN TYP -1.5 -0.77 0 16 1.6 2 5 2.5 1 16 1.6 2 2.5 5 VOC(SS) Steady-state common-mode output voltage See Figure 3 2 VOC(SS) Change in steady-state common-mode output voltage between logic states See Figure 3 II Input current A, G, G Short circuit output current Short-circuit ICC Supply current V 1 With common-mode common mode loading, loading see Figure 2 -0.1 High-impedance-state output current V see Figure 1 RL = 54 , See Figure 1 IOZ IO(OFF) V 3 Change in steady-state differential output voltage between logic states VTEST = -7 7 V to 12 V, V See Figure 7 Output current with power off VI = 0 V or VCC, No load UNIT VCC VCC No load (open circuit) VOD(SS) IOS MAX 0.1 V 2.8 V -0.02 0.02 V -50 50 A -200 200 200 mA G at 0 V, G at VCC -50 50 VCC = 0 V All drivers enabled -10 10 VI = 0 V VI = VCC All drivers disabled 2.4 A A 23 1.5 mA All typical values are at VCC = 5 V and 25C. The minimum VOD may not fully comply with TIA/EIA-485-A at operating temperatures below 0C. System designers should take the possibly of lower output signal into account in determining the maximum signal transmission distance. 4 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN65LBC172A, SN75LBC172A QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVERS SLLS447B - OCTOBER 2000 - REVISED MAY 2003 switching characteristics over recommended operating conditions MIN TYP MAX tPLH tPHL Propagation delay time, low-to-high level output PARAMETER TEST CONDITIONS 5.5 8 11 ns Propagation delay time, high-to-low level output 5.5 8 11 ns tr tf Differential output voltage rise time 3 7.5 11 ns 3 7.5 11 ns tsk(p) tsk(o) Pulse skew |tPLH - tPHL| 0.6 2 ns 2 ns tsk(pp) tPZH Part-to-part skew tPHZ Propagation delay time, high-level-output-to-high impedance RL = 54 , CL = 50 pF, see Figure 4 Differential output voltage fall time Output skew Propagation delay time, high-impedance-to-high-level output See Figure 5 UNIT 3 ns 25 ns 25 ns tPZL Propagation delay time, high-impedance-to-low-level output See Figure 6 30 ns tPLZ Propagation delay time, low-level-output-to-high impedance 20 ns Output skew (tsk(o)) is the magnitude of the time delay difference between the outputs of a single device with all of the inputs connected together. Part-to-part skew (tsk(pp)) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same input signals, the same supply voltages, at the same temperature, and have identical packages and test circuits. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 5 SN65LBC172A, SN75LBC172A QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVERS SLLS447B - OCTOBER 2000 - REVISED MAY 2003 PARAMETER MEASUREMENT INFORMATION IOY Y II A Z IOZ VOD VOY 54 GND VI VOZ Figure 1. Test Circuit, VOD Without Common-Mode Loading 375 Y A Input VOD 60 Z VTEST = -7 V to 12 V 375 VTEST VI Figure 2. Test Circuit, VOD With Common-Mode Loading Y 27 A Z Signal Generator 27 CL = 50 pF 50 PRR = 1 MHz, 50% duty cycle, tr < 6 ns, tf < 6 ns, ZO = 50 Includes probe and jig capacitance Figure 3. VOC Test Circuit 6 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 VOC SN65LBC172A, SN75LBC172A QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVERS SLLS447B - OCTOBER 2000 - REVISED MAY 2003 Y A RL = 54 CL = 50 pF VOD Z Signal Generator 50 PRR = 1 MHz, 50% duty cycle, tr < 6 ns, tf < 6 ns, ZO = 50 Includes probe and jig capacitance 3V 1.5 V Input 0V tPLH tPHL 1.5 V 90% 0V 10% Output tr -1.5 V tf Figure 4. Output Switching Test Circuit and Waveforms POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 7 SN65LBC172A, SN75LBC172A QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVERS SLLS447B - OCTOBER 2000 - REVISED MAY 2003 PARAMETER MEASUREMENT INFORMATION Y S1 A 0 V or 3 V w Output Z Input Signal Generator CL = 50 pF G G 50 3V PRR = 1 MHz, 50% duty cycle, tr < 6 ns, tf < 6 ns, ZO = 50 Includes probe and jig capacitance 3-V if testing Y output, 0 V if testing Z output 3V 1.5 V Input 0V tPZH 0.5 V VOH 2.3 V 0V Output tPHZ Figure 5. Enable Timing Test Circuit and Waveforms, tPZH and tPHZ 8 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 RL = 110 SN65LBC172A, SN75LBC172A QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVERS SLLS447B - OCTOBER 2000 - REVISED MAY 2003 PARAMETER MEASUREMENT INFORMATION 5V RL = 110 Y S1 A 0 V or 3 V w Output Z Input Signal Generator CL = 50 pF G G 50 3V PRR = 1 MHz, 50% duty cycle, tr < 6 ns, tf < 6 ns, ZO = 50 Includes probe and jig capacitance 3-V if testing Y output, 0 V if testing Z output 3V 1.5 V Input 0V tPZL tPLZ 5V Output 2.3 V VOL 0.5 V Figure 6. Enable Timing Test Circuit and Waveforms, tPZL and tPLZ POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 9 SN65LBC172A, SN75LBC172A QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVERS SLLS447B - OCTOBER 2000 - REVISED MAY 2003 Y IO VI Z VTEST Voltage Source VTEST = -7 V to 12 V Slew Rate 1.2 V/s Figure 7. Test Circuit, Short-Circuit Output Current Y Z 100 VTEST 0V Pulse Generator 15 s Duration, 1% Duty Cycle 15 s 1.5 ms Figure 8. Test Circuit and Waveform, Transient Over-Voltage 10 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 -VTEST SN65LBC172A, SN75LBC172A QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVERS SLLS447B - OCTOBER 2000 - REVISED MAY 2003 TYPICAL CHARACTERISTICS DIFFERENTIAL OUTPUT VOLTAGE vs OUTPUT CURRENT DIFFERENTIAL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 2.5 3.5 VOD - Differential Output Voltage - V VOD - Differential Output Voltage - V 4 3 VCC = 5.25 V 2.5 VCC = 5 V 2 1.5 VCC = 4.75 V 1 0.5 0 0 20 40 60 80 IO - Output Current - mA VCC = 5.25 V 2 VCC = 5 V 1.5 VCC = 4.75 V 1 0.5 0 -60 100 -40 Figure 9 100 SUPPLY CURRENT (FOUR CHANNELS) vs SIGNALING RATE 8.5 I CC - Supply Current (Four Channels) - mA 144 8 Propigation Delay Time - ns 80 Figure 10 PROPAGATION DELAY TIME vs TEMPERATURE VCC = 5.25 V 7.5 VCC = 4.75 V 7 6.5 6 5.5 5 -40 -20 0 20 40 60 TA - Free-Air Temperature - C RL = 54 CL = 50 pF (Each Channel) 142 140 138 136 134 132 130 128 -20 0 20 40 T - Temperature - C 60 80 1 Figure 11 10 Signaling Rate - Mbps 100 Figure 12 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 11 SN65LBC172A, SN75LBC172A QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVERS SLLS447B - OCTOBER 2000 - REVISED MAY 2003 TYPICAL CHARACTERISTICS RL = 54 CL = 50 pF Figure 13. Eye Pattern, Pseudorandom Data at 30 Mbps APPLICATION INFORMATION TMS320F243 DSP (Controller) SN65LBC172A SN65LBC175A SPISIMO TMS320F241 DSP (Embedded Application) SPISIMO IOPA1 (Enable) SPISTE SPISTE IOPA1 IOPA2 SPICLK SPICLK IOPA0 (Handshake /Status) IOPA0 SPISOMI SPISOMI Figure 14. Typical Application Circuit, DSP-to-DSP Link via Serial Peripheral Interface 12 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN65LBC172A, SN75LBC172A QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVERS SLLS447B - OCTOBER 2000 - REVISED MAY 2003 MECHANICAL DATA DW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 16 PINS SHOWN 0.050 (1,27) 0.020 (0,51) 0.014 (0,35) 16 0.010 (0,25) M 9 0.419 (10,65) 0.400 (10,15) 0.010 (0,25) NOM 0.299 (7,59) 0.291 (7,39) Gage Plane 0.010 (0,25) 1 8 0-8 A 0.050 (1,27) 0.016 (0,40) Seating Plane 0.104 (2,65) MAX 0.012 (0,30) 0.004 (0,10) PINS ** 0.004 (0,10) 16 20 24 28 A MAX 0.410 (10,41) 0.510 (12,95) 0.610 (15,49) 0.710 (18,03) A MIN 0.400 (10,16) 0.500 (12,70) 0.600 (15,24) 0.700 (17,78) DIM 4040000 / D 01/00 NOTES: A. B. C. D. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). Falls within JEDEC MS-013 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 13 SN65LBC172A, SN75LBC172A QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVERS SLLS447B - OCTOBER 2000 - REVISED MAY 2003 MECHANICAL DATA N (R-PDIP-T**) PLASTIC DUAL-IN-LINE PACKAGE 16 PINS SHOWN PINS ** 14 16 18 20 A MAX 0.775 (19,69) 0.775 (19,69) 0.920 (23,37) 0.975 (24,77) A MIN 0.745 (18,92) 0.745 (18,92) 0.850 (21,59) 0.940 (23,88) DIM A 16 9 0.260 (6,60) 0.240 (6,10) 1 8 0.070 (1,78) MAX 0.035 (0,89) MAX 0.325 (8,26) 0.300 (7,62) 0.020 (0,51) MIN 0.015 (0,38) Gauge Plane 0.200 (5,08) MAX Seating Plane 0.010 (0,25) NOM 0.125 (3,18) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.430 (10,92) MAX 0.010 (0,25) M 14/18 PIN ONLY 4040049/D 02/00 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 (20-pin package is shorter than MS-001). 14 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. 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