Data Sheet
February 1999
LG1602 Decision Circuit
Features
■Operation up to 3 Gbits/s
■Good sensitivity to low input signals
■Low power diss ipation
■Surface-mount package
A
pp
lications
■SONET/SDH transmission systems
■Digital video transmission
■Digital test instruments
Functional Descri
p
tion
The LG1602 is a gallium arsenide (GaAs) decision
circuit. It features a sensitive broadband input ampli-
fier and a D-type flip-flop that retimes and regener-
ates an input data stream that is weakened by noise,
jitter, and intersymbol interference.
The LG1602 has complementary 50 Ω output buff-
ers.
dc feedback ensures input threshold control for input
levels as low as 25 mV, when using dc balanced
input data. The LG1602 is available in a hermetically
sealed 16-lead glass-metal surface-mount package.
5-7667(F)r.3
Fi
g
ure 1. LG1602 Functional Dia
g
ram
V+REF
V+IN
V–IN
V–REF
25 kΩ
110 pF
25 kΩ
110 pF
D
D
Q
V+OUT V–OUT
VSS
V–CLK
V+CLK
GND
50 Ω
50 Ω
2 pF
2 pF
50 Ω
50 Ω
Data Sheet
LG1602 Decision Cir cuit Febru ary 1999
2Lucent Technologies Inc.
Pin Information
12-3223(F).ar.2
Figure 2. Pin Diagram
Table 1. Pin Descriptions
Pin Symbol Name/Description
2V
+CLK Clock Input. Ma
y
be
g
rounded, if not used.
3V
–CLK Clock Input. Ma
y
be
g
rounded, if not used.
4V
SS dc Supply Voltage.
5V
–OUT Negative Data Output. ac couple or terminate with 50 Ω to GND.
6V
+OUT Positive Data Output. ac couple or terminate with 50 Ω to GND.
9V
–REF Data Negative Reference. B
y
pass to GND with 0.047
µ
F in series with 5 Ω.
10 V–IN Negative Data Input. ac couple with 0.047
µ
F.
11 V+IN Positive Data Input. ac couple with 0.047
µ
F.
12 V+REF Data Positive Reference. B
y
pass to GND with 0.047
µ
F in series with 5 Ω.
1, 15, 16,
Packa
g
e
Back
GND Ground. For optimum performance, packa
g
e back should contact board
g
round
plane.
7, 8, 13, 14 NC No Connection.
GND
VSS
1
2
3
4
V+REF
12
11
10
9
16 15 14 13
GND GND NC
5678
V–OUT V+OUT
NC
V+IN
V–IN
V–REF
NC NC
V+CLK
V–CLK
Data Sheet
February 1999 LG1602 Decision Circuit
3Lucent Technologies Inc.
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratin
g
s can cause permanent or latent dama
g
e to the device. These
are absolute stress ratin
g
s onl
y
. Functional operation of the device is not implied at these or an
y
other conditions in
excess of those
g
iven in the operational sections of the data sheet. Exposure to absolute maximum ratin
g
s for
extended periods can adversel
y
affect device reliabilit
y
.
Table 2. Absolute Maximum Ratings
Recommended Operating Conditions
Table 3. Recommended Operating Conditions
Handling Precautions
Although protection circuitry has been designed into this device, proper precautions should be taken to a void expo-
sure to electrostatic discharge (ESD) during handling and mounting. Lucent employs a human-body model (HBM)
and a charged-device model (CDM) for ESD-susceptibility testing and protection design evaluation. No industry-
wide standard has been adopted for the CDM. How ever, a standard HBM (resistance = 1500 Ω, capacitance =
100 pF) is widely used and, therefore, can be used for comparison purposes. The HBM ESD threshold presented
here was obtained by using these circuit parameters.
Table 4. ESD Threshold
Mounting and Connections
Certain precautions must be taken when usin
g
solder. For installation usin
g
a constant temperature solder, tem-
peratures of under 300 °C ma
y
be emplo
y
ed for periods of time up to 5 seconds, maximum. For installation with a
solderin
g
iron
(
batter
y
operated or nonswitchin
g
onl
y)
, the solderin
g
tip temperature should not be
g
reater than
300 °C and the solderin
g
time for each lead must not exceed 5 seconds.
Parameter Min Max Unit
Supply Voltage Range (VSS)0.5–7V
Power Dissipation — 1 W
Voltage (all pins) 0.5 VSS V
Clock Input (V+CLK, V–CLK
)
—±2V
V+REF – V+IN —±2V
V–REF – V–IN —±2V
Storage Temperature Range –40 125 °C
Operating Case Temperature Range 0 100 °C
Parameter Symbol Min Max Unit
Case Temper ature tCASE 075°C
Power Supply VSS –4.7 –5.7 V
HBM ESD Threshold
Device Voltage
LG1602 ≥200 V
Data Sheet
LG1602 Decision Cir cuit Febru ary 1999
4Lucent Technologies Inc.
Electrical Characteristics
Bit rate = 2.488 Mbits/s NRZ and data pattern = 223 – 1 PRBS, unless otherwise indicated. See Fi
g
ure 3 for the tim-
in
g
and si
g
nal levels and Fi
g
ure 5 for the test circuit, when usin
g
the TF1001A test fixture.
Note: Minimum and maximum values are testin
g
re
q
uirements. T
y
pical values are characteristics of the device
and are the result of en
g
ineerin
g
evaluations. T
y
pical values are for information purposes onl
y
and are not
part of the testin
g
re
q
uirements.
Parameter Symbol Conditions LG1602AXB LG1602BXB Unit
tCASE = 25 °C
VSS = –5.2 V tCASE = 0 °C—
75 °C
VSS = –4.9 V to
–5.5 V
Min Typ Max Min Typ Max
Maximum Bit Rate — BER = 10–9 3——
2.5 ——
GHz
Data Input Volta
g
e
|VH – <V>| + |<V> – VL|—t
R, tF ≤ 165 ps
(
20%—80%
)
200 —800 200 —900 mV
Data Input Sensitivit
y
—BER = 10
–9, limited clock
phase mar
g
in —20 ——20 —mV
Clock Input Volta
g
e
|VH – <V>| + |<V> – VL|—t
R, tF ≤ 85 ps
(
20%—80%
)
,
dut
y
c
y
cle = 50% ± 10% 500 —1000 200 —900 mV
Clock Phase Mar
g
in — — 250 360 — 250 360 — ps
Clock Phase Minimum t1 Data transition to ne
g
ative
ed
g
e of CLOCK IN ————
150 205 ps
Clock Phase Maximum t2 Data transition to ne
g
ative
ed
g
e of CLOCK IN — — — 455 510 —ps
Clock Phase Center tCData transition to ne
g
ative
ed
g
e of CLOCK IN —330 ——
330 —ps
Setup Time tSValid input data to ne
g
ative
ed
g
e of CLOCK IN —185 ——
185 205 ps
Hold T ime tHNe
g
ative ed
g
e CLOCK IN to
valid DATA IN —–73 ——
–73 –53 ps
Propa
g
ation Dela
y
tPD CLOCK IN ne
g
ative ed
g
e to
output transition —1200 ——
1200 —ps
Output Volta
g
e
(
VH – VL
)
— Outputs ac coupled
(
see
Fi
g
ure 5
)
500 600 —500 600 —mV
Output Transition Time — 20%—80%, outputs ac cou-
pled ——
100 ——
100 ps
Output Return Loss — 1 MHz—2 GHz, outputs ac
coupled —15 ——15 —dB
Data Input Return Loss — 100 kHz—300 kHz
0.3 MHz—1500 MHz
1.5 GHz—1.8 GHz
—
—
—
10
15
15
—
—
—
10
15
15
—
—
—
—
—
—
dB
dB
dB
Clock Input Return Loss — 2.4 GHz—2.6 GHz — 15 —15 ——dB
Power Suppl
y
Current — — — 115 ——
115 —mA
Thermal Resistance — Junction to case bottom — 20 ——20 —°C/W
Data Sheet
February 1999 LG1602 Decision Circuit
5Lucent Technologies Inc.
Electrical Characteristics
(
continued
)
5-7668(F)r.2
Figure 3. Timing Diagram
5-7669(F)r.2
Figure 4. Test Circuit
tPD
D0
DATA IN
CLOCK IN
DATA OUT
VH
<V>
VL
VH
<V>
VL
VH
0
VL
D1 D2
t1
D0
t2
2 pF
2 pF
50 Ω
50 Ω
3
2
1, 15, 16
GND
50 Ω
CLOCK
V+CLK
V–CLK
VSS
–
+
0.047 µF
5 Ω
4
–5.2 V
D
D
Q
65
V+OUT V–OUT
50 Ω50 Ω
≥0.047 µF≥0.047 µFCO UPLING CAPACITORS
OPTIONAL
25 kΩ
110 pF
V–REF
V–IN
0.1 µF
5 Ω
50 Ω
9
10
11
25 kΩ
50 Ω
12
V+IN
V+REF
110 pF
5 Ω
0.047 µF
50 Ω
0.047 µF
TF1001A FIXTURE BOUNDARY
CLOCK
Data Sheet
LG1602 Decision Cir cuit Febru ary 1999
6Lucent Technologies Inc.
Electrical Characteristics
(
continued
)
5-7670(F)r.1
Figure 5. Typical Performance
DATA IN
(10 mV/div)
DATA OUT
(400 mV/div)
TIME (100 ps/div)
Data Sheet
February 1999 LG1602 Decision Circuit
7Lucent Technologies Inc.
Outline Diagram
16-Pin, Glass-Metal, Surface-Mou n t Package
Dimensions are in inches.
12-3224(F)r.4
0.012 TYP
0.030 TYP
0.230 SQ REF
+
0.366 ± 0.007
0.005
DETAIL A
+
0.215 SQ
9
13
1
5
TOP
VIEW
0.060 MAX
0.000—0.004 0.020
0—4°
DETAIL A
R0.08
0.068
REF
Data Sheet
LG1602 Decision Cir cuit Febru ary 1999
8Lucent Technologies Inc.
Ordering Information
Device Code Package Temperature Comcode
(Ordering Number)
LG1602AXB Packaged on 16 mm tape and reel 0 °C to 75 °C 106385297
LG1602BXB Packaged in flat pack container 0 °C to 75 °C 106995715
TF1001A Test fixture — 10649758 9
Data Sheet
February 1999 LG1602 Decision Circuit
9Lucent Technologies Inc.
Notes
LG1602 Decision Cir cuit Preli minary Data Sheet
Intera ctive Ter mi n al Transmi ssion Convergence February 1999
Lucent Technologies Inc. reserves the right to make changes to the product(s) or information contained herein without notice. N o liability is assumed as a result of their use or application. No
rights under any patent accompany the sale of any such product(s) or information.
Copyright © 1999 Lucent Te chnologies Inc.
All Rights Reserved
Februar
y
1999
DS99-142HSPL
For additional information, contact
y
our Microelectronics Group Account Mana
g
er or the followin
g
:
INTERNET: http://www.lucent.com/micro
E-MAIL: docmaster@micro.lucent.com
N. AMERICA: Microelectronics Group, Luce nt Technolo
g
ies Inc., 555 Union Boulevard, Room 30L-15P-BA, Allentown, PA 18103
1-800-372-2447, FAX 610- 712-4106
(
In CANADA: 1-800-553-2448, FAX 610-712-4106
)
ASIA PACIFIC: Microelectronics Group, Lucent Technolo
g
ies Si n
g
apore Pte. Ltd., 77 Science Park Drive, #03-18 Cintech III, Sin
g
apore 118256
Tel. (65) 778 8833, FAX
(
65
)
777 7495
CHIN A: Micr oelec tro ni cs Group , Luc ent Techno l o
g
ies
(
China
)
Co., Ltd., A-F2 , 2 3/F, Zao Fon
g
Universe Buildin
g
, 18 00 Zhon
g
Shan Xi Roa d, Shan
g
hai
200233 P. R. China Tel. (86) 21 6440 0468, ext. 316, FAX
(
86
)
21 6440 0652
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g
ies Japan Ltd., 7-18, Hi
g
ashi-Gotanda 2-chome, Shina
g
awa-ku, Tok
y
o 141, Japan
Tel. (81) 3 5421 1600, FAX
(
81
)
3 5421 1700
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q
uests: MICROELECTRONICS GROUP DATALINE: Tel. (44) 1189 324 299, FAX
(
44
)
1189 328 148
Techni cal In
q
uiries: GERMANY: (49) 89 95086 0
(
Munich
)
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(
Ascot
)
,
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