74LVC162245A; 74LVCH162245A
16-bit transceiver with direction pin; 30 Ω series termination
resistors; 5 V tolerant input/output; 3-state
Rev. 7 — 11 February 2019 Product data sheet
1. General description
The 74LVC162245A; 74LVCH162245A are 16-bit transceivers with non-inverting 3-state bus
compatible outputs in both send and receive directions. Two send/receive (nDIR) inputs control
direction, and two output enable (nOE) inputs make cascading easy. The nOE inputs control the
outputs so that the buses are effectively isolated. This device can be used as two 8-bit transceivers
or one 16-bit transceiver.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied
to the outputs. These features allow the use of these devices as translators in mixed 3.3 V and 5 V
applications.
The 74LVCH162245A bus hold on data inputs eliminates the need for external pull-up resistors to
hold unused inputs.
Both HIGH and LOW output stages include 30 Ω series termination resistors to reduce line noise.
2. Features and benefits
•5 V tolerant inputs/outputs for interfacing with 5 V logic
•Wide supply voltage range from 1.2 V to 3.6 V
•CMOS low power consumption
•Multibyte flow-through standard pin-out architecture
•Low inductance multiple power and ground pins for minimum noise and ground bounce
•Direct interface with TTL levels
•Integrated 30 Ω termination resistors
•High-impedance when VCC = 0 V
•All data inputs have bus hold (74LVCH162245A only)
•Complies with JEDEC standard:
•JESD8-7A (1.65 V to 1.95 V)
•JESD8-5A (2.3 V to 2.7 V)
•JESD8-C/JESD36 (2.7 V to 3.6 V)
•ESD protection:
•HBM JESD22-A114F exceeds 2000 V
•MM JESD22-A115-B exceeds 200 V
•CDM ANSI/ESDA/Jedec JS-002 exceeds 1000 V
•Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Nexperia 74LVC162245A; 74LVCH162245A
16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state
3. Ordering information
Table 1. Ordering information
PackageType number
Temperature range Name Description Version
74LVC162245ADL
74LVCH162245ADL
-40 °C to +125 °C SSOP48 plastic shrink small outline package; 48 leads;
body width 7.5 mm
SOT370-1
74LVC162245ADGG
74LVCH162245ADGG
-40 °C to +125 °C TSSOP48 plastic thin shrink small outline package;
48 leads; body width 6.1 mm
SOT362-1
74LVC162245ADGV
74LVCH162245ADGV
-40 °C to +125 °C TSSOP48 [1] plastic thin shrink small outline package;
48 leads; body width 4.4 mm; lead pitch 0.4 mm
SOT480-1
[1] Also known as TVSOP48.
4. Functional diagram
1DIR
1B0
1B1
1B2
1B3
1B4
1B5
1B6
1B7
2B0
2B1
2B2
2B3
2B4
2B5
2B6
2B7
1A0
1A1
1A2
1A3
1A4
1A5
1A6
1A7
2A0
2A1
2A2
2A3
2A4
2A5
2A6
2A7
1OE
2DIR
2OE
001aaa789
Fig. 1. Logic symbol
74LVC_LVCH162245A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 7 — 11 February 2019 2 / 15
Nexperia 74LVC162245A; 74LVCH162245A
16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state
G3
G6
3EN1[BA]
6EN4[BA]
3EN2[AB]
6EN5[AB]
1A0
2A1
2A0
2A2
2A3
2A4
2A5
2A6
2A7
2B1
2B2
2B3
2B4
2B5
2B6
2B7
1OE
1DIR
001aaa790
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1B0
2B0
1B1
1B2
1B3
1B4
1B5
1B6
1B7
5
4
2
1
2OE
2DIR
Fig. 2. IEC logic symbol
to internal circuit
mna705
VCC
data input
Fig. 3. Bus hold circuit
74LVC_LVCH162245A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 7 — 11 February 2019 3 / 15
Nexperia 74LVC162245A; 74LVCH162245A
16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state
5. Pinning information
5.1. Pinning
74LVC162245A
74LVCH162245A
001aaa156
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1B0
1B1
GND
1A0
1A1
GND
1DIR 1OE
1B2
1B3
VCC
1B4
1B5
GND
1B6
1B7
2B0
2B1
GND
2B2
2B3
VCC
2B4
2B5
GND
2B6
2B7
2DIR
1A2
1A3
VCC
1A4
1A5
GND
1A6
1A7
2A0
2A1
GND
2A2
2A3
VCC
2A4
2A5
GND
2A6
2A7
2OE
Fig. 4. Pin configuration SOT370-1 (SSOP48), SOT362-1 (TSSOP48) and SOT480-1 (TSSOP48)
5.2. Pin description
Table 2. Pin description
Symbol Pin Description
1DIR, 2DIR 1, 24 direction control input
1B0 to 1B7 2, 3, 5, 6, 8, 9, 11, 12 data input/output
2B0 to 2B7 13, 14, 16, 17, 19, 20, 22, 23 data input/output
GND 4, 10, 15, 21, 28, 34, 39, 45 ground (0 V)
VCC 7, 18, 31, 42 supply voltage
1OE, 2OE 48, 25 output enable input (active LOW)
1A0 to 1A7 47, 46, 44, 43, 41, 40, 38, 37 data input/output
2A0 to 2A7 36, 35, 33, 32, 30, 29, 27, 26 data input/output
74LVC_LVCH162245A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 7 — 11 February 2019 4 / 15
Nexperia 74LVC162245A; 74LVCH162245A
16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state
6. Functional description
Table 3. Function table
Inputs[1] Outputs
nOE nDIR nAn nBn
L L nAn = nBn inputs
L H inputs nBn = nAn
H X Z Z
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage -0.5 +6.5 V
IIK input clamping current VI < 0 V -50 - mA
VIinput voltage [1] -0.5 +6.5 V
IOK output clamping current VO > VCC or VO < 0 V - ±50 mA
output HIGH or LOW [2] -0.5 VCC + 0.5 VVOoutput voltage
output 3-state [2] -0.5 +6.5 V
IOoutput current VO = 0 V to VCC - ±50 mA
ICC supply current - 100 mA
IGND ground current -100 - mA
Tstg storage temperature -65 +150 °C
Ptot total power dissipation Tamb = -40 °C to +125 °C [3] - 500 mW
[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[2] The output voltage ratings may be exceeded if the output current ratings are observed.
[3] Above 60 °C the value of Ptot derates linearly with 5.5 mW/K.
8. Recommended operating conditions
Table 5. Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
1.65 - 3.6 VVCC supply voltage
functional 1.2 - 3.6 V
VIinput voltage 0 - 5.5 V
output HIGH or LOW 0 - VCC VVOoutput voltage
output 3-state 0 - 5.5 V
Tamb ambient temperature in free air -40 - +125 °C
VCC = 1.2 V to 2.7 V 0 - 20 ns/VΔt/ΔV input transition rise and fall rate
VCC = 2.7 V to 3.6 V 0 - 10 ns/V
74LVC_LVCH162245A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 7 — 11 February 2019 5 / 15
Nexperia 74LVC162245A; 74LVCH162245A
16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state
9. Static characteristics
Table 6. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
-40 °C to +85 °C -40 °C to +125 °CSymbol Parameter Conditions
Min Typ [1] Max Min Max
Unit
VCC = 1.2 V 1.08 - - 1.08 - V
VCC = 1.65 V to 1.95 V 0.65VCC - - 0.65VCC - V
VCC = 2.3 V to 2.7 V 1.7 - - 1.7 - V
VIH HIGH-level input
voltage
VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V
VCC = 1.2 V - - 0.12 - 0.12 V
VCC = 1.65 V to 1.95 V - - 0.35VCC - 0.35VCC V
VCC = 2.3 V to 2.7 V - - 0.7 - 0.7 V
VIL LOW-level input
voltage
VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V
VI = VIH or VIL
IO = -100 μA;
VCC = 1.65 V to 3.6 V
VCC - 0.2 VCC - VCC - 0.3 - V
IO = -2 mA; VCC = 1.65 V 1.2 - - 1.05 - V
IO = -4 mA; VCC = 2.3 V 1.8 - - 1.65 - V
IO = -6 mA; VCC = 2.7 V 2.2 - - 2.05 - V
VOH HIGH-level output
voltage
IO = -12 mA; VCC = 3.0 V 2.2 - - 2.0 - V
VI = VIH or VIL
IO = 100 μA;
VCC = 1.65 V to 3.6 V
- - 0.2 - 0.3 V
IO = 2 mA; VCC = 1.65 V - - 0.45 - 0.65 V
IO = 4 mA; VCC = 2.3 V - - 0.6 - 0.8 V
IO = 6 mA; VCC = 2.7 V - - 0.4 - 0.6 V
VOL LOW-level output
voltage
IO = 12 mA; VCC = 3.0 V - - 0.55 - 0.8 V
IIinput leakage
current
VI = 5.5 V or GND;
VCC = 3.6 V
[2] - ±0.1 ±5 - ±20 μA
IOZ OFF-state output
current
VI = VIH or VIL;
VO = 5.5 V or GND;
VCC = 3.6 V
[2] [3] - ±0.1 ±5 - ±20 μA
IOFF power-off leakage
current
VI or VO = 5.5 V; VCC = 0.0 V - ±0.1 ±10 - ±20 μA
ICC supply current VI = VCC or GND; IO = 0 A;
VCC = 3.6 V
- 0.1 20 - 80 μA
ΔICC additional supply
current
per input pin; VI = VCC - 0.6 V;
IO = 0 A; VCC = 2.7 V to 3.6 V
- 5 500 - 5000 μA
CIinput capacitance VCC = 0 V to 3.6 V;
VI = GND to VCC
- 5.0 - - - pF
CI/O input/output
capacitance
VCC = 0 V to 3.6 V;
VI = GND to VCC
- 10 - - - pF
VCC = 1.65; VI = 0.58 V [4] [5] 10 - - 10 - μA
VCC = 2.3; VI = 0.7 V 30 - - 25 - μA
IBHL bus hold LOW
current
VCC = 3.0; VI = 0.8 V 75 - - 60 - μA
74LVC_LVCH162245A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 7 — 11 February 2019 6 / 15
Nexperia 74LVC162245A; 74LVCH162245A
16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state
-40 °C to +85 °C -40 °C to +125 °CSymbol Parameter Conditions
Min Typ [1] Max Min Max
Unit
VCC = 1.65; VI = 1.07 V [4] [5] -10 - - -10 - μA
VCC = 2.3; VI = 1.7 V -30 - - -25 - μA
IBHH bus hold HIGH
current
VCC = 3.0; VI = 2.0 V -75 - - -60 - μA
VCC = 1.95 V [4] [6] 200 - - 200 - μA
VCC = 2.7 V 300 - - 300 - μA
IBHLO bus hold LOW
overdrive current
VCC = 3.6 V 500 - - 500 - μA
VCC = 1.95 V [4] [6] -200 - - -200 - μA
VCC = 2.7 V -300 - - -300 - μA
IBHHO bus hold HIGH
overdrive current
VCC = 3.6 V -500 - - -500 - μA
[1] All typical values are measured at VCC = 3.3 V (unless stated otherwise) and Tamb = 25 °C.
[2] The bus hold circuit is switched off when VI > VCC allowing 5.5 V on the input terminal.
[3] For I/O ports the parameter IOZ includes the input leakage current.
[4] Valid for data inputs of bus hold parts only (74LVCH162245A). Note that control inputs do not have a bus hold circuit.
[5] The specified sustaining current at the data input holds the input below the specified VI level.
[6] The specified overdrive current at the data input forces the data input to the opposite input state.
10. Dynamic characteristics
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Fig. 7.
-40 °C to +85 °C -40 °C to +125 °CSymbol Parameter Conditions
Min Typ [1] Max Min Max
Unit
nAn to nBn; nBn to nAn;
see Fig. 5
[2]
VCC = 1.2 V - 12 - - - ns
VCC = 1.65 V to 1.95 V 1.5 6.6 16.0 1.5 18.4 ns
VCC = 2.3 V to 2.7 V 1.0 3.5 7.8 1.0 9.1 ns
VCC = 2.7 V 1.0 3.5 6.7 1.0 9.5 ns
tpd propagation
delay
VCC = 3.0 V to 3.6 V 1.0 2.9 5.7 1.0 8.5 ns
nOE to nAn, nBn; see Fig. 6 [2]
VCC = 1.2 V - 18 - - - ns
VCC = 1.65 V to 1.95 V 2.0 7.7 17.2 2.0 19.8 ns
VCC = 2.3 V to 2.7 V 1.5 4.3 9.4 1.5 10.9 ns
VCC = 2.7 V 1.5 4.6 8.5 1.5 9.5 ns
ten enable time
VCC = 3.0 V to 3.6 V 1.0 3.5 7.5 1.0 7.5 ns
nOE to nAn, nBn; see Fig. 6 [2]
VCC = 1.2 V - 10 - - - ns
VCC = 1.65 V to 1.95 V 2.8 4.6 11.0 2.8 12.7 ns
VCC = 2.3 V to 2.7 V 1.0 2.6 6.3 1.0 7.3 ns
VCC = 2.7 V 1.5 3.4 7.5 1.5 11.0 ns
tdis disable time
VCC = 3.0 V to 3.6 V 1.5 3.2 6.5 1.5 8.5 ns
74LVC_LVCH162245A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 7 — 11 February 2019 7 / 15
Nexperia 74LVC162245A; 74LVCH162245A
16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state
-40 °C to +85 °C -40 °C to +125 °CSymbol Parameter Conditions
Min Typ [1] Max Min Max
Unit
per input; VI = GND to VCC [3]
VCC = 1.65 V to 1.95 V - 10.4 - - - pF
VCC = 2.3 V to 2.7 V - 14.0 - - - pF
CPD power
dissipation
capacitance
VCC = 3.0 V to 3.6 V - 17.2 - - - pF
[1] Typical values are measured at Tamb = 25 °C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V and 3.3 V respectively.
[2] tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[3] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD × VCC
2 × fi × N + Σ(CL × VCC
2 × fo) where:
fi = input frequency in MHz; fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in Volts
N = number of inputs switching
Σ(CL × VCC
2 × fo) = sum of the outputs.
10.1. Waveforms and test circuit
mna477
nAn, nBn
input
nBn, nAn
output
tPHL tPLH
GND
VI
VM
VM
VOH
VOL
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 5. The input (nAn, nBn) to output (nBn, nAn) propagation delays
mna362
tPLZ
tPHZ
outputs
disabled
outputs
enabled
VY
VX
outputs
enabled
output
LOW-to-OFF
OFF-to-LOW
output
HIGH-to-OFF
OFF-to-HIGH
nOE input
VI
VOL
VOH
VCC
VM
GND
GND
tPZL
tPZH
VM
VM
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 6. 3-state enable and disable times
74LVC_LVCH162245A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 7 — 11 February 2019 8 / 15
Nexperia 74LVC162245A; 74LVCH162245A
16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state
Table 8. Measurement points
Supply voltage Input Output
VCC VMVIVMVXVY
1.2 V 0.5 × VCC VCC 0.5 × VCC VOL + 0.15 V VOH - 0.15 V
1.65 V to 1.95 V 0.5 × VCC VCC 0.5 × VCC VOL + 0.15 V VOH - 0.15 V
2.3 V to 2.7 V 0.5 × VCC VCC 0.5 × VCC VOL + 0.15 V VOH - 0.15 V
2.7 V 1.5 V 2.7 V 1.5 V VOL + 0.3 V VOH - 0.3 V
3.0 V to 3.6 V 1.5 V 2.7 V 1.5 V VOL + 0.3 V VOH - 0.3 V
VMVM
tW
tW
10 %
90 %
0 V
VI
VI
negative
pulse
positive
pulse
0 V
VMVM
90 %
10 %
tf
tr
tr
tf
001aae331
VEXT
VCC
VIVO
DUT
CL
RT
RL
RL
G
Test data is given in Table 9.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig. 7. Test circuit for measuring switching times
Table 9. Test data
Supply voltage Input Load VEXT
VCC VItr, tfCLRLtPLH, tPHL tPLZ, tPZL tPHZ, tPZH
1.2 V VCC ≤ 2 ns 30 pF 1 kΩ open 2 × VCC GND
1.65 V to 1.95 V VCC ≤ 2 ns 30 pF 1 kΩ open 2 × VCC GND
2.3 V to 2.7 V VCC ≤ 2 ns 30 pF 500 Ω open 2 × VCC GND
2.7 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω open 2 × VCC GND
3.0 V to 3.6 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω open 2 × VCC GND
74LVC_LVCH162245A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 7 — 11 February 2019 9 / 15
Nexperia 74LVC162245A; 74LVCH162245A
16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state
11. Package outline
UNIT A
1 A
2 A
3 b
p c D
(1) E
(1) e H
E L L
p Q Z y w v θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.4
0.2
2.35
2.20 0.25 0.3
0.2
0.22
0.13
16.00
15.75
7.6
7.4 0.635 1.4 0.25
10.4
10.1
1.0
0.6
1.2
1.0
0.85
0.40
8
0
o
o
0.18 0.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
SOT370-1 99-12-27
03-02-19
(1)
w M
b
p
D
H
E
E
Z
e
c
v M A
X
A
y
48 25
MO-118
24
1
θ
A
A
1
A
2
L
p
Q
detail X
L
(A )
3
pin 1 index
0 5 10 mm
scale
SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm SOT370-1
A
max.
2.8
Fig. 8. Package outline SOT370-1 (SSOP48)
74LVC_LVCH162245A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 7 — 11 February 2019 10 / 15
Nexperia 74LVC162245A; 74LVCH162245A
16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state
Fig. 9. Package outline SOT362-1 (TSSOP48)
74LVC_LVCH162245A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 7 — 11 February 2019 11 / 15
Nexperia 74LVC162245A; 74LVCH162245A
16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state
UNIT A1 A2 A3 bp D (1) E (2) HE Lp
c e L Q Z (1)
y w v θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION ISSUE DATE
99-12-27
03-02-18
IEC JEDEC JEITA
mm 0.15
0.05
0.95
0.85
0.23
0.13
0.20
0.09
9.8
9.6
4.5
4.3
6.6
6.2
0.4 0.4
0.3
8
0
o
o
0.07 0.08 0.2 1
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.7
0.5
SOT480-1 MO-153
0.25 0.4
0.1
w M
b
p
e
1 24
48 25
Z
pin 1 index θ
A
A
1
A
2
L
p
Q
detail X
L
(A )
3
H
E
E
c
v M A
X
A
D
y
0 2.5 5 mm
scale
TSSOP48: plastic thin shrink small outline package; 48 leads;
body width 4.4 mm; lead pitch 0.4 mm SOT480-1
A
max.
1.1
Fig. 10. Package outline SOT480-1 (TSSOP48)
74LVC_LVCH162245A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 7 — 11 February 2019 12 / 15
Nexperia 74LVC162245A; 74LVCH162245A
16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state
12. Abbreviations
Table 10. Abbreviations
Acronym Description
CDM Charged Device Model
CMOS Complementary Metal-Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic
13. Revision history
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74LVC_LVCH162245A v.7 20190211 Product data sheet - 74LVC_LVCH162245A v.6
Modifications: •The format of this data sheet has been redesigned to comply with the identity
guidelines of Nexperia.
•Legal texts have been adapted to the new company name where appropriate.
•Type numbers 74LVC162245ADGV and 74LVCH162245ADGV (SOT480-1) added.
•Package outline drawing SOT362-1 (TSSOP48) updated.
74LVC_LVCH162245A v.6 20111123 Product data sheet - 74LVC_LVCH162245A v.5
Modifications: •The format of this document has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•Legal texts have been adapted to the new company name where appropriate.
•Table 5, Table 6, Table 7 and Table 9: values added for lower voltage ranges.
74LVC_LVCH162245A v.5 20031208 Product specification - 74LVC_H162245A v.4
74LVC_H162245A v.4 19980217 Product specification - 74LVC162245A_
74LVCH162245A v.3
74LVC162245A_
74LVCH162245A v.3
19980217 Product specification - 74LVC162245A v.2
74LVC162245A v.2 19970801 Product specification - 74LVC162245A v.1
74LVC162245A v.1 19960108 - - -
74LVC_LVCH162245A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 7 — 11 February 2019 13 / 15
Nexperia 74LVC162245A; 74LVCH162245A
16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state
14. Legal information
Data sheet status
Document status
[1][2]
Product
status [3]
Definition
Objective [short]
data sheet
Development This document contains data from
the objective specification for
product development.
Preliminary [short]
data sheet
Qualification This document contains data from
the preliminary specification.
Product [short]
data sheet
Production This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
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Quick reference data — The Quick reference data is an extract of the
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Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
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given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
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In the event that customer uses the product for design-in and use in
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Notice: All referenced brands, product names, service names and
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74LVC_LVCH162245A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 7 — 11 February 2019 14 / 15
Nexperia 74LVC162245A; 74LVCH162245A
16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Ordering information....................................................2
4. Functional diagram.......................................................2
5. Pinning information......................................................4
5.1. Pinning.........................................................................4
5.2. Pin description............................................................. 4
6. Functional description................................................. 5
7. Limiting values............................................................. 5
8. Recommended operating conditions..........................5
9. Static characteristics....................................................6
10. Dynamic characteristics............................................ 7
10.1. Waveforms and test circuit........................................ 8
11. Package outline........................................................ 10
12. Abbreviations............................................................ 13
13. Revision history........................................................13
14. Legal information......................................................14
© Nexperia B.V. 2019. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 11 February 2019
74LVC_LVCH162245A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 7 — 11 February 2019 15 / 15