. 193 December 1990 Edition 1.0 co FUJITSU DATA SHEET MBM27C512-20-x CMOS 512kK-BIT UV EPROM CMOS 524,288 BIT UV ERASABLE AND ELECTRICALLY PROGRAMMABLE READ ONLY MEMORY The Fujitsu MBM27C512 is a high speed 524,288 bit static CMOS erasable and electrically reprogrammable read only memory (EPROM). It is especially well suited for application where rapid turn-around and/or bit pattern experimentation, and low-power consumption are important. CERAMIC PACKAGE DIP-28C-C01 A 28-pin dual-in line package with a transparent lid and 32-PadLeadless Chip Carrier (LCC) are used to package the MBM27C512. The transparent lid allows the user to exposethe device to ultraviolet fight in order to erase the memory bit pattern previously programmed. At the completion of erasure, a new pattern can then be written into the memory. The MBM27C512 is fabricated using CMOS double polysilicon gate technology with single transistor stacked gate cells. Itis organized as 65,536 words by 8 bits foruse in microprocessor applications. Single +5V operation greatly facilitates its use in systems. This specification is applied to "HW"-version. CERAMIC PACKAGE LCC-32C-F01 @ CMOS power consumption e Fast access time: Standby: 550U.W max. Active: 165mW max. 200ns max.(MBM27C512-20-X) PIN ASSIGNMENT Three-state output with OR-tie NF 65,536 words x 8 bits organization, capability ais (1 28 1] vcc fully decoded Ai2 (2 27 7 Ata Output Enable (QE) pin for simplified a7 [3 26 (1 ars Single location programming memory expansion as [4 25 7) as a5 (5 24 1 ag e Programmable utilizing the Quick @ Single +5V supply, +10% tolerance A4 C6 23 Dai Programming Algorithm a3 7 22 [1 Oewee @ Standard 28-pin Ceramic DIP: a28 1 ato e No clocks required (fully static (Suffix: Z) aiq93 200 Ce operation) Ao [J 10 19 0 o8 @ Standard 32-pad Ceramic LCC: oq11 18 Ol o7 e TTL compatible inputs/outputs (Suffix: TV) o2 12 17D o6 o3 13 16 [1 os GND [J 14 15 [7] 04 ABSOLUTE MAXIMUM RATINGS (see NOTE) Rating Symbol Value Unit Temperature under Bias TBIAS 50 to +95 C Storage Temperature TSTG -65 to +125 C ON aPutsOutputs Voltage with respect to VIN, VOUT | -0.6 to VCC 40.3 Vv Voltage on AQ with respect to GND VAQ9 ~0.6 to +13.5 v VPP Voltage with respect to GND VPP -0.6 to +14 v Supply Voltage with respect to GND Vcc 0.6 to +7 Vv NOTE: Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation shoutd be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Copyright 1990 by FUJITSU LIMITED This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit.MBM27C512-20-X Fig. 1 ~- MBM27C512 BLOCK DIAGRAM oO; Os o>} OUTPUT ENABLE & OUTPUT SE _] CHIP ENABLE LOGIC BUFFER Do DATA INPUT BUFFER & : PROGRAMMING CONTOROL |---| : oO; Oz, Yo COLUMN Ao : . COLUMN : s GATING Y DECODER As Ye3 X 512 x 1024 > CELL MATRIX Ae : ROW : Ais DECODER e X1023 Vpp Vee GND CAPACITANCE t,=25c, = 1mHz) Value Parameter Symbol Unit Min Typ Max Input Capacitance (Vin = OV, except OE/Ver) Cin - 4 6 pF OENVpe Input Capacitance (Vix = OV) Cine - - 20 pF Output Capacitance (Vour = OV) Cour > 8 12 pFMBM27C512-20-X FUNCTIONS AND PIN CONNECTIONS Function| Address input Data /O CE OENVpp Vee GND Mode Read Aw Dour Vi Viv 5V GND Output Disable Aw High-Z Vi Vin 5V GND Standby Don't Care High-Z Via Don't Care 5V GND Program Aw Dw Vin 12.5V 6V GND Program Verify Aw Dour Vit Viv 6V GND Program Inhibit Don't Care High-Z Vin 12.5V 6V GND RECOMMENDED OPERATING CONDITIONS (Referenced to GND) Value Parameter Symbol Unit Min Typ Max Voce Supply Voltage Voc 4.5 5.0 5.5 Vv Operating Temperature Ta -40 +85 C DC CHARACTERISTICS (Recommended operating conditions unless otherwise noted) Value Parameter Symbol Unit Min Typ Max Input Leakage Current (Vin = 5.5V) Hul 10 pA Output Leakage Current (Vour = 5.5V) Hol 10 pA Voc Standby Current (CE = Vin) Isp1 1 mA Voc Standby Current (CE = Voc +0.3V, lour = OMA) lose 1 100 pA Voc Active Current (CE = Vi, lour = OMA) lect 4 30 mA Vce Operation Current (f = 4MHz, lour = OmA) lees 10 30 mA Input High Voltage Vin 2.0 Veco +0.3 V Input Low Voltage Vic 0.1 0.8 V Output Low Voltage (lo. = 2.1mA) . Vor 0.45 V Output High Voltage (low = 400A) Vom 2.4 Vv Output High Voltage (lon = 100A) Vone2 Veco 0.7 VvMBM27C512-20-X Input Pulse Levels: Input Rise/Fall Times: Output Load: Timing Measurement Reference Levels: 0.45V to 2.4V <20ns 0.8V and 2.0V for inputs 0.8V and 2.0V for outputs 1 TTL gate and C, = 100pF Fig. 2 AC TEST CONDITIONS (INCLUDING PROGAMMING) 7 lL 4, AC CHARACTERISTICS (Recommended operating conditions unless otherwise noted) MBM27C512-20-X Parameter Symbol Unit Min Typ Max Address Access Time*! tace 200 ns CE to Output Delay toe 200 ns OE to Output Delay*! toe 70 ns Address to Output Hold ton 0 ns Output Enable High to Output Float*? tor 0 60 ns Notes: *1 OF may be delayed up to tacctoe after the falling edge of CE without impact on tacc. *2 tor is specified from OE or CE, whichever occurs first. Output Float is defined as the point where data is no longer driven. OPERATION TIMING DIAGRAM Vin -_ ADDRESS ADDRESS VALID 7 CE Vin - Vi = toe >4 tor Vin - OE J NX ' le toc > ton _ ma V po__| taco oum High-Z 1/4h, > High-Z OUTPUT Vo" KS VALID OUTPUT 277segnnseerrpss Ss ER = sree reel SLE stn ASME SI ARN tEAM I Raab abn SO EO a 8 oo: shauenax capntasanccasnanatintt Ee Sr sone set Ss sepconciitanettt MBM27C512-20-X PROGRAMMING/ERASING INFORMATION PROGRAMMING Upon delivery from Fujitsu, or after each erasure (see Erasure section), the MBM27C512 has all 524,288 bits in the "1", or high state. "O's" are loaded into the MBM27C512 through the procedure of programming. The MBM27C512 is programmed with a fast programming algorithm designed by Fujitsu called Quick Pro. The program- ming mode is entered when +12.5V and +6V are applied to Vpp and Vec respec- tively, and CE is Vin. AO. 1piF capacitor be- tween Vpp and GND is needed to prevent excessive voltage transients which could damage the device. The address to be programmed is applied to the proper ad- dress pins. The 8 bit data pattern to be written is placed on the respective data output pins. The voltage levels should be standard TTL levels. When both the ad- dress and data are stable, a 1 ms pro- gramming pulse is applied to CE andatter ERASURE In order to clear all locations of their pro- grammed contents, it is necessary to ex- pose the MBM27C512-W to an ultraviolet light source. A dosage of 15 W-seconds/ cm? is required to completely erase an MBM27C512. This dosage can be ob- tained by exposure to an ultraviolet lamp (wavelength of 2537 Angstroms (A)) with intensity of 12000nW/cm2 for 15 to 21 ELECTRONIC SIGNATURE The MBM27C512 has electronic signature mode which is intended for use by pro- gramming equipment for the purpose of automatically matching the device to be programmed with its corresponding pro- that one additional pulse which is 3 times as wide as previous pulse is applied to CE to accomplish the programming. Procedure of Quick Programming (Refer to the attached flowchart.) 1) Set the start address (=G) at the ad- dress pins. 2) Set Voc = 6V, Vep = 12.5V and CE = Vin. 3) Clear the programming pulse counter (Xe-0). 4) Input data to respective pins. 5) Apply ONE Programming pulse (tew = ims Typ.) to CE. 6) Increment the counter (XX+1). 7) Compare the number (=X) of applied programming pulse with 25 and then verify the programmed data. If pro- grammed data is verified, go to the next step regardless of X value. If X = 25 and programmed data is not verified, the device fails. If X<25 and programmed data is not verified, go back to the step minutes. The MBM27C512 should be about one inch from the source and all fil- ters should be removed from the UV light source prior to erasure. It is important to note that the MBM27C512 and similar devices, will erase with light sources having wave- lengths shorter than 40004. Although era- sure time will be much longer than with UV gramming algorithm. The electronic signature is activated when +12V is applied to address line Ag (pin 24) of the MBM27C512. Two identifier bytes 5). 8) Apply one additional wide programming pulse to CE (3X ms). 9) Compare the address with an end ad- dress (=N). If the programmed address is the end address, proceed to the next step. If not, increment the address (G G+1) and then go to the step 3) for the next address. 10) Set Vcc = Vep = 5V. 11) Verify the all programmed data. If the verification succeeds, the program- ming completes. If any programmed data is not the same as original data, the device fails. A continuous TTL low level should not ap- ply to CE input pin during the program mode (Vee = 12.5V and Vee = 6V) because it is required that one programming pulse width does not exceed 78.75 ms at each address. source at 2537/, nevertheless the expo- sure to fluorescent light and sunlight will eventually erase the MBM27C512, and exposure to them should be prevented to realize maximum system reliability. If used in such an environment, the package win- dows should be covered by an opaque la- bel or substance. are readed out from the outputs by togging address line Ao (pin 10) from Vix. to Vi. The address lines from A; to Ai3 must be hold at Vi to keep the electronic signature mode. See the table below. Ao on Q2 O3 Os Os O6 O, Os Definition Vic 0 0 1 0 0 0 0 0 Manufacture Vin 1 1 0 0 0 1 1 1 Device Note: Ag = 12V +0.5V Ay thru Ag = Ayo thru Ais = CE = OE = Vy Awa = Ais = Either Vic or Vin. gugnasronoenaniaransonanhonss SEERMBM27C512-20-X PROGRAMMING/ERASING INFORMATION (Continued) PROGRAMMING WAVEFORM tas tan Vin - ADDRESS Vi ] | tos tou tov tor tos tou pata V#/Vou - DATA IN STABLE cial DATA IN STABLE Vivo. 7 1 | ] 1 toes toen tvr tear _ Vpp = OEVee pp c Vi 7 toes tew ces toes tapw _ Vie cE \ ] A 7 NAAN alee alae oe racsncelsartenscveseeceneseecacane ee ee ve mis sees o ze EA chedeeeeceetesceteeeeetcctettatc tele terete tete ee ae MBM27C512-20-X DC CHARACTERISTICS (Ta = 2545C, Voc"! = 6V40.25V, Vpp*? = 12.5V+0.3V) Value Parameter Symbol Unit Min Typ Max Input Leakage Current Hu 10 pA (Vin = 6.25V/0.45V) Vee Supply Current During Programming Pulse lep 50 mA (CE = Vi) Voc Supply Current lec 30 mA Input Low Level Vit 0.1 0.8 Vv input High Level Vin 2.0 Voc +0.3 V Output Low Voltage During Verify Vow 0.45 V (lo. = 2.1 mA) Output High Voltage During Verify Vou 24 Vv (lon = -400pA) Note: *1 Vcc must be applied either coincidently or before Vpp and removed either coincidently or after Vep. *2 Vpp must not be 13 volts or more including overshoot. Permanent device damage may occur if the device is taken out or put into socket remaining Vpp = 12.5 volts. Also, during CE = Vil, Vee must not be switched from 5 to 12.5 volts or vice-versa.MBM27C512-20-X PROGRAMMING/ERASING INFORMATION (Continued) AC CHARACTERISTICS (Ta = 2545C, Voc = 6VL25V, Vo = 12.5V10.3V) Value Parameter Symbol Unit Min Typ Max Address Setup Time tas 2 ps Chip Enable Setup Time tcEs 2 ps Output Enable Setup Time tOES 2 ps Data Setup Time tos 2 ps Vcc Setup Time tvs 2 ps : Address Hold Time tAH 2 ps - Data Hoid Time tDH 2 ps Output Enable Hold Time tOEH 2 ps Vpp Recovery Time tva 2 ps Chip Enable to Data Valid tov 1 ps Output Disable to Output Float Delay tor 0 130 ns Ver Program Pulse Rise Time tPRT 50 ns Programming Pulse Width tpw 0.95 1 1.05 ms Additional Programming Pulse Width taPw 2.85 78.75 msMBM27C512-20-X PROGRAMMING FLOWCHART Voc =6V40.25V OE/Vee = 12.540.3V G : Start Address N : Stop Address X : Counter Value Address = G Maximum 105ms/Byte y 1 Mimimum 3.8ms/Byte DEN 13.5V X<0 F Apply 1 Prog. Pulse(ims) -< ' X X+1 gente stant ge sa scosecon se eee es Ss me Apply Additional Programming Pulse (3Xms) } Address +1 Address = N? Veco = 5.0V Compare All ByteMBM27C512-20-X PACKAGE DIMENSIONS Standard 32-pad Ceramic LCC (Suffix: TV) -360(9.14) TYP 32-PAD CERAMIC (FRIT SEAL) LEADLESS CHIP CARRIER (CASE No.: LCC-32C-F01) *Shape of PIN NO.1 INDEX: Subject to change without notice. 6) 1988 FUJITSU LIMITED C32017S-2C = *PIN NO. 1 | INDEX | C.015(0.38) TYP 7 LOOT aa Toy 100(2.54)REF } - Co fo py. i: 7 o a) Cy | o E /*PIN NO. 1 a | +.010 INDEX 4 .400(10.16) -295(7.49) 580_'o05 | R.oosio.20Tve by co TYP | DIA REF (13.970-28) | |_| (32PLCs) NS Cy 050.006 _4g0(11.68) .025+.005 - rd (1.2720.18) Typ = (0.6440.13)T YP} = a TYP 4 rE Sto | Z| | c.040(1.02)TvP_ > [i] GG] GE) | . ora (3PLCS) 0502.006 | 450 (1,270.15) ben fot [ae OASU1TAITYP ~T] tye | 0451.14) TP (17.43 943) | [,.070(1.78)TYP 300(7.62) (075(1.91)TYP .130(3.30)MAX TYP Dimension in inches and (millimeters) 10MBM27C512-20-X PACKAGE DIMENSIONS (Continued) Standard 28-pin Ceramic DIP (Suffix: Z) 28-LEAD CERAMIC (CERDIP WITH TRANSPARENT LID) DUAL IN-LINE PACKAGE (CASE No.: DIP-28C-C01) A sees 1 rt oc dd a >) ed ea _ > r r 4 7 R .025(0.64) REF S) .350(8.89)DIA .600(15.24) TYP TYP, | LL ) TT ty tClyrtsy Cy tyr tT tty ts tae er Co Td +.050 +1.27 1.450" '97.,(36.83_ 934) 1025"0-10, - =| }-.100(2.54)MAX 99.05 | .230(5.84) MAX .134+.014 (3.40+0.36) .100+.010 - .052+.010 .032(0.81) 0397-018 (2.54+0.25) (1.32+0.25) TYP \ lo ae Soe we 0.81- 1.300(33.02) REF +005 -0.30! : ~-003 Dimensions in +0.13) inches and (miltimeters) (0.46 698 611988 FUJITSU LIMITED 0280078S-3C All Rights Reserved. Circuit diagrams utilizing Fujitsu products are included as a means of illustrating typical semiconductor applications. Complete Information sufficient for construction purposes is not necessarily given. The Information contained in this document has been carefully checked and is believed to be reliable. However, Fujitsu assumes no responsibility for inaccuracies. . The Information contained in this document does not convey any license under the copyrights, patent rights or trademarks claimed and owned by Fujitsu. Fujitsu reserves the right to change products or specifications without notice. No part of this publication may be copied or reproduced in any form or by any means, or transferred to any third party without prior written consent of Fujitsu. 11