International Rectifier HEXFET Power MOSFET @ Surface Mount @ Available in Ta Dynamic dv/dt Repetitive Avalanche Rated @ P-Channel Fast Switching @ Ease of Paralleling Description Third Generation HEXFETs from International Rectifier provide the designer with the best combination of fast switching, ruggedized device design, low PD-9.920 IRF9630S pe & Reel Rating Voss = -200V Rps(on) = 0.802 Ip = -6.5A on-resistance and cost-effectiveness. The SMD-220 is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The SMD-220 is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. SMD-220 Absolute Maximum Ratings Parameter Max. Units Ip @ Te = 28C Continuous Drain Current, Vas @ -10 V 6.5 ID @ Tc = 100C | Continuous Drain Current, Ves @ -10 V -4.0 A Ibm Pulsed Drain Current -26 Pp @ Tc =25C | Power Dissipation 74 Ww Po @ Ta= 25C | Power Dissipation (PCB Mount)** 3.0 Linear Derating Factor 0.59 W ro | Linear Derating Factor (PCB Mount)** 0.025 Vas Gate-to-Source Voltage 20 Vv | Eas Single Pulse Avalanche Energy @ 500 mJ lar Avalanche Current 6.4 A Ear Repetitive Avalanche Energy 7A mJ dv/dt Peak Diode Recovery dv/dt_ @ 6.0 - Vins Ty, Tsta Junction and Storage Temperature Range -65 to +150 C Soldering Temperature, for 10 seconds 300 (1.6mm from case) Thermal Resistance Parameter Min. Typ. Max. Units Rac Junction-to-Case 1.7 Roga Junction-to-Ambient (PCB mount)** _ _ 40 C/W Resa Junction-to-Ambient _ _ 62 ** When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994, 377IRF9630S Electrical Characteristics @ Ty = 25C (unless otherwise specified) Parameter Min. | Typ. | Max. | Units Test Conditions Viprypss Drain-to-Source Breakdown Voltage -200 | V_| Vas=0V, ip=-250uA AV eryoss/ATy| Breakdown Voltage Temp. Coefficient | -0.24| | VPC | Reference to 25C, Ip=-imA Roston) Static Drain-to-Source On-Resistance _ | 0.80 | Q | Ves=-10V, Ip=-3.9A @ Vesith) Gate Threshold Voltage +2.0 _ -4.0 V__ | Vos=Vas, Ip=-250A Cts Forward Transconductance 2.8 _ _ S| Vos=-50V, Ip=-3.9A @ ; _ | -100 Vps=-200V, Ves=0V Ipss Drain-to-Source Leakage Current 500 HA Vos=-160V, Ves=0V. T= 125C lass Gate-to-Source Forward Leakage _ | -100 nA Veg=-20V Gate-to-Source Reverse Leakage _ _ 100 Vas=20V Qg Total Gate Charge _ _ 29 Ip=-6.5A Qgs Gate-to-Source Charge | | 54 | nC | Vpge-160V Qoa Gate-to-Drain ("Miller") Charge _ _ 15 Vas=-10V See Fig. 6 and 13 @ taon) Turn-On Delay Time _ 12 _ Vpp=-100V t Rise Time _ 27 = ns {p=-6.5A ta(om) Turn-Off Delay Time - 28 _ Re=12Q ti Fall Time 24 _ Rp=15Q See Figure 10 Lo Internal Drain Inductance _ 45 e Ate gene ) nH | from package (es Ls Internal Source Inductance |75/) and center of ay die contact Ciss Input Capacitance | 700 | Ves=0V Coss Output Capacitance | 200| PF | Vps=-25V Crss Reverse Transfer Capacitance _ 40 f=1.0MHz See Figure 5 Source-Drain Ratings and Characteristics Parameter Min. | Typ. | Max. | Units Test Conditions Is Continuous Source Current _ | 65 MOSFET symbol D (Body Diode) A showing the Ism Pulsed Source Current _ _ 26 integral reverse a (Body Diode) p-n junction diode. 8 Vsp Diode Forward Voltage _ _ 6.5 V_ | Ty=25C, Ig=-6.5A, Ves=0V @ tre Reverse Recovery Time | 200 | 300 ; ns | Ty=25C, Ir=-6.5A Qe Reverse Recovery Charge | 19 | 29 | pC | di/dt=100A/s @ ton Forward Turn-On Time Intrinsic turn-on time is neglegible (turn-on is dominated by Ls+Lp) Notes: @ Repetitive rating; pulse width limited by Isps-6.5A, di/dts120A/us, Voo<V(BR)DSs, max. junction temperature (See Figure 11) TJsS150C Vop=-5O0V, starting Tj=25C, L=17mH Pulse width < 300 ps; duty cycle <2%. Re=259, las=-6.5A (See Figure 12)IRF9630S 404 3 oe a a oa x <= = 2 & 100 2 g g a a 6 6 20us WIDTH 20us WIDTH Te = 25C To = 150C son! jo-1 son! so! to} -Vps, Drain-to-Source Voltage (volts) -Vps, Drain-to-Source Voltage (volts) Fig 1. Typical Output Characteristics, Fig 2. Typical Output Characteristics, Tc=25C Tc=150C 3.0 oO o Cc sg 2 2.5 = n g & s = O ~?o < 2 58 5 6015 & Zz gs 1.0 a a a z 8 0.5 Vpg = ~S0V B 20us PULSE WIDTH bo Ves = -10V 4 40 -60 -40 -20 0 20 40 60 80 100 120 140 160 -Vgs, Gate-to-Source Voltage (volts) Ty, Junction Temperature (C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature 379IRF9630S 1200 20 46 800 12 600 400 Capacitance (pF) -Vag, Gate-to-Source Voltage (volts) SEE FIGURE 13 1 30 -Vpg, Drain-to-Source Voltage (volts) Qe, Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs. Drain-to-Source Voltage Gate-to-Source Voltage 103 5 OPERATION IN THIS AREA LIMITED Oo YR Q Os (GN} & 2 $ Q 102 A a 5 2 6 5 2 c = 5 10 oa 5 @ & 2 2 o a 3 a4 a 7 Y A Tes25C ~ 2 Ty=150C 1 Ves = OV SINGLE PUL 10 0.5 1.5 5 3.5 45 oT 2 5 4 2 5 490 2 5 492 2 5 403 -Vgp, Source-to-Drain Voltage (volts) -Vps, Drain-to-Source Voltage (volts) Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area Forward Voltage 380-Ip, Drain Current (Amps) IRF9630S D Vbs D.U.T. y L- 1 Yop )t-10V Pulse Width < tus Duty Factor < 0.1% a Fig 10a. Switching Time Test Circuit tafon) tr tagotty tt Ves 10% 28 50 75 400 125 150 90% Tc, Case Temperature (C) Vps Fig 9. Maximum Drain Current Vs. Fig. 10b. Switching Time Waveforms Case Temperature fe Thermal Response (Zgjc) mL t po} (THERMAL RESPONSE) tte NOTES: 4. DUTY FACTOR, D=t1/t2 2. PEAK Ty3Poy x Zthjc + Te SINGLE PULSE 10 105 104 197% 102 0.4 1 10 t;, Rectangular Pulse Duration (seconds) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 381IRF9630S Vary tp to obtain Vos >j required las a a 3 tp 0.010 Fig 12a. Unclamped Inductive Test Circuit a a lag Eas, Single Pulse Energy (mJ) Vps 0 25 50 75 100 125 150 Starting Ty, Junction Temperature(C) Fig 12c. Maximum Avalanche Energy Fig 12b. Unclamped Inductive Waveforms Vs. Drain Current Current Regulator sovi> oS | Gas +- Q@an 4 Va Charge Iq . lo Gurrent Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit Appendix A: Figure 14, Peak Diode Recovery dv/dt Test Circuit - See page 1506 Appendix B: Package Outline Mechanical Drawing See page 1507 Appendix C: Part Marking Information See page 1515 International Appendix D: Tape & Reel Information - See page 1519 Rectifier 382