FDS9933A
FDS9933A Rev . C
FDS9933A
Dual P-Channel 2.5V Specified PowerTrench MOSFET
General Description
These P-Channel 2.5V specified MOSFETs are produced
using Fairchild Semiconductor's advanced PowerTrench
process that has been especially tailored to minimize the
on-state resistance and yet maintain low gate charge for
superior switching performance.
November 1998
Features
-3.8 A, -20 V. RDS(on) = 0.075 @ VGS = -4.5 V
RDS(on) = 0.105 @ VGS = -2.5 V.
Low gate charge ( 7nC typical ).
Fast switching speed.
High performance trench technology for extremely
low RDS(on).
High power and current handling capability .
1998 Fairchild Semiconductor Corporation
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol Parameter FDS9933A Units
VDSS Drain-Source Voltage -20 V
VGSS Gate-Source Voltage ± 8V
IDDrain Cu rrent - Continuous
(
Note 1a
)
-3.8 A
- Pulsed -20
Power Dissipation for Dual Operation 2.0
Power Dissipation for Sin
g
le Operation
(
Note 1a
)
1.6
(
Note 1b
)
1.0
PD
(
Note 1c
)
0.9
W
TJ, Tstg O perating and Storage Junction Temperature Range -55 to +150 °C
Thermal Characteristics
RθJA Ther ma l Resistance, Junction-to-Ambient (Note 1a) 78 °C/W
RθJC Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
FDS9933A FDS9933A 13’’ 12mm 2500 units
Applications
Load switch
DC/DC converter
Motor drives
1
5
7
8
2
3
4
6
S1
D1
S2
G1
SO-8
D2
D2
D1
G2
pin 1
FDS9933A
FDS9933A Rev . C
DMOS Electrical Characteristics TA = 25°C unless otherwise noted
BVDSS Drain-Source Break down Voltage VGS = 0 V, ID = -250 µA-20 V
∆ΒVDSS
TJ
Breakdown Voltage Tem perature
Coefficient ID = -250 µA, Referenced to 25°C-16mV/
°C
IDSS Zero Gate Voltage Drain Current VDS = -16 V, VGS = 0 V -1 µA
IGSSF Gate-Body Leakage, Forward VGS = 8 V, V DS = 0 V 100 nA
IGSSR Gate-Body Leakage, Reverse VGS = -8 V, VDS = 0 V -100 nA
VGS(th) Gate Threshold V ol t age VDS = VGS, ID = -250 µA -0.4 -0.8 -1.5 V
VGS(th)
TJ
Gate Threshold Vol tage
Temperature Coeff i ci ent ID = -250 µA, Referenc ed to 25°C2.5mV/
°C
RDS(on) Stat i c Drain-Source
On-Resistance VGS = -4.5 V, ID = -3.8 A
VGS = -4.5 V, ID = -3.8 A, TJ = 125°C
VGS = -2.5 V, ID = -3.3 A
0.058
0.086
0.084
0.075
0.12
0.105
ID(on) On-Stat e Drai n Current VGS = -4.5 V, VDS = -5.0 V -10 A
gFS Forward Transconductance VDS = -4.5 V, ID = -3.8 A 10 S
Ciss Input Capacit anc e VDS = -10 V, VGS = 0 V, f = 1.0 M Hz 600 pF
Coss Output Capacitance 175 pF
Crss Reverse Transfer Capacitance 80 pF
td(on) Turn-On Delay Time VDD = -5 V, ID = -0.5 A, 6 12 ns
trTurn-On Rise Time VGS = -4.5 V, RGEN = 6.0 918ns
td(off) Turn-Off Delay Time 31 50 ns
tfTurn-Off Fall Time 28 42 ns
QgTotal Gate Charge VDS = -10 V, ID = -3.8 A, 7 10 nC
Qgs Gate-Source Charge VGS = -4.5 V 1.3 nC
Qgd Gate-Drain Charge 2 nC
ISMaximum Continuous Drai n-Source Diode Forward Current -1.3 A
VSD Drain-Source Di ode Forward
Voltage VGS = 0 V, I S = -1.3 A (Note 2) -0.75 -1.2 V
Dynamic Characteristics
Switching Characteristics (Note 2)
Off Characteristics
On Characteristics (Note 2)
Drain-Source Diode Characteristics and Maximum Ratings
Symbol Parameter Test Conditions Min Typ Max Units
Notes:
1: RθJA is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mou nting surface of
the drain pins. RθJC is guaranteed by design while RθJA is determined by the user's board design.
Scale 1 : 1 on letter size paper
2: Pulse Test: Pulse Width 300 µs, Duty Cycle 2.0%
a) 78° C/W when
mounted on a 0.5 in2
pad of 2 oz. copper.
b) 125° C/W when
mounted on a 0.02 in2
pad of 2 oz. copper.
c) 135° C/W when
mounted on a 0.003 in2
pad of 2 oz. copper.
FDS9933A
FDS9933A Rev . C
Figure 1. On-Region Characteristics. Figure 2. On-Resistance V ariation with
Drain Current and Gate Voltage.
Figure 3. On-Resistance V ariation
withTemperature. Figure 4. On-Resistance V ariation with
Gate-to-Source Voltage.
Figure 5. T ransfer Characteristics. Figure 6. Body Diode Forward V oltage
V ariation with Source Current
and Temperature.
T ypical Characteristics (continued)
012345
0
5
10
15
20
- V , DRAIN-SOURCE VOLTAGE (V)
- I , DRAIN-SOURCE CURRENT (A)
DS
D
-2.0V
-2.5V
-3.0V
V =-4.5V
GS
-3.5V
-1.5V
0 4 8 121620
0.04
0.06
0.08
0.1
0.12
- I , DRAIN CURRENT (A)
DRAIN-SOURCE ON-RESIST A NCE
D
V = -2 .0V
GS
R , NORMALIZED
DS(ON )
-4 .5V
-2 .5V
-3 .5V
-3 .0V
11.522.53
0
2
4
6
8
10
- V , GATE T O SOUR CE VOLTAGE (V)
- I , DRAIN CURRENT (A)
V = -5V
DS
GS
D
T = -55°C
J125°C
25°C
0 0.2 0.4 0.6 0.8 1 1.2
0.0001
0.001
0.01
0.1
1
10
- V , BO DY DIO DE FO RWARD VOLTAG E (V)
-I , REVERSE DRAIN CURRENT (A)
25 °C
-55 °C
V = 0V
GS
SD
S
T = 125°C
J
-50 -25 0 25 50 75 100 125 150
0.6
0.8
1
1.2
1.4
1.6
T , JU N CT ION TEMPER ATU RE ( ° C)
DRA I N-S OURCE ON- RESI STAN CE
J
R , NORMALIZED
DS(ON)
V = -4.5V
GS
I = -3.8A
D
12345
0
0.05
0.1
0.15
0.2
0.25
- V , GATE TO SOURCE VOLTAGE (V)
GS
R , ON-RESISTANCE (OHM)
DS(ON)
25°C
I = -2.0A
D
T = 125°C
J
FDS9933A
FDS9933A Rev . C
Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.
Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.
Typical Characteristics (continued)
0.1 0.2 0.5 1 2 5 10 20
50
100
200
500
1000
2000
-V , D R AIN TO SOU R CE VOL TAGE (V)
CAPACIT ANCE (p F )
DS
C
iss
f = 1 MHz
V = 0 V
G S
C
oss
C
rss
0246810
0
1
2
3
4
5
Q , GAT E CHA RGE (nC)
-V , GATE - SOURCE V OLTAG E (V )
g
GS
V = -5 V
DS
-15V
I = -3 .8 A
D
-10V
0.1 0.3 1 2 5 10 30
0.01
0.05
0.5
3
10
50
- V , DRAIN- SOURCE VOL TAGE ( V)
- I , DRAIN CURRENT (A)
RD S(ON ) LI MIT
D
A
DC
DS
1s
100ms
10ms
1ms
10s
V = -4. 5V
SINGLE PULSE
R = 135°C/ W
T = 2 5 °C
θ
JA
GS
A
100us
0.01 0.1 0.5 10 50 100 300
0
5
10
15
20
25
30
SIN GL E PUL SE TI ME ( SEC)
POWE R (W )
SING LE PUL SE
R =13 5°C/W
T = 25 °C
θ
JA
A
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient themal response will change depending on the circuit board design.
0.0001 0.001 0.01 0.1 1 10 100 300
0.001
0.002
0.005
0.01
0.02
0.05
0.1
0.2
0.5
1
t , TIME (sec)
T RANSIENT THE RM AL RE SISTA NCE
r (t), NORMALIZED EFFEC TIVE
1
S i n g l e P u l s e
D = 0.5
0.1
0. 0 5
0. 0 2
0. 0 1
0.2
D u t y C y c l e, D = t /t
12
T - T = P * R (t)
θJA
A
J
P(pk)
t
1 t
2
R (t ) = r( t) * R
R =135°C/W
θJA
θJAθJA
TRADEMARKS
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROV AL OF FAIRCHILD SEMICONDUCTOR CORPORA TION.
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user.
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Definition of Terms
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Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
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Full Production
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