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FOD8320 High Noise Immunity, 2.5A Output Current, Gate Drive Optocoupler in Optoplanar(R) Wide Body SOP 5-Pin Features Fairchild's Description Optoplanar(R) Packaging Technology Provides Reliable and High-Voltage Insulation with Greater than 10 mm Creepage and Clearance Distance, and 0.5 mm Internal Insulation Distance While Still Offering a Compact Footprint 2.5 A Output Current Driving Capability for MediumPower IGBT/MOSFET - P-Channel MOSFETs at Output Stage Enables Output Voltage Swing Close to Supply Rail 35 kV/s Minimum Common Mode Rejection Wide Supply Voltage Range: 15 V to 30 V Fast Switching Speed Over Full Operating Temperature Range: - 400 ns Maximum Propagation Delay - 100 ns Maximum Pulse Width Distortion Under-Voltage Lockout (UVLO) with Hysteresis Extended Industrial Temperate Range: -40C to 100C Safety and Regulatory Approvals: - UL1577, 5,000 VRMS for 1 Minute - DIN EN/IEC60747-5-5, 1,414 V Peak Working Insulation Voltage The FOD8320 is a 2.5 A output current gate drive optocoupler, capable of driving medium-power IGBT/ MOSFETs. It is ideally suited for fast-switching driving of power IGBT and MOSFET used in motor-control inverter applications and high-performance power systems. The FOD8320 utilizes Fairchild's Optoplanar(R) coplanar packaging technology and optimized IC design to achieve reliable high-insulation voltage and high-noise immunity. It consists of an Aluminum Gallium Arsenide (AlGaAs) Light-Emitting Diode (LED) optically coupled to an integrated circuit with a high-speed driver for push-pull MOSFET output stage. The device is housed in a wide body, 5-pin, small-outline, plastic package. Functional Schematic 6 VDD ANODE 1 5 VO Applications AC and Brushless DC Motor Drives CATHODE 3 4 VSS Industrial Inverter Uninterruptible Power Supply Induction Heating Figure 1. Schematic Isolated IGBT/Power MOSFET Gate Drive Related Resources FOD3120, High Noise Immunity, 2.5 A Output Current, Gate Drive Optocoupler Datasheet www.fairchildsemi.com/products/opto/ Figure 2. Package Outline (c)2010 Fairchild Semiconductor Corporation FOD8320 Rev. 1.0.7 www.fairchildsemi.com FOD8320 -- High Noise Immunity, 2.5A Output Current, Gate Drive Optocoupler in Optoplanar(R) Wide Body SOP 5-Pin September 2014 VDD - VSS "Positive Going" (Turn-on) LED VDD - VSS "Positive Going" (Turn-off) VO Off 0 V to 30 V 0 V to 30 V LOW On 0 V to 11.5 V 0 V to 10 V LOW On 11.5 V to 14.5 V 10 V to 13 V Transition On 14.5 V to 30 V 13 V to 30 V HIGH Pin Configuration 1 6 ANODE CATHODE 5 3 4 VDD VO VSS Figure 3. Pin Configuration Pin Definitions Pin # Name Description 1 Anode 3 Cathode 4 VSS Negative Supply Voltage 5 VO Output Voltage 6 VDD Positive Supply Voltage (c)2010 Fairchild Semiconductor Corporation FOD8320 Rev. 1.0.7 LED Anode LED Cathode www.fairchildsemi.com 2 FOD8320 -- High Noise Immunity, 2.5A Output Current, Gate Drive Optocoupler in Optoplanar(R) Wide Body SOP 5-Pin Truth Table As per DIN EN/IEC60747-5-5, this optocoupler is suitable for "safe electrical insulation" only within the safety limit data. Compliance with the safety ratings shall be ensured by means of protective circuits. Symbol Parameter Min. Typ. Max. Unit Installation Classifications per DIN VDE 0110/1.89 Table 1 For Rated Mains Voltage < 150 VRMS I-IV For Rated Mains Voltage < 300 VRMS I-IV For Rated Mains Voltage < 450 VRMS I-IIII For Rated Mains Voltage < 600 VRMS I-III Climatic Classification 40/100/21 Pollution Degree (DIN VDE 0110/1.89) CTI VPR 2 Comparative Tracking Index 175 Input-to-Output Test Voltage, Method b, VIORM x 1.875 = VPR, 100% Production Test with tm = 1 s, Partial Discharge < 5 pC 2651 Vpeak Input-to-Output Test Voltage, Method a, VIORM x 1.6 = VPR, Type and Sample Test with tm = 10 s, Partial Discharge < 5 pC 2262 Vpeak VIORM Maximum Working Insulation Voltage 1414 Vpeak VIOTM Highest Allowable Over Voltage 8000 Vpeak External Creepage 10.0 mm External Clearance 10.0 mm Insulation Thickness 0.5 mm 150 C Safety Limit Values - Maximum Values Allowed in the Event of a Failure TS Case Temperature IS,INPUT Input Current 200 mA PS,OUTPUT Output Power 600 mW 109 RIO Insulation Resistance at TS, VIO = 500 V (c)2010 Fairchild Semiconductor Corporation FOD8320 Rev. 1.0.7 www.fairchildsemi.com 3 FOD8320 -- High Noise Immunity, 2.5A Output Current, Gate Drive Optocoupler in Optoplanar(R) Wide Body SOP 5-Pin Safety and Insulation Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA = 25C unless otherwise specified. Symbol Parameter Value Units TSTG Storage Temperature -40 to +125 C TOPR Operating Temperature -40 to +100 C Junction Temperature -40 to +125 C 260 for 10 s C TJ Lead Solder Temperature TSOL Refer to Reflow Temperature Profile on page 15. IF(AVG) Average Input Current 25 mA F Operating Frequency 50 kHz VR Reverse Input Voltage 5.0 V 3.0 A IO(PEAK) VDD VO(PEAK) tR(IN), tF(IN) Peak Output Current(1) Supply Voltage Peak Output Voltage Input Signal Rise and Fall Time Dissipation(2)(4) PDI Input Power PDO Output Power Dissipation(3)(4) 0 to 35 V 0 to VDD V 500 ns 45 mW 500 mW Notes: 1. Maximum pulse width = 10 s, maximum duty cycle = 0.2%. 2. No derating required across operating temperature range. 3. Derate linearly from 25C at a rate of 5.2 mW/C. 4. Functional operation under these conditions is not implied. Permanent damage may occur if the device is subjected to conditions outside these ratings. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol Min. Max. Unit Ambient Operating Temperature -40 100 C Supply Voltage 16 30 V IF(ON) Input Current (ON) 7 16 mA VF(OFF) Input Voltage (OFF) 0 0.8 V TA VDD - VSS Parameter (c)2010 Fairchild Semiconductor Corporation FOD8320 Rev. 1.0.7 www.fairchildsemi.com 4 FOD8320 -- High Noise Immunity, 2.5A Output Current, Gate Drive Optocoupler in Optoplanar(R) Wide Body SOP 5-Pin Absolute Maximum Ratings Apply over all recommended conditions, typical value is measured at TA = 25C. Symbol Parameter Conditions Min. VISO Input-Output Isolation Voltage TA = 25C, R.H. < 50%, t = 60 s, II-O 20 A, 50 Hz(5)(6) RISO Isolation Resistance VI-O = 500 V(5) CISO Isolation Capacitance VI-O = 0 V, Frequency = 1.0 Typ. Max. 5,000 MHz(6) Units VRMS 1011 1 pF Notes: 5. Device is considered a two terminal device: pins 1 and 3 are shorted together and pins 4, 5 and 6 are shorted together. 6. 5,000 VACRMS for 1 minute duration is equivalent to 6,000 VACRMS for 1 second duration. Electrical Characteristics Apply over all recommended conditions, typical value is measured at VDD = 30 V, VSS = Ground, TA = 25C unless otherwise specified. Symbol VF (VF / TA) Parameter Conditions Input Forward Voltage Min. Typ. Max. Units Figure 1.1 1.5 1.8 V 19 Temperature Coefficient of IF = 10 mA Forward Voltage -1.8 BVR Input Reverse Breakdown Voltage IR = 10 A CIN Input Capacitance f = 1 MHz, VF = 0 V IOH High Level Output Current(1) VOH = VDD - 3 V 1.0 VOH = VDD - 6 V 2.0 IOL Low Level Output Current(1) VOL = VSS + 3 V 1.0 VOL = VSS + 6 V 2.0 VOH High Level Output Voltage(7)(8) VOL Low Level Output Voltage(7)(8) IDDH mV/C 5 V 60 2.0 2.0 IF = 10 mA, IO = -2.5 A VDD - 6.25 VDD - 2.5 IF = 10 mA, IO = -100 mA VDD - 0.5 VDD - 0.1 pF 2.5 A 4, 6 2.5 A 4, 6, 22 2.5 A 7, 9 2.5 A 7, 9, 21 V 4 4, 5, 23 IF = 10 mA, IO = 2.5 A VSS + 2.5 VSS + 6.25 IF = 0 mA, IO = 100 mA VSS + 0.1 VSS + 0.5 High Level Supply Current VO Open, IF = 7 to 16 mA 2.9 3.8 mA 10, 11, 25 IDDL Low Level Supply Current VO Open, VF = 0 to 0.8 V 2.8 3.8 mA 10, 11, 26 IFLH Threshold Input Current Low to High IO = 0 mA, VO > 5 V 2.4 5.0 mA 12, 18, 27 VFHL Threshold Input Voltage High to Low IO = 0 mA, VO < 5 V 0.8 V 28 UnderVoltage Lockout Threshold IF = 10 mA, VO > 5 V 11.5 12.7 14.5 V 20, 29 VUVLO- IF = 10 mA, VO < 5 V 10.0 11.2 13.0 V 20, 29 UVLOHYS UnderVoltage Lockout Threshold Hysteresis VUVLO+ 1.5 V 7 8, 24 V Notes: 7. In this test, VOH is measured with a dc load current of 100 mA. When driving capacitive load VOH will approach VDD as IOH approaches 0 A. 8. Maximum pulse width = 1 ms, maximum duty cycle = 20%. (c)2010 Fairchild Semiconductor Corporation FOD8320 Rev. 1.0.7 www.fairchildsemi.com 5 FOD8320 -- High Noise Immunity, 2.5A Output Current, Gate Drive Optocoupler in Optoplanar(R) Wide Body SOP 5-Pin Isolation Characteristics Apply over all recommended conditions, typical value is measured at VDD = 30V, VSS = Ground, TA = 25C unless otherwise specified. Symbol Parameter Conditions Min. Typ. Max. Units Figure tPHL Propagation Delay Time to Logic Low Output(9) 150 285 400 ns 13, 14, 15, 16, 17, 30 tPLH Propagation Delay Time to Logic High Output(10) 150 260 400 ns 13, 14, 15, 16, 17, 30 PWD Pulse Width Distortion(11) | tPHL - tPLH | 25 100 ns PDD (Skew) Propagation Delay Difference Between Any Two Parts(12) IF = 7 mA to 16 mA, Rg = 10 , Cg = 10 nF, f = 10 kHz, Duty Cycle = 50% -250 250 tR Output Rise Time (10% to 90%) 60 ns 30 tF Output Fall Time (90% to 10%) 60 ns 30 tULVO ON ULVO Turn On Delay IF = 10 mA, VO > 5 V 0.8 s tULVO OFF ULVO Turn Off Delay IF = 10 mA, VO < 5 V 0.4 s | CMH | Common Mode Transient Immunity at Output High TA = 25C, VDD = 30 V, IF = 7 mA to 16 mA, VCM = 2000 V(13) 35 50 kV/s 31 | CML | Common Mode Transient Immunity at Output Low TA = 25C, VDD = 30 V, VF = 0 V, VCM = 2000 V(14) 35 50 kV/s 31 Notes: 9. Propagation delay tPHL is measured from the 50% level on the falling edge of the input pulse to the 50% level of the falling edge of the VO signal. 10. Propagation delay tPLH is measured from the 50% level on the rising edge of the input pulse to the 50% level of the rising edge of the VO signal. 11. PWD is defined as | tPHL - tPLH | for any given device. 12. The difference between tPHL and tPLH between any two FOD8320 parts under the same operating conditions, with equal loads. 13. Common mode transient immunity at output high is the maximum tolerable negative dVcm/dt on the trailing edge of the common mode impulse signal, VCM, to ensure that the output remains high (i.e., VO > 15.0 V). 14. Common mode transient immunity at output low is the maximum tolerable positive dVcm/dt on the leading edge of the common pulse signal, VCM, to ensure that the output remains low (i.e., VO < 1.0 V). (c)2010 Fairchild Semiconductor Corporation FOD8320 Rev. 1.0.7 www.fairchildsemi.com 6 FOD8320 -- High Noise Immunity, 2.5A Output Current, Gate Drive Optocoupler in Optoplanar(R) Wide Body SOP 5-Pin Switching Characteristics VOH-VDD - OUTPUT HIGH VOLTAGE DROP (V) VOH - V DD - OUTPUT HIGH VOLTAGE DROP (V) 0 -0.5 -1.0 -1.5 TA = -40C -2.0 25C -2.5 100C -3.0 VDD = 15 V to 30 V VSS = 0 V IF = 7 mA to 16 mA f = 200 Hz 0.2% Duty Cycle -3.5 -4.0 0 0.5 1.0 1.5 2.0 2.5 0 -0.05 -0.10 -0.15 -0.20 VDD = 15 V to 30 V VSS = 0 V IF = 7 mA to 16 mA IO = -100 mA -0.25 -0.30 -40 -20 0 Figure 4. Output High Voltage Drop vs. Output High Current VOL - OUTPUT LOW VOLTAGE (V) IOH - OUTPUT HIGH CURRENT (A) 6 5 VO = V DD - 6 V 4 VO = V DD - 3 V 3 2 VDD = 15 V to 30 V VSS = 0 V IF = 7 mA to 16 mA f = 200 Hz 0.2% Duty Cycle -20 0 TA = 100C 25C 2 -40C 1 0 20 40 60 80 100 0 0.5 1.0 1.5 2.0 2.5 IOL - OUTPUT LOW CURRENT (A) Figure 7. Output Low Voltage vs. Output Low Current 0.25 8 VDD = 15 V to 30 V VSS = 0 V VF = 0 V or 0.8 V IO = 100 mA IOL - OUTPUT LOW CURRENT (A) VOL - OUTPUT LOW VOLTAGE (V) 100 3 Figure 6. Output High Current vs. Ambient Temperature 0.15 0.10 0.05 0 -40 80 VDD = 15 V to 30 V VSS = 0 V IF = 0 mA f = 200 Hz 99.8% Duty Cycle TA - AMBIENT TEMPERATURE (C) 0.20 60 4 7 0 -40 40 Figure 5. Output High Voltage Drop vs. Ambient Temperature 8 1 20 TA - AMBIENT TEMPERATURE (C) IOH - OUTPUT HIGH CURRENT (A) -20 0 20 40 60 80 VO = V SS + 6V 4 VO = VSS + 3V 2 0 -40 100 TA - AMBIENT TEMPERATURE (C) -20 0 20 40 60 80 100 TA - AMBIENT TEMPERATURE (C) Figure 8. Output Low Voltage vs. Ambient Temperature (c)2010 Fairchild Semiconductor Corporation FOD8320 Rev. 1.0.7 6 VDD = 15 V to 30 V VSS = 0 V IF = 0 A f = 200 Hz 99.8% Duty Cycle Figure 9. Output Low Current vs. Ambient Temperature www.fairchildsemi.com 7 FOD8320 -- High Noise Immunity, 2.5A Output Current, Gate Drive Optocoupler in Optoplanar(R) Wide Body SOP 5-Pin Typical Performance Characteristics 3.6 VDD = 30 V VSS = 0 V IF = 10 mA (for IDDH) IF = 0 mA (for IDDL) 3.2 IDD - SUPPLY CURRENT (mA) IDD - SUPPLY CURRENT (mA) 3.6 IDDH 2.8 IDDL 2.4 2.0 -40 -20 0 20 40 60 80 IF = 10 mA (for IDDH) IF = 0 mA (for IDDL) VSS = 0 V TA = 25C 3.2 IDDH 2.8 IDDL 2.4 2.0 15 100 20 TA - AMBIENT TEMPERATURE (C) Figure 10. Supply Current vs. Ambient Temperature 3.5 tP - PROPAGATION DELAY (ns) IFLH - LOW TO HIGH INPUT CURRENT THRESHOLD (mA) 500 VDD = 15 V to 30 V VSS = 0 V Output = Open 3.0 2.5 2.0 1.5 1.0 -40 -20 0 20 40 60 80 IF = 10 mA Rg = 10 Cg = 10 nF TA = 25C f = 10 kHz 50% Duty Cycle 400 tPHL 300 tPLH 200 100 15 100 18 TA - AMBIENT TEMPERATURE (C) 21 24 27 30 VDD - SUPPLY VOLTAGE (V) Figure 13. Propagation Delay vs. Supply Voltage Figure 12. Low to High Input Current Threshold vs. Ambient Temperature 500 500 VDD = 30 V VSS = 0 V f = 10 kHz 50% Duty Cycle Rg = 10 400 Cg = 10 nF TA = 25C tP - PROPAGATION DELAY (ns) tP - PROPAGATION DELAY (ns) 30 Figure 11. Supply Current vs. Supply Voltage 4 tPHL 300 tPLH 200 100 25 VDD - SUPPLY VOLTAGE (V) 6 8 10 12 14 tPHL 300 tPLH 200 100 -40 16 IF - FORWARD LED CURRENT (mA) -20 0 20 40 60 80 100 TA - AMBIENT TEMPERATURE (C) Figure 15. Propagation Delay vs. Ambient Temperature Figure 14. Propagation Delay vs. LED Forward Current (c)2010 Fairchild Semiconductor Corporation FOD8320 Rev. 1.0.7 400 VDD = 30 V VSS = 0 V IF = 10 mA f = 10 kHz 50% Duty Cycle Rg = 10 Cg = 10 nF www.fairchildsemi.com 8 FOD8320 -- High Noise Immunity, 2.5A Output Current, Gate Drive Optocoupler in Optoplanar(R) Wide Body SOP 5-Pin Typical Performance Characteristics (Continued) 500 VDD = 30 V VSS = 0 V IF = 10 mA f = 10 kHz 50% Duty Cycle 400 Cg = 10 nF TA = 25C VDD = 30 V VSS = 0 V IF = 10 mA f = 10 kHz 50% Duty Cycle 400 Rg = 10 TA = 25C tP - PROPAGATION DELAY (ns) tP - PROPAGATION DELAY (ns) 500 tPHL 300 tPLH 200 100 0 10 20 30 40 tPLH 200 100 50 tPHL 300 0 20 Rg - SERIES LOAD RESISTANCE () Figure 16. Propagation Delay vs. Series Load Resistance 80 100 100 VDD = 30 V TA = 25C IF - FORWARD CURRENT (mA) 30 VO - OUTPUT VOLTAGE (V) 60 Figure 17. Propagation Delay vs. Load Capacitance 35 25 20 15 10 5 0 40 Cg - LOAD CAPACITANCE (nF) 0 1 2 3 4 10 100C 1 0.1 0.01 0.001 0.6 5 -40C 25C 0.8 I F - FORWARD LED CURRENT (mA) 1.0 1.2 1.4 1.6 1.8 VF - FORWARD VOLTAGE (V) Figure 18. Transfer Characteristics Figure 19. Input Forward Current vs. Forward Voltage 14 IF = 10 mA TA = 25C VO - OUTPUT VOLTAGE (V) 12 10 8 VUVLO = 11.56 V VUVLO = 13.12 V 6 4 2 0 0 5 10 15 20 VDD-VSS - SUPPLY VOLTAGE (V) Figure 20. Under Voltage Lockout (c)2010 Fairchild Semiconductor Corporation FOD8320 Rev. 1.0.7 www.fairchildsemi.com 9 FOD8320 -- High Noise Immunity, 2.5A Output Current, Gate Drive Optocoupler in Optoplanar(R) Wide Body SOP 5-Pin Typical Performance Characteristics (Continued) Power Supply + + C1 0.1 F Pulse Generator PW = 4.99 ms Period = 5 ms ROUT = 50 VDD = 15 V to 30 V C2 47 F Pulse-In 1 6 IOL R2 100 Power Supply + 5 D1 VOL 3 + C3 0.1 F V=6V C4 47 F 4 LED-IFmon To Scope R1 100 Test Conditions: Frequency = 200 Hz Duty Cycle = 99.8% VDD = 15 V to 30 V VSS = 0 V IF = 0 mA Figure 21. IOL Test Circuit Power Supply + + C1 0.1 F VDD = 15 V to 30 V C2 47 F Pulse Generator PW = 10 s Period = 5 ms ROUT = 50 Pulse-In 1 + 6 IOH R2 100 3 4 C4 47 F Power Supply V=6V - 5 D1 VOH LED-IFmon + C3 0.1 F Current Probe To Scope R1 100 Test Conditions: Frequency = 200 Hz Duty Cycle = 0.2% VDD = 15 V to 30 V VSS = 0 V IF = 7 mA to 16 mA Figure 22. IOH Test Circuit (c)2010 Fairchild Semiconductor Corporation FOD8320 Rev. 1.0.7 www.fairchildsemi.com 10 FOD8320 -- High Noise Immunity, 2.5A Output Current, Gate Drive Optocoupler in Optoplanar(R) Wide Body SOP 5-Pin Test Circuit 1 6 0.1 F + - VO 5 IF = 7 mA to 16 mA VDD = 15 V to 30 V 100 mA 3 4 Figure 23. VOH Test Circuit 1 6 0.1 F 5 3 100 mA VO + - VDD = 15 V to 30 V 4 Figure 24. VOL Test Circuit (c)2010 Fairchild Semiconductor Corporation FOD8320 Rev. 1.0.7 www.fairchildsemi.com 11 FOD8320 -- High Noise Immunity, 2.5A Output Current, Gate Drive Optocoupler in Optoplanar(R) Wide Body SOP 5-Pin Test Circuit (Continued) 6 1 0.1 F IF = 7 mA to 16 mA VO 5 3 + - VDD = 30 V + - VDD = 30 V 4 Figure 25. IDDH Test Circuit 6 1 0.1 F + - 5 VF = -3.0 V to 0.8 V VO 4 3 Figure 26. IDDL Test Circuit (c)2010 Fairchild Semiconductor Corporation FOD8320 Rev. 1.0.7 www.fairchildsemi.com 12 FOD8320 -- High Noise Immunity, 2.5A Output Current, Gate Drive Optocoupler in Optoplanar(R) Wide Body SOP 5-Pin Test Circuit (Continued) 6 1 0.1 F VO > 5 V 5 + - VDD = 15 V to 30 V + - VDD = 15 V to 30 V IF 3 4 Figure 27. IFLH Test Circuit 1 6 0.1 F + - VO 5 VF = -3.0 V to 0.8 V 3 4 Figure 28. VFHL Test Circuit 1 6 0.1 F IF = 10 mA 5 3 VO = 5 V + - 15 V or 30 V VDD Ramp 4 Figure 29. UVLO Test Circuit (c)2010 Fairchild Semiconductor Corporation FOD8320 Rev. 1.0.7 www.fairchildsemi.com 13 FOD8320 -- High Noise Immunity, 2.5A Output Current, Gate Drive Optocoupler in Optoplanar(R) Wide Body SOP 5-Pin Test Circuit (Continued) 6 1 0.1 F 5 VO + - Rg = 10 Probe f = 10 kHz DC = 50% 3 4 + - VDD = 15 V to 30 V + - VDD = 30 V Cg = 10 nF 50 IF tR tF 90% 50% VOUT 10% tPLH tPHL Figure 30. tPHL, tPLH, tR and tF Test Circuit and Waveforms IF A 6 1 B 5V 0.1 F + - 5 3 VO 4 +- VCM = 2,000 V VCM 0V t VO VOH Switch at A: IF = 10 mA VO VOL Switch at B: IF = 0 mA Figure 31. CMR Test Circuit and Waveforms (c)2010 Fairchild Semiconductor Corporation FOD8320 Rev. 1.0.7 www.fairchildsemi.com 14 FOD8320 -- High Noise Immunity, 2.5A Output Current, Gate Drive Optocoupler in Optoplanar(R) Wide Body SOP 5-Pin Test Circuit (Continued) FOD8320 -- High Noise Immunity, 2.5A Output Current, Gate Drive Optocoupler in Optoplanar(R) Wide Body SOP 5-Pin Reflow Profile Temperature (C) TP 260 240 TL 220 200 180 160 140 120 100 80 60 40 20 0 Maximum Ramp-up Rate = 3C/s Maximum Ramp-down Rate = 6C/s tP Tsmax tL Preheat Area Tsmin ts 120 240 360 Time 25C to Peak Time (seconds) Profile Freature Pb-Free Assembly Profile Temperature Minimum (Tsmin) 150C Temperature Maximum (Tsmax) 200C Time (tS) from (Tsmin to Tsmax) 60 s to 120 s Ramp-up Rate (tL to tP) 3C/second maximum Liquidous Temperature (TL) 217C Time (tL) Maintained Above (TL) 60 s to 150 s Peak Body Package Temperature 260C +0C / -5C Time (tP) within 5C of 260C 30 s Ramp-Down Rate (TP to TL) 6C/s maximum Time 25C to Peak Temperature 8 minutes maximum Figure 32. Reflow Profile (c)2010 Fairchild Semiconductor Corporation FOD8320 Rev. 1.0.7 www.fairchildsemi.com 15 Part Number Package Packing Method FOD8320 Wide Body SOP 5-Pin Tube (100 units per tube) FOD8320R2 Wide Body SOP 5-Pin Tape and Reel (1,000 units per reel) FOD8320V Wide Body SOP 5-Pin, DIN EN/IEC60747-5-5 Option Tube (100 units per tube) FOD8320R2V Wide Body SOP 5-Pin, DIN EN/ IEC60747-5-5 Option Tape and Reel (1,000 units per reel) All packages are lead free per JEDEC: J-STD-020B standard. Marking Information 1 2 3 8320 V D X YY KK W 4 6 5 8 7 Definitions 1 Fairchild logo 2 Device number, e.g., `8320' for FOD8320 3 DIN EN/IEC60747-5-5 Option (only appears on component ordered with this option) 4 Plant code, e.g., `D' 5 Last digit year code, e.g., `C' for 2012 6 Two digit work week ranging from `01' to `53' 7 Lot traceability code 8 Package assembly code, W (c)2010 Fairchild Semiconductor Corporation FOD8320 Rev. 1.0.7 www.fairchildsemi.com 16 FOD8320 -- High Noise Immunity, 2.5A Output Current, Gate Drive Optocoupler in Optoplanar(R) Wide Body SOP 5-Pin Ordering Information 0.20 C A-B 3.95 0.60 2X 1.27 4 6 D 1.38 A 6 4 1.27 4.60 11.38 11.80 11.60 9.20 0.10 C D 2X 1 3 1 0.33 C PIN ONE INDICATOR B 2.54 0.25 5X 0.51 0.31 2.54 C A-B D LAND PATTERN RECOMMENDATION 5 TIPS A 2.65 2.45 0.10 C 3 SEATING PLANE 2.95 MAX 0.10 C 0.30 0.10 5X C NOTES: UNLESS OTHERWISE SPECIFIED 1.35 1.15 GAUGE PLANE 8 0 0.25 C (R1.29) SEATING PLANE SCALE: 3.2:1 0.74 0.44 A) THIS PACKAGE DOES NOT CONFORM TO ANY STANDARD. B) ALL DIMENSIONS ARE IN (R0.54) MILLIMETERS. C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH AND TIE BAR PROTRUSIONS D) DRAWING CONFORMS TO ASME 0.25 Y14.5M-1994 0.19 E) DRAWING FILE NAME: MKT-M05AREV3 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor's product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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