©2002 Fairchild Semiconductor Corporation
FQD8P10 / FQU8P10
QFETTM
Rev. B, August 2002
FQD8P10 / FQU8P10
100V P-Channel MOSFET
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for low voltage applications such as audio amplifier,
high efficiency switching DC/DC converters, and DC motor
control.
Features
• -6.6A, -100V, RDS(on) = 0.53Ω @VGS = -10 V
• Low gate charge ( typical 12 nC)
• Low Crss ( typical 30 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Thermal Characteristi cs
Symbol Parameter FQD8P10 / FQU8P10 Units
VDSS Drain-Source Voltage -100 V
IDDrain Current - Continuous (TC = 25°C) -6.6 A
- Continuous (TC = 100°C) -4.2 A
IDM Drain Current - Pulsed (Note 1) -26.4 A
VGSS Gate-Source Voltage ± 30 V
EAS Single Pulsed Avalanche Energy (Note 2) 150 mJ
IAR Avalanche Current (Note 1) -6.6 A
EAR Repetitive Avalanche Energy (Note 1) 4.4 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) -6.0 V/ns
PDPower Dissipation (TA = 25°C) * 2.5 W
Power Dissipation (TC = 25°C) 44 W
- Derate above 25°C 0.35 W/°C
TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C
TLMaximum lead temperature for soldering purposes,
1/8" from case for 5 seconds 300 °C
Symbol Parameter Typ Max Units
RθJC Thermal Resistance, Junction-to-Case -- 2.84 °C/W
RθJA Thermal Resistance, Junction-to-Ambient * -- 50 °C/W
RθJA Thermal Resistance, Junction-to-Ambient -- 110 °C/W
* When mounted on the minimum pad size recommended (PCB Mount)
I-PAK
FQU Series
D-PAK
FQD Series GSD
GS
D
S
D
G
Rev. B, August 2002
FQD8P10 / FQU8P10
©2002 Fairchild Semiconductor Corporation
(Note 4)
(Note 4, 5)
(Note 4, 5)
(Note 4)
Electrical Characteristics TC = 25°C unless otherwise noted
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 5.2mH, IAS = -6.6A, VDD = -25V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ -8.0A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width ≤300µs, Duty cycle ≤2%
5. Essentially independent of operating temperature
Symbol Parame ter Test Condit ions Min Typ Max Units
Off Characteristics
BVDSS Drain-S ource Breakdown Voltage VGS = 0 V, I D = -250 µA-100 -- -- V
∆BVDSS
/ ∆TJ
Breakdown Voltage Temperature
Coefficient ID = -250 µA, Referenced to 25°C -- -0.1 -- V/°C
IDSS Zero Gate Voltage Drain Current VDS = -100 V, VGS = 0 V -- -- -1 µA
VDS = -80 V, TC = 125°C -- -- -10 µA
IGSSF Gate-Body Leakage Current, Forward VGS = -30 V, VDS = 0 V -- -- -100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = 30 V, VDS = 0 V -- -- 100 nA
On Characteri st ics
VGS(th) Gate Threshold Volt age VDS = VGS, ID = -250 µA-2.0 -- -4.0 V
RDS(on) Static Drain-Source
On-Resistance VGS = -10 V, ID = -3.3 A -- 0.41 0.53 Ω
gFS Forward Transconductance VDS = -40 V, ID = -3.3 A -- 4.1 -- S
Dynamic Characteristics
Ciss Input Capacitance VDS = -25 V, VGS = 0 V,
f = 1.0 MHz
-- 360 470 pF
Coss Output Capacitance -- 120 155 pF
Crss Reverse Transfer Capacitance -- 30 40 pF
Switching Characteristics
td(on) Turn-On Delay Time VDD = -50 V, ID = -8.0 A,
RG = 25 Ω
-- 11 30 ns
trTurn-On Rise Time -- 110 230 ns
td(off) Turn-Off De l a y Time -- 2 0 50 ns
tfTurn -Off Fall Time -- 35 80 ns
QgTotal Gate Ch arge VDS = -80 V, ID = -8.0 A,
VGS = -10 V
-- 12 15 nC
Qgs Gate-Source Charge -- 3.0 -- nC
Qgd Gate-Drain Charge -- 6.4 -- nC
Drain-Source Diode Characteristics and Maximum Ratings
ISMaximum Continuous Drain-Source Diode Forward Current -- -- -6.6 A
ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- -26.4 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, I S = -6.6 A -- -- -4.0 V
trr Reverse Recovery Time VGS = 0 V, I S = -8.0 A,
dIF / dt = 100 A/µs
-- 98 -- ns
Qrr Reverse Recovery Charge -- 0.35 -- µC
©2002 Fairchild Semiconductor Corporation
FQD8P10 / FQU8P10
Rev. B, August 2002
0.0 0.5 1.0 1.5 2.0 2.5 3.0
10-1
100
101
150℃
※ Notes :
1. VGS = 0V
2. 250μs P ulse Test
25℃
-IDR , R ev e rs e Drain Current [A ]
-VSD , Source-Drain Voltage [V]
0 5 10 15 20 25
0.0
0.3
0.6
0.9
1.2
1.5
※ N o te : TJ = 25℃
VGS = - 20V
VGS = - 10V
RDS(on) [Ω],
Drain-Source O n-Resistance
-ID , Dra in Cu r ren t [A]
246810
10-1
100
101
150℃
25℃
-55℃
※ Notes :
1. VDS = -40V
2. 250μs P ulse Test
-ID , Drain Current [A]
-VGS , Gate-Source Voltage [V]
10-1 100101
10-2
10-1
100
101
VGS
Top : -15.0 V
-10.0 V
-8.0 V
-7.0 V
-6.5 V
-5.5 V
-5.0 V
B o tto m : -4.5 V
※ Notes :
1. 250μs Pu lse Test
2. TC = 25℃
-ID, Drain Current [A]
-VDS, Drain-Source Voltage [V]
0 2 4 6 8 10 12 14
0
2
4
6
8
10
12
VDS = -50V
VDS = -20V
VDS = -80V
※ Note : ID = -8.0 A
-VGS , G ate-Source Voltage [V]
QG, Tota l Ga t e Charge [nC]
10-1 100101
0
100
200
300
400
500
600
700
800
900 Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
※ Notes :
1. VGS = 0 V
2. f = 1 MH z
Crss
Coss
Ciss
Capacitance [pF]
-VDS, Drain-Source Voltage [V]
Typical Characteristics
Figure 5. C apacitance C haracterist i cs Figure 6. Ga te Ch arge Chara ct eri stics
Figu re 3. O n-Res i stance Variat ion vs.
Drain Current and Gate Voltage Figure 4. Body Diode Fo rwa rd Voltage
Variation vs. Source Current
and Temperature
Figure 2. Transfer CharacteristicsFigure 1. On- R egi on Character ist ic s
©2002 Fairchild Semiconductor Corporation
FQD8P10 / FQU8P10
Rev. B, August 2002
10-5 10-4 10-3 10-2 10-1 100101
10-1
100
※ No te s :
1 . Z θJC(t) = 2.84 ℃/W Ma x .
2 . D u ty F a c to r , D= t1/t2
3 . T JM - TC = P DM * Z θJC(t)
single p ulse
D=0.5
0.02
0.2
0.05
0.1
0.01
ZθJC
(t), Therm al R esponse
t1, S quare W ave Pulse D uration [sec]
25 50 75 100 125 150
0
1
2
3
4
5
6
7
-ID, Drain Current [A]
TC, Case Temperature [℃
]
100101102
10-1
100
101
102
DC
10 ms
1 ms
100 µs
Operation in This Area
is Limited by R DS(on)
※ Notes :
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
-ID, Drain Cur re nt [A]
-VDS, Drain-Source Voltage [V]
-100 -50 0 50 100 150 200
0.0
0.5
1.0
1.5
2.0
2.5
3.0
※ Notes :
1. VGS = -10 V
2. ID = -3.3 A
RDS(ON) , (Norm alized)
Drain-Source On-Resistance
TJ, Junction Temperature [oC]
-100 -50 0 50 100 150 200
0.8
0.9
1.0
1.1
1.2
※ Notes :
1 . VGS = 0 V
2 . ID = -250 μA
-BV DSS , (No rma liz e d )
Drain-Sou rce Breakdow n V oltage
TJ, Junction Temperature [oC]
Typical Characteristics (Continued)
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
Figu re 7. Breakdo w n Voltage Variat i o n
vs. Temperature Figure 8. On-Resistance Variation
vs. Temperature
Figure 11. Transient Thermal Response Cur ve
t1
PDM
t2
©2002 Fairchild Semiconductor Corporation
FQD8P10 / FQU8P10
Rev. B, August 2002
Charge
VGS
-10V Qg
Qgs Qgd
-3mA
VGS
DUT
VDS
300nF
50KΩ
200nF
12V
Same Type
as DUT
Charge
VGS
-10V Qg
Qgs Qgd
-3mA
VGS
DUT
VDS
300nF
50KΩ
200nF
12V
Same Type
as DUT
VDS
VGS 10%
90%
td(on) tr
ton toff
td(off) tf
VDD
-10V
VDS RL
DUT
RG
VGS
VDS
VGS 10%
90%
td(on) tr
ton toff
td(off) tf
VDD
-10V
VDS RL
DUT
RG
VGS
EAS =LI
AS2
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
-10V DUT
RG
L
ID
t p
EAS =LI
AS2
----
2
1
EAS =LI
AS2
----
2
1
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
-10V DUT
RG
LL
ID
ID
t p
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
©2002 Fairchild Semiconductor Corporation
FQD8P10 / FQU8P10
Rev. B, August 2002
Peak Diode Recovery dv/dt Tes t Ci rc ui t & Waveform s
DUT
VDS
+
_
Driver
RGCompliment of DUT
(N-Channel)
VGS • dv/dt controlled by RG
•I
SD con trol l e d by pulse period
VDD
L
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pu lse P eri od
--------------------------
DUT
VDS
+
_
Driver
RGCompliment of DUT
(N-Channel)
VGS • dv/dt controlled by RG
•I
SD con trol l e d by pulse period
VDD
LL
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pu lse P eri od
--------------------------
D = Gate Pulse Width
Gate Pu lse P eri od
--------------------------
©2002 Fairchild Semiconductor Corporation
FQD8P10 / FQU8P10
m
Rev. B, August 2002
6.60 ±0.20
2.30 ±0.10
0.50 ±0.10
5.34 ±0.30
0.70 ±0.20
0.60 ±0.20
0.80 ±0.20
9.50 ±0.30
6.10 ±0.20
2.70 ±0.20 9.50 ±0.30
6.10 ±0.20
2.70 ±0.20
MIN0.55
0.76 ±0.10 0.50 ±0.10
1.02 ±0.20
2.30 ±0.20
6.60 ±0.20
0.76 ±0.10
(5.34)
(1.50)
(2XR0.25)
(5.04)
0.89 ±0.10
(0.10) (3.05)
(1.00)
(0.90)
(0.70)
0.91 ±0.10
2.30TYP
[2.30±0.20]
Dimensions in Millimeters
Mechanical Dimensions
D - PAK
©2002 Fairchild Semiconductor Corporation
FQD8P10 / FQU8P10
i
Rev. B, August 2002
6.60 ±0.20
0.76 ±0.10
MAX0.96
2.30TYP
[2.30±0.20] 2.30TYP
[2.30±0.20]
0.60 ±0.20
0.80 ±0.10
1.80 ±0.20
9.30 ±0.30
16.10 ±0.30
6.10 ±0.20
0.70 ±0.20
5.34 ±0.20
0.50 ±0.10
0.50 ±0.10
2.30 ±0.20
(0.50) (0.50)(4.34)
I-PAK
Mechanical Dimensions
Dimensions in Millimeters
I - PAK
©2002 Fairchild Semiconductor Corporation
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR
CORPORATION.
As used herein:
1. Life support devices or systems are devic es or syst em s
which, (a) ar e intended for surgical implant into the body,
or (b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Formative or In
Design This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary First Production This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconduct or reserv es the right to make
changes at any time without notice in order to improve
design.
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete Not In Production This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I1
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