1. General description
The 74AUP1G74 provide s a low-power, low-volt age single positive- edge triggere d D-type
flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs and
complementary Q and Q outputs. The SD and RD are asynchronous active LOW inputs
and operate independently of the clock input. Information on the data input is transferred
to the Q output on the LOW-to-HIGH transition of the clock pulse. The D input must be
stable one se t-up time prior to the LOW-to-HIGH clock transition for p redictable operation .
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire VCC range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire
VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF. The IOFF
circuitry disables the outpu t, preventing the damaging ba ckflow current through the device
when it is powered down.
2. Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1. 95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F Class 3A exceeds 50 00 V
MM JESD22-A115-A ex ce ed s 200 V
CDM JESD22-C101E exceeds 1000 V
Low static power consumption; ICC = 0.9 A (maximum)
Latch-up pe rfo rm a nc e ex cee d s 10 0 mA per JESD 78 C las s II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of VCC
IOFF circuitry provides partial power-down mode operation
Multiple package options
Specified from 40 Cto+85C and 40 Cto+125C
74AUP1G74
Low-power D-type flip-flop with set and reset; positive-edge
trigger
Rev. 10 — 28 October 2016 Product data sheet
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 2 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
3. Ordering information
[1] Type number 74AUP1G74GX is in development.
4. Marking
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74AUP1G74DC 40 C to +125 C VSSOP8 plastic very thin shrink small outline package; 8 leads;
body width 2.3 mm SOT765-1
74AUP1G74GT 40 C to +125 C XSON8 plastic extremely thin small outline package; no leads;
8 terminals; body 1 1.95 0.5 mm SOT833-1
74AUP1G74GF 40 C to +125 C XSON8 extremely thin small outlin e package; no leads;
8 terminals; body 1.35 10.5 mm SOT1089
74AUP1G74GD 40 C to +125 C XSON8 plastic extremely thin small outline package; no leads;
8 terminals; body 3 2 0.5 mm SOT996-2
74AUP1G74GM 40 C to +125 C XQFN8 plastic, extremely thin quad flat package; no leads;
8 terminals; body 1.6 1.6 0.5 mm SOT902-2
74AUP1G74GN 40 C to +125 C XSON8 extremely thin small outline package; no leads;
8 terminals; body 1.2 1.0 0.35 mm SOT1116
74AUP1G74GS 40 C to +125 C XSON8 extremely thin small outline package; no leads;
8 terminals; body 1.35 1.0 0.35 mm SOT1203
74AUP1G74GX[1] 40 C to +125 C X2SON8 plastic thermal enhanced extremely thin small outline
package; no leads; 8 terminals; body 1.35 0.8 0.35 mm SOT1233
Table 2. Marking codes
Type number Marking code[1]
74AUP1G74DC p74
74AUP1G74GT p74
74AUP1G74GF 54
74AUP1G74GD p74
74AUP1G74GM p74
74AUP1G74GN 54
74AUP1G74GS 54
74AUP1G74GX 54
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 3 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
5. Functional diagram
Fig 1. Logic symbol Fig 2. IEC logic symbol
DDK
5'
))
6'
44
4
4
6'
&3
&3
''
5'
DDK
&
6
'
5
Fig 3. Logic diagra m
DDH
6'
&3
5'
'
4
&
&
&
&
&
&
4
&
&
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 4 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
6. Pinning information
6.1 Pinning
Fig 4. Pin configuration
SOT765-1 Fig 5. Pin configuration
SOT833-1, SOT1089,
SOT1116 and SOT1203
Fig 6. Pin configuration
SOT996-2
$83*
&3 9
&&
'6'
45'
*1' 4
DDH
$83*
5'
6'
9&&
4
4
'
&3
*1'
DDH




7UDQVSDUHQWWRSYLHZ
DDL
$83*
7UDQVSDUHQWWRSYLHZ
&3
'
4
*1'
9&&
6'
5'
4
Fig 7. Pin configu ration SOT902-2 Fig 8. Pin co nfiguration SOT1233
DDH
'5'
&3
9&&
4
6'
*1'
4
7UDQVSDUHQWWRSYLHZ
WHUPLQDO
LQGH[DUHD
$83*
&3
'
4
6'
5'
4
DDD
7UDQVSDUHQWWRSYLHZ
$83*
*1'
9&&
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 5 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
6.2 Pin description
7. Functional description
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care.
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
= LOW-to-HIGH CP transition;
Qn+1 = state after the next LOW-to-HIGH CP transition.
Table 3. Pin description
Symbol Pin Description
SOT765-1, SOT833-1, SOT1089, SOT996-2,
SOT1116, SOT1203 and SOT1233 SOT902-2
CP 1 7 clock input
D 2 6 data input
Q3 5 complement output
GND 4 4 ground (0 V)
Q 5 3 true output
RD 6 2 asynchronous reset input (active LOW)
SD 7 1 asynchronous set input (active LOW)
VCC 8 8 supply voltage
Table 4. Function table for asynchrono us operation[1]
Input Output
SD RD CP D Q Q
LHXXHL
HLXXLH
LLXXHH
Table 5. Function table for synchronous operation[1]
Input Output
SD RD CP D Qn+1 Qn+1
HHLLH
HHHHL
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 6 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
8. Limiting values
[1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For VSSOP8 packages: above 110 C the value of Ptot derates linearly with 8.0 mW/K.
For XSON8 and XQFN8 packages: above 118 C the value of Ptot derates linearly with 7.8 mW/K.
For X2SON8 package: above 118 C the value of Ptot derates linearly with 7.7 mW/K.
9. Recommended operating conditions
Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V ).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +4.6 V
IIK input clamping current VI<0V 50 - mA
VIinput voltage [1] 0.5 +4.6 V
IOK output clamping current VO<0V 50 - mA
VOoutput voltage Active mode and Power-down mode [1] 0.5 +4.6 V
IOoutput current VO=0VtoV
CC -20 mA
ICC supply current - +50 mA
IGND ground current 50 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb =40 C to +125 C[2] -250mW
Table 7. Operating conditions
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.8 3.6 V
VIinput voltage 0 3.6 V
VOoutput voltage Active mode 0 VCC V
Power-down mode; VCC =0V 0 3.6 V
Tamb ambient temperature 40 +125 C
t/V input transition rise and fall rate VCC = 0.8 V to 3.6 V - 200 ns/V
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 7 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
10. Static characteristics
Table 8. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
Tamb = 25 C
VIH HIGH-level input voltage VCC = 0.8 V 0.70 VCC --V
VCC = 0.9 V to 1.95 V 0.65 VCC --V
VCC = 2.3 V to 2.7 V 1.6 - - V
VCC = 3.0 V to 3.6 V 2.0 - - V
VIL LOW-level input voltage VCC = 0.8 V - - 0.30 VCC V
VCC = 0.9 V to 1.95 V - - 0.35 VCC V
VCC = 2.3 V to 2.7 V - - 0.7 V
VCC = 3.0 V to 3.6 V - - 0.9 V
VOH HIGH-level output voltage VI = VIH or VIL
IO = 20 A; VCC = 0.8 V to 3.6 V VCC 0.1 - - V
IO = 1.1 mA; VCC = 1.1 V 0.75 VCC --V
IO = 1.7 mA; VCC = 1.4 V 1.11 - - V
IO = 1.9 mA; VCC = 1.65 V 1.32 - - V
IO = 2.3 mA; VCC = 2.3 V 2.05 - - V
IO = 3.1 mA; VCC = 2.3 V 1.9 - - V
IO = 2.7 mA; VCC = 3.0 V 2.72 - - V
IO = 4.0 mA; VCC = 3.0 V 2.6 - - V
VOL LOW-level output voltage VI = VIH or VIL
IO = 20 A; VCC = 0.8 V to 3.6 V - - 0.1 V
IO = 1.1 mA; VCC = 1.1 V - - 0.3 VCC V
IO = 1.7 mA; VCC = 1.4 V - - 0.31 V
IO = 1.9 mA; VCC = 1.65 V - - 0.31 V
IO = 2.3 mA; VCC = 2.3 V - - 0.31 V
IO = 3.1 mA; VCC = 2.3 V - - 0.44 V
IO = 2.7 mA; VCC = 3.0 V - - 0.31 V
IO = 4.0 mA; VCC = 3.0 V - - 0.44 V
IIinput leakage current VI = GND to 3.6 V; VCC = 0V to 3.6V - - 0.1 A
IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - 0.2 A
IOFF additional power-off
leakage current VI or VO = 0 V to 3.6 V;
VCC =0Vto0.2V --0.2 A
ICC supply current VI = GND or VCC; IO = 0 A;
VCC = 0.8 V to 3.6 V --0.5A
ICC additional supply current VI = VCC 0.6 V; IO = 0 A;
VCC =3.3V; per pin [1] --40A
CIinput capacitance VCC = 0 V to 3.6 V; VI = GND or VCC -0.6-pF
COoutput capacitance VO = GND; VCC = 0 V - 1.3 - pF
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 8 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
Tamb = 40 C to +85 C
VIH HIGH-level input voltage VCC = 0.8 V 0.70 VCC --V
VCC = 0.9 V to 1.95 V 0.65 VCC --V
VCC = 2.3 V to 2.7 V 1.6 - - V
VCC = 3.0 V to 3.6 V 2.0 - - V
VIL LOW-level input voltage VCC = 0.8 V - - 0.30 VCC V
VCC = 0.9 V to 1.95 V - - 0.35 VCC V
VCC = 2.3 V to 2.7 V - - 0.7 V
VCC = 3.0 V to 3.6 V - - 0.9 V
VOH HIGH-level output voltage VI = VIH or VIL
IO = 20 A; VCC = 0.8 V to 3.6 V VCC 0.1 - - V
IO = 1.1 mA; VCC = 1.1 V 0.7 VCC --V
IO = 1.7 mA; VCC = 1.4 V 1.03 - - V
IO = 1.9 mA; VCC = 1.65 V 1.30 - - V
IO = 2.3 mA; VCC = 2.3 V 1.97 - - V
IO = 3.1 mA; VCC = 2.3 V 1.85 - - V
IO = 2.7 mA; VCC = 3.0 V 2.67 - - V
IO = 4.0 mA; VCC = 3.0 V 2.55 - - V
VOL LOW-level output voltage VI = VIH or VIL
IO = 20 A; VCC = 0.8 V to 3.6 V - - 0.1 V
IO = 1.1 mA; VCC = 1.1 V - - 0.3 VCC V
IO = 1.7 mA; VCC = 1.4 V - - 0.37 V
IO = 1.9 mA; VCC = 1.65 V - - 0.35 V
IO = 2.3 mA; VCC = 2.3 V - - 0.33 V
IO = 3.1 mA; VCC = 2.3 V - - 0.45 V
IO = 2.7 mA; VCC = 3.0 V - - 0.33 V
IO = 4.0 mA; VCC = 3.0 V - - 0.45 V
IIinput leakage current VI = GND to 3.6 V; VCC = 0V to 3.6V - - 0.5 A
IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - 0.5 A
IOFF additional power-off
leakage current VI or VO = 0 V to 3.6 V;
VCC =0Vto0.2V --0.6 A
ICC supply current VI = GND or VCC; IO = 0 A;
VCC = 0.8 V to 3.6 V --0.9A
ICC additional supply current VI = VCC 0.6 V; IO = 0 A;
VCC =3.3V; per pin [1] --50A
Table 8. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 9 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
[1] One input at VCC 0.6 V, other input at VCC or GND.
Tamb = 40 C to +125 C
VIH HIGH-level input voltage VCC = 0.8 V 0.75 VCC --V
VCC = 0.9 V to 1.95 V 0.70 VCC --V
VCC = 2.3 V to 2.7 V 1.6 - - V
VCC = 3.0 V to 3.6 V 2.0 - - V
VIL LOW-level input voltage VCC = 0.8 V - - 0.25 VCC V
VCC = 0.9 V to 1.95 V - - 0.30 VCC V
VCC = 2.3 V to 2.7 V - - 0.7 V
VCC = 3.0 V to 3.6 V - - 0.9 V
VOH HIGH-level output voltage VI = VIH or VIL
IO = 20 A; VCC = 0.8 V to 3.6 V VCC 0.11 - - V
IO = 1.1 mA; VCC = 1.1 V 0.6 VCC --V
IO = 1.7 mA; VCC = 1.4 V 0.93 - - V
IO = 1.9 mA; VCC = 1.65 V 1.17 - - V
IO = 2.3 mA; VCC = 2.3 V 1.77 - - V
IO = 3.1 mA; VCC = 2.3 V 1.67 - - V
IO = 2.7 mA; VCC = 3.0 V 2.40 - - V
IO = 4.0 mA; VCC = 3.0 V 2.30 - - V
VOL LOW-level output voltage VI = VIH or VIL
IO = 20 A; VCC = 0.8 V to 3.6 V - - 0.11 V
IO = 1.1 mA; VCC = 1.1 V - - 0.33 VCC V
IO = 1.7 mA; VCC = 1.4 V - - 0.41 V
IO = 1.9 mA; VCC = 1.65 V - - 0.39 V
IO = 2.3 mA; VCC = 2.3 V - - 0.36 V
IO = 3.1 mA; VCC = 2.3 V - - 0.50 V
IO = 2.7 mA; VCC = 3.0 V - - 0.36 V
IO = 4.0 mA; VCC = 3.0 V - - 0.50 V
IIinput leakage current VI = GND to 3.6 V; VCC = 0V to 3.6V - - 0.75 A
IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - 0.75 A
IOFF additional power-off
leakage current VI or VO = 0 V to 3.6 V;
VCC =0Vto0.2V --0.75 A
ICC supply current VI = GND or VCC; IO = 0 A;
VCC = 0.8 V to 3.6 V --1.4A
ICC additional supply current VI = VCC 0.6 V; IO = 0 A;
VCC =3.3V; per pin [1] --75A
Table 8. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 10 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
11. Dynamic characteristics
Table 9. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 11.
Symbol Parameter Conditions Tamb = 25 C Tamb = 40 C to +125 CUnit
Min Typ[1] Max Min Max
(85 C) Min Max
(125 C)
CL = 5 pF
tpd propagation
delay CP to Q, Q; see Figure 9 [2]
VCC = 0.8 V - 25.4 - - - - - ns
VCC = 1.1 V to 1.3 V 2.9 6.7 14.0 2.6 14.2 2.6 14.2 ns
VCC = 1.4 V to 1.6 V 2.4 4.5 7.6 2.3 8.3 2.3 8.6 ns
VCC = 1.65 V to 1.95 V 1.9 3.5 5.7 1.7 6.5 1.7 6.8 ns
VCC = 2.3 V to 2.7 V 1.7 2.6 3.8 1.4 4.4 1.4 4.7 ns
VCC = 3.0 V to 3.6 V 1.5 2.2 3.1 1.2 3.4 1.2 3.7 ns
SDtoQ,Q; see
Figure 10 [2]
VCC = 0.8 V - 19.6 - - - - - ns
VCC = 1.1 V to 1.3 V 2.7 5.6 11.0 2.5 11.4 2.5 11.5 ns
VCC = 1.4 V to 1.6 V 2.4 4.0 6.3 2.2 6.9 2.2 7.3 ns
VCC = 1.65 V to 1.95 V 2.0 3.3 4.9 1.7 5.6 1.7 5.9 ns
VCC = 2.3 V to 2.7 V 1.9 2.7 3.7 1.7 4.0 1.7 4.2 ns
VCC = 3.0 V to 3.6 V 1.8 2.5 3.2 1.5 3.6 1.5 3.8 ns
RDtoQ,Q; see
Figure 10 [2]
VCC = 0.8 V - 19.2 - - - - - ns
VCC = 1.1 V to 1.3 V 2.6 5.5 11.0 2.5 11.3 2.5 11.5 ns
VCC = 1.4 V to 1.6 V 2.3 3.9 6.3 2.2 6.8 2.2 7.3 ns
VCC = 1.65 V to 1.95 V 1.9 3.2 5.0 1.8 5.6 1.8 5.9 ns
VCC = 2.3 V to 2.7 V 1.9 2.6 3.6 1.7 4.1 1.7 4.3 ns
VCC = 3.0 V to 3.6 V 1.8 2.4 3.3 1.5 3.6 1.5 3.8 ns
fmax maximum
frequency CP; see Figure 9
VCC = 0.8 V - 53 - - - - - MHz
VCC = 1.1 V to 1.3 V - 203 - 170 - 170 - MHz
VCC = 1.4 V to 1.6 V - 347 - 310 - 300 - MHz
VCC = 1.65 V to 1.95 V - 435 - 400 - 390 - MHz
VCC = 2.3 V to 2.7 V - 550 - 490 - 480 - MHz
VCC = 3.0 V to 3.6 V - 619 - 550 - 510 - MHz
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 11 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
CL = 10 p F
tpd propagation
delay CP to Q, Q; see Figure 9 [2]
VCC = 0.8 V - 28.9 - - - - - ns
VCC = 1.1 V to 1.3 V 3.1 7.5 15.8 2.9 16.1 2.9 16.1 ns
VCC = 1.4 V to 1.6 V 2.7 5.1 8.7 2.4 9.4 2.4 9.8 ns
VCC = 1.65 V to 1.95 V 2.5 4.1 6.5 2.2 7.2 2.2 7.6 ns
VCC = 2.3 V to 2.7 V 2.0 3.2 4.6 1.8 5.3 1.8 5.6 ns
VCC = 3.0 V to 3.6 V 1.8 2.8 3.8 1.6 4.1 1.6 4.4 ns
SDtoQ,Q; see
Figure 10 [2]
VCC = 0.8 V - 23.2 - - - - - ns
VCC = 1.1 V to 1.3 V 2.9 6.5 12.9 2.8 13.3 2.8 13.5 ns
VCC = 1.4 V to 1.6 V 2.7 4.6 7.5 2.3 7.9 2.3 8.3 ns
VCC = 1.65 V to 1.95 V 2.6 3.9 5.6 2.3 6.3 2.3 6.6 ns
VCC = 2.3 V to 2.7 V 2.3 3.2 4.4 2.0 4.8 2.0 5.2 ns
VCC = 3.0 V to 3.6 V 2.2 3.0 3.9 1.9 4.2 1.9 4.4 ns
RDtoQ,Q; see
Figure 10 [2]
VCC = 0.8 V - 22.7 - - - - - ns
VCC = 1.1 V to 1.3 V 2.8 6.4 12.8 2.7 13.2 2.7 13.4 ns
VCC = 1.4 V to 1.6 V 2.6 4.5 7.5 2.3 8.1 2.3 8.4 ns
VCC = 1.65 V to 1.95 V 2.5 3.3 5.8 2.3 6.3 2.3 6.7 ns
VCC = 2.3 V to 2.7 V 2.2 3.2 4.4 2.0 4.9 2.0 5.2 ns
VCC = 3.0 V to 3.6 V 2.0 2.9 4.0 1.9 4.3 1.9 4.5 ns
fmax maximum
frequency CP; see Figure 9
VCC = 0.8 V - 52 - - - - - MHz
VCC = 1.1 V to 1.3 V - 192 - 150 - 150 - MHz
VCC = 1.4 V to 1.6 V - 324 - 280 - 230 - MHz
VCC = 1.65 V to 1.95 V - 421 - 310 - 250 - MHz
VCC = 2.3 V to 2.7 V - 486 - 370 - 360 - MHz
VCC = 3.0 V to 3.6 V - 550 - 410 - 360 - MHz
Table 9. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 11.
Symbol Parameter Conditions Tamb = 25 C Tamb = 40 C to +125 CUnit
Min Typ[1] Max Min Max
(85 C) Min Max
(125 C)
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 12 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
CL = 15 p F
tpd propagation
delay CP to Q, Q; see Figure 9 [2]
VCC = 0.8 V - 32.4 - - - - - ns
VCC = 1.1 V to 1.3 V 3.5 8.3 17.6 3.3 17.8 3.3 18.0 ns
VCC = 1.4 V to 1.6 V 3.2 5.6 9.5 2.8 10.5 2.8 11.1 ns
VCC = 1.65 V to 1.95 V 2.7 4.6 7.2 2.5 8.1 2.5 8.6 ns
VCC = 2.3 V to 2.7 V 2.4 3.6 5.2 2.2 5.8 2.2 6.2 ns
VCC = 3.0 V to 3.6 V 2.2 3.2 4.4 2.0 4.9 2.0 5.2 ns
SDtoQ,Q; see
Figure 10 [2]
VCC = 0.8 V - 26.7 - - - - - ns
VCC = 1.1 V to 1.3 V 3.3 7.3 14.7 3.1 15.2 3.1 15.4 ns
VCC = 1.4 V to 1.6 V 3.2 5.2 8.3 2.9 9.0 2.9 9.5 ns
VCC = 1.65 V to 1.95 V 2.8 4.3 6.4 2.5 7.1 2.5 7.5 ns
VCC = 2.3 V to 2.7 V 2.8 3.7 5.1 2.2 5.5 2.2 5.8 ns
VCC = 3.0 V to 3.6 V 2.5 3.5 4.6 2.4 5.0 2.4 5.2 ns
RDtoQ,Q; see
Figure 10 [2]
VCC = 0.8 V - 26.1 - - - - - ns
VCC = 1.1 V to 1.3 V 3.2 7.2 14.5 3.1 15.0 3.1 15.2 ns
VCC = 1.4 V to 1.6 V 3.1 5.1 8.4 2.7 9.2 2.7 9.7 ns
VCC = 1.65 V to 1.95 V 2.7 4.3 6.5 2.6 7.3 2.6 7.7 ns
VCC = 2.3 V to 2.7 V 2.6 3.6 5.0 2.4 5.5 2.4 5.8 ns
VCC = 3.0 V to 3.6 V 2.4 3.4 4.6 2.3 5.0 2.3 5.2 ns
fmax maximum
frequency CP; see Figure 9
VCC = 0.8 V - 50 - - - - - MHz
VCC = 1.1 V to 1.3 V - 181 - 120 - 120 - MHz
VCC = 1.4 V to 1.6 V - 301 - 190 - 160 - MHz
VCC = 1.65 V to 1.95 V - 407 - 240 - 190 - MHz
VCC = 2.3 V to 2.7 V - 422 - 300 - 270 - MHz
VCC = 3.0 V to 3.6 V - 481 - 320 - 300 - MHz
Table 9. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 11.
Symbol Parameter Conditions Tamb = 25 C Tamb = 40 C to +125 CUnit
Min Typ[1] Max Min Max
(85 C) Min Max
(125 C)
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 13 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
CL = 30 p F
tpd propagation
delay CP to Q, Q; see Figure 9 [2]
VCC = 0.8 V - 42.7 - - - - - ns
VCC = 1.1 V to 1.3 V 4.2 10.6 22.5 4.0 23.0 4.0 23.3 ns
VCC = 1.4 V to 1.6 V 3.7 7.2 12.0 3.7 13.3 3.7 14.0 ns
VCC = 1.65 V to 1.95 V 3.5 5.8 9.2 3.4 10.4 3.4 11.0 ns
VCC = 2.3 V to 2.7 V 3.3 4.7 6.6 3.0 7.3 3.0 7.8 ns
VCC = 3.0 V to 3.6 V 3.0 4.3 5.8 2.8 6.8 2.8 7.3 ns
SDtoQ,Q; see
Figure 10 [2]
VCC = 0.8 V - 37.0 - - - - - ns
VCC = 1.1 V to 1.3 V 4.0 9.5 19.8 3.8 20.8 3.8 21.1 ns
VCC = 1.4 V to 1.6 V 3.8 6.7 10.9 3.7 12.0 3.7 12.7 ns
VCC = 1.65 V to 1.95 V 3.7 5.6 8.4 3.5 9.3 3.5 9.9 ns
VCC = 2.3 V to 2.7 V 3.7 4.8 6.6 3.2 7.2 3.2 7.6 ns
VCC = 3.0 V to 3.6 V 3.4 4.6 6.0 3.1 6.8 3.1 7.1 ns
RDtoQ,Q; see
Figure 10 [2]
VCC = 0.8 V - 36.4 - - - - - ns
VCC = 1.1 V to 1.3 V 3.9 9.4 19.5 3.8 20.2 3.8 20.5 ns
VCC = 1.4 V to 1.6 V 3.6 6.6 10.9 3.7 12.0 3.7 12.6 ns
VCC = 1.65 V to 1.95 V 3.5 5.5 8.5 3.5 9.5 3.5 10.1 ns
VCC = 2.3 V to 2.7 V 3.5 4.7 6.5 3.2 7.1 3.2 7.6 ns
VCC = 3.0 V to 3.6 V 3.3 4.4 6.1 3.1 7.1 3.1 7.5 ns
fmax maximum
frequency CP; see Figure 9
VCC = 0.8 V - 28 - - - - - MHz
VCC = 1.1 V to 1.3 V - 145 - 70 - 70 - MHz
VCC = 1.4 V to 1.6 V - 185 - 1 20 - 110 - MHz
VCC = 1.65 V to 1.95 V - 270 - 1 50 - 120 - MHz
VCC = 2.3 V to 2.7 V - 290 - 1 90 - 170 - MHz
VCC = 3.0 V to 3.6 V - 315 - 2 00 - 190 - MHz
Table 9. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 11.
Symbol Parameter Conditions Tamb = 25 C Tamb = 40 C to +125 CUnit
Min Typ[1] Max Min Max
(85 C) Min Max
(125 C)
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 14 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
CL = 5 pF, 10 pF, 15 pF and 30 pF
tsu set-up time D to CP HIGH;
see Figure 9
VCC = 0.8 V - 3.4 - - - - - ns
VCC = 1.1 V to 1.3 V - 0.6 - 1.2 - 1.2 - ns
VCC = 1.4 V to 1.6 V - 0.3 - 0.6 - 0.6 - ns
VCC = 1.65 V to 1.95 V - 0.4 - 0.5 - 0.5 - ns
VCC = 2.3 V to 2.7 V - 0.2 - 0.4 - 0.4 - ns
VCC = 3.0 V to 3.6 V - 0.3 - 0.4 - 0.4 - ns
DtoCP LOW;
see Figure 9
VCC = 0.8 V - 3.0 - - - - - ns
VCC = 1.1 V to 1.3 V - 0.5 - 1.2 - 1.2 - ns
VCC = 1.4 V to 1.6 V - 0.3 - 0.7 - 0.7 - ns
VCC = 1.65 V to 1.95 V - 0.4 - 0.7 - 0.7 - ns
VCC = 2.3 V to 2.7 V - 0.5 - 0.7 - 0.7 - ns
VCC = 3.0 V to 3.6 V - 0.6 - 0.8 - 0.8 - ns
thhold time D to CP; see Figure 9
VCC = 0.8 V - 1.9 - - - - - ns
VCC = 1.1 V to 1.3 V - 0.3 - 0.5 - 0.5 - ns
VCC = 1.4 V to 1.6 V - 0.2 - 0.2 - 0.2 - ns
VCC = 1.65 V to 1.95 V - 0.2 - 0.1 - 0.1 - ns
VCC = 2.3 V to 2.7 V - 0.2 - 0.1 - 0.1 - ns
VCC = 3.0 V to 3.6 V - 0.2 - 0.1 - 0.1 - ns
trec recovery time RD; see Figure 10
VCC = 1.1 V to 1.3 V - 0.5 - 0.9 - 0.9 - ns
VCC = 1.4 V to 1.6 V - 0.2 - 0.6 - 0.6 - ns
VCC = 1.65 V to 1.95 V - 0.2 - 0.4 - 0.4 - ns
VCC = 2.3 V to 2.7 V - 0.1 - 0.1 - 0.1 - ns
VCC = 3.0 V to 3.6 V - 0.1 - 0.1 - 0.1 - ns
SD; see Figure 10
VCC = 1.1 V to 1.3 V - 0.5 - 0.3 - 0.3 - ns
VCC = 1.4 V to 1.6 V - 0.4 - 0.1 - 0.1 - ns
VCC = 1.65 V to 1.95 V - 0.3 - 0 - 0 - ns
VCC = 2.3 V to 2.7 V - 0.2 - 0.1 - 0.1 - ns
VCC = 3.0 V to 3.6 V - 0.1 - 0.1 - 0.1 - ns
Table 9. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 11.
Symbol Parameter Conditions Tamb = 25 C Tamb = 40 C to +125 CUnit
Min Typ[1] Max Min Max
(85 C) Min Max
(125 C)
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 15 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
[1] All typical values are measured at nominal VCC.
[2] tpd is the same as tPLH and tPHL.
[3] CPD is used to determine the dynamic power dissipation (PD in W).
PD=C
PD VCC2fiN+(CLVCC2fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CLVCC2fo) = sum of outputs.
tWpulse width CP HIGH or LOW;
see Figure 9
VCC = 1.1 V to 1.3 V - 2.1 - 2.7 - 2.7 - ns
VCC = 1.4 V to 1.6 V - 1.1 - 1.5 - 1.5 - ns
VCC = 1.65 V to 1.95 V - 0.9 - 1.6 - 1.6 - ns
VCC = 2.3 V to 2.7 V - 0.6 - 1.7 - 1.7 - ns
VCC = 3.0 V to 3.6 V - 0.6 - 1.9 - 1.9 - ns
SD or RD LOW;
see Figure 10
VCC = 1.1 V to 1.3 V - 4.2 - 11.3 - 11.5 - ns
VCC = 1.4 V to 1.6 V - 2.3 - 6.2 - 6.4 - ns
VCC = 1.65 V to 1.95 V - 1.8 - 4.8 - 5.0 - ns
VCC = 2.3 V to 2.7 V - 1.2 - 3.3 - 3.5 - ns
VCC = 3.0 V to 3.6 V - 1.1 - 2.6 - 2.8 - ns
CPD power
dissipation
capacitance
fi = 1 M Hz;
VI=GNDtoV
CC
[3]
VCC = 0.8 V - 2.8 - - - - - pF
VCC = 1.1 V to 1.3 V - 2.9 - - - - - pF
VCC = 1.4 V to 1.6 V - 3.0 - - - - - pF
VCC = 1.65 V to 1.95 V - 3.0 - - - - - pF
VCC = 2.3 V to 2.7 V - 3.5 - - - - - pF
VCC = 3.0 V to 3.6 V - 3.9 - - - - - pF
Table 9. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 11.
Symbol Parameter Conditions Tamb = 25 C Tamb = 40 C to +125 CUnit
Min Typ[1] Max Min Max
(85 C) Min Max
(125 C)
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 16 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
12. Waveforms
Measurement points are given in Table 10.
The shaded areas indicate when the input is permitted to change for predictable output performance.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 9. The clock input (CP) to o utput (Q, Q) propagation delays, the data input (D) to clock input (CP) set-up and
hold times and the clock input (CP) pulse width and maximum frequency
Table 10. Measurement points
Supply voltage Output Input
VCC VMVMVItr = tf
0.8 V to 3.6 V 0.5 VCC 0.5 VCC VCC 3.0 ns
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 17 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
Measurement points are given in Table 10.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 10. The set input (SD) and re s et input (RD) to output (Q, Q) propagation delays, the set inp ut (S D) and reset
input (RD) pulse widths and the reset input (RD) to clock input (CP) recovery time
DDH
5'LQSXW
6'LQSXW
&3LQSXW
4RXWSXW
4RXWSXW
W3/+
WUHF
WUHF
W:
W3+/
W:
90
92+
92+
92/
92/
90
90
W3/+
90
W3+/
90
9,
*1'
9,
*1'
9,
*1'
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 18 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
[1] For measuring enable and disable times RL = 5 k
For measuring propagation delays, setup and hold times and pulse width RL = 1 M.
Test data is given in Table 11.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 11. Test circuit for measuring switching times
DDF
'87
57
9,92
9(;7
9&&
5/
Nȍ
&/
*
Table 11. Test data
Supply voltage Load VEXT
VCC CLRL[1] tPLH, tPHL tPZH, tPHZ tPZL, tPLZ
0.8 V to 3.6 V 5 pF, 10 pF, 15 pF and 30 pF 5 k or 1 Mopen GND 2 VCC
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 19 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
13. Package outline
Fig 12. Package outline SOT765-1 (VSSOP8)
5HIHUHQFHV
2XWOLQH
YHUVLRQ
(XURSHDQ
SURMHFWLRQ ,VVXHGDWH
,(& -('(& -(,7$
627 02
VRWBSR


8QLW
PP
PD[
QRP
PLQ
   


$
PD[
'LPHQVLRQVPPDUHWKHRULJLQDOGLPHQVLRQV
1RWH
3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG
3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG
96623SODVWLFYHU\WKLQVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP 627
$$

$ESF'
 ( H+
(/

/S4YZ
  
\=

       
   
ș
VFDOH
PP
GHWDLO;
$
\
H
;
Y$
ES
Z
'
=

ș
$
$
4
/S
$
$
/
+(
(
F
SLQLQGH[
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 20 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
Fig 13. Package outline SOT833-1 (XSON8)
WHUPLQDO
LQGH[DUHD
5()(5(1&(6
287/,1(
9(56,21
(8523($1
352-(&7,21 ,668('$7(
,(& -('(& -(,7$
627 
02

627


',0(16,216PPDUHWKHRULJLQDOGLPHQVLRQV
;621SODVWLFH[WUHPHO\WKLQVPDOORXWOLQHSDFNDJHQROHDGVWHUPLQDOVERG\[[PP
'
(
H
H
$
E
/
/
HH
PP
VFDOH
1RWHV
,QFOXGLQJSODWLQJWKLFNQHVV
&DQEHYLVLEOHLQVRPHPDQXIDFWXULQJSURFHVVHV
81,7
PP 





$
PD[ E (


'HH
/


/

$
PD[
 
î

î

$
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 21 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
Fig 14. Package outline SOT1089 (XSON8)
5HIHUHQFHV
2XWOLQH
YHUVLRQ
(XURSHDQ
SURMHFWLRQ ,VVXHGDWH
,(& -('(& -(,7$
627
02
VRWBSR


8QLW
PP
PD[
QRP
PLQ
  





 



$
'LPHQVLRQV
1RWH
,QFOXGLQJSODWLQJWKLFNQHVV
9LVLEOHGHSHQGLQJXSRQXVHGPDQXIDFWXULQJWHFKQRORJ\
;621H[WUHPHO\WKLQVPDOORXWOLQHSDFNDJHQROHDGV
WHUPLQDOVERG\[[PP 627
$E/






'(HH
/
PP
VFDOH
WHUPLQDO
LQGH[DUHD
(
'
GHWDLO;
$
$
/
/
E
H
H
WHUPLQDO
LQGH[DUHD
î
î
;
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 22 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
Fig 15. Package outline SOT996-2 (XSON8)
5HIHUHQFHV
2XWOLQH
YHUVLRQ
(XURSHDQ
SURMHFWLRQ ,VVXHGDWH
,(& -('(& -(,7$
627
VRWBSR


8QLW
PP
PD[
QRP
PLQ













  
$
'LPHQVLRQVPPDUHWKHRULJLQDOGLPHQVLRQV
;621SODVWLFH[WUHPHO\WKLQVPDOORXWOLQHSDFNDJHQROHDGV
WHUPLQDOVERG\[[PP 627
$E


'(HH
//
/Y

Z\

\

PP
VFDOH
&
\
&
\
;
WHUPLQDO
LQGH[DUHD
% $'
(
GHWDLO;
$$
E


H
H$& %
Y
&Z
/
/
/
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 23 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
Fig 16. Package outline SOT902-2 (XQFN8)
5HIHUHQFHV
2XWOLQH
YHUVLRQ
(XURSHDQ
SURMHFWLRQ ,VVXHGDWH
,(& -('(& -(,7$
627 
02

VRWBSR


8QLW
PP
PD[
QRP
PLQ
 







 



 
$

N
'LPHQVLRQV
1RWH
3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG
;4)1SODVWLFH[WUHPHO\WKLQTXDGIODWSDFNDJHQROHDGV
WHUPLQDOVERG\[[PP 627
$E



'(HH
/



/



/YZ

\\

PP
VFDOH
WHUPLQDO
LQGH[DUHD
% $'
(
;
&
\
&
\
WHUPLQDO
LQGH[DUHD
/N
/
/
E
H
H
$&%Y
&Z
PHWDODUHD
QRWIRUVROGHULQJ
N
/
$
$
GHWDLO;
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 24 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
Fig 17. Package outline SOT1 116 (XSON8)
5HIHUHQFHV
2XWOLQH
YHUVLRQ
(XURSHDQ
SURMHFWLRQ ,VVXHGDWH
,(& -('(& -(,7$
627
VRWBSR


8QLW
PP
PD[
QRP
PLQ
  





 



$
'LPHQVLRQV
1RWH
,QFOXGLQJSODWLQJWKLFNQHVV
9LVLEOHGHSHQGLQJXSRQXVHGPDQXIDFWXULQJWHFKQRORJ\
;621H[WUHPHO\WKLQVPDOORXWOLQHSDFNDJHQROHDGV
WHUPLQDOVERG\[[PP 627
$E



'(HH
/



/
PP
VFDOH
WHUPLQDO
LQGH[DUHD
(
'
î
î
$$
HHH
H
/
/
E
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 25 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
Fig 18. Package outline SOT1203 (XSON8)
5HIHUHQFHV
2XWOLQH
YHUVLRQ
(XURSHDQ
SURMHFWLRQ ,VVXHGDWH
,(& -('(& -(,7$
627
VRWBSR


8QLW
PP
PD[
QRP
PLQ
  





 



$
'LPHQVLRQV
1RWH
,QFOXGLQJSODWLQJWKLFNQHVV
9LVLEOHGHSHQGLQJXSRQXVHGPDQXIDFWXULQJWHFKQRORJ\
;621H[WUHPHO\WKLQVPDOORXWOLQHSDFNDJHQROHDGV
WHUPLQDOVERG\[[PP 627
$E



'(HH
/



/
PP
VFDOH
WHUPLQDO
LQGH[DUHD
(
'
î
î
$
$
H
/
/
E
HHH
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 26 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
Fig 19. Package outline SOT1233 (X2SON8)
5HIHUHQFHV
2XWOLQH
YHUVLRQ
(XURSHDQ
SURMHFWLRQ ,VVXHGDWH
,(& -('(& -(,7$
627 
VRWBSR


8QLW
PP
PD[
QRP
PLQ

 
$
'LPHQVLRQVPPDUHWKHRULJLQDOGLPHQVLRQV
627
$E

''
KHH
/

Z

\

\




 





UHI

Y


(

E



VFDOH
PP
;621SODVWLFWKHUPDOHQKDQFHGH[WUHPHO\WKLQVPDOORXWOLQHSDFNDJHQROHDGV
WHUPLQDOVERG\[[PP
;
GHWDLO;
$
$
SLQ
LQGH[DUHD
SLQ
LQGH[DUHD
'
$
(
%
H H
$&%
Y
&
Z
E
[
E
[
/
[
H


'K

&
\
\
&
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 27 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
14. Abbreviations
15. Revision history
Table 12. Abbreviations
Acronym Description
CDM Charged Device Model
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
Table 13. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74AUP1G74 v.10 20161028 Product data sheet - 74AUP1G74 v.9
Modifications: •Added type number 74AUP1G74GX (SOT 1233/X2SON8)
74AUP1G74 v.9 20140106 Product data sheet - 74AUP1G74 v.8
Modifications: •Conditions for fmax corrected (errata).
74AUP1G74 v.8 20130123 Product data sheet - 74AUP1G74 v.7
Modifications: •For type number 74AUP1G74GD XSON8U has changed to XSON8.
74AUP1G74 v.7 20120522 Product data sheet - 74AUP1G74 v.6
74AUP1G74 v.6 20111128 Product data sheet - 74AUP1G74 v.5
74AUP1G74 v.5 20100726 Product data sheet - 74AUP1G74 v.4
74AUP1G74 v.4 20080603 Product data sheet - 74AUP1G74 v.3
74AUP1G74 v.3 20080207 Product data sheet - 74AUP1G74 v.2
74AUP1G74 v.2 20070515 Product data sheet - 74AUP1G74 v.1
74AUP1G74 v.1 20060825 Product data sheet - -
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 28 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
16. Legal information
16.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device (s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may dif fe r in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nexperia.com.
16.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not b e relied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict wit h the short data sheet, th e
full data sheet shall pre va il.
Product specificatio n — The information and data provided in a Product
data sheet shall define the specification of the product as agr eed between
Nexperia and its customer, unless Nexperia and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the Nexperia product is
deemed to off er functions and qualities beyond those described in the
Product data sheet.
16.3 Disclaimers
Limited warr a nty and liability — Information in this document is believed to
be accurate and reliable. However, Nexperia does not give any
representations or warrant ies, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no
responsibility for the content in this document if provided by an information
source outside of Nexperia.
In no event shall Nexperia be liable for any indirect, incidental,
punitive, special or consequ ential damages (including - wit hout limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use — Nexperia products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of a Nexperia product can reasonably be expected
to result in perso nal injury, death or severe property or environmental
damage. Nexperia and its suppliers accept no liability for
inclusion and/or use of Nexperia products in such equipment or
applications and ther efore such inclu sion and/or use is at the cu stomer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using Nexperia products, and Nexperia
accepts no liability for any assistance with applicati ons or customer product
design. It is customer’s sole responsibility to determine whether the Nexperia
product is suitable and fit for the customer’s applications and
products planned, as well as fo r the planned application and use of
customer’s third party customer(s). Custo mers should provide appropriate
design and operating safeguards to minimize the risks associated with t heir
applications and products.
Nexperia does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party custo mer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using Nexperia
products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). Nexperia does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nexperia.com/profile/terms, unless otherwise
agreed in a valid written individua l agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. Nexperia hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of Nexperia products by customer.
No offer to sell or license — Nothing i n this document may be interpreted or
construed as an of fer t o sell product s that is open for accept ance or the gr ant,
conveyance or implication of any license under any copyrights, patents or
other industrial or inte llectual property rights.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contain s data from the objective specification for product development .
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
© Nexperia B.V. 2017. All rights reserved
74AUP1G74 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 28 October 2016 29 of 30
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified,
the product is not suitable for aut omotive use. It i s neither qua lified nor tested
in accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of
non-automotive qualified products in au tomotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automot ive specifications and standards, custome r
(a) shall use the product without Nexperia’s warranty of the
product for such au tomotive applications, use and specificatio ns, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies Nexperia for any
liability, damages or failed product claims resulting f rom customer design an d
use of the product for automotive applications beyond Nexperia’s
standard warranty and Nexperia’s product specifications.
Translations — A non-English (translated) version of a docume nt is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
16.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respective ow ners.
17. Contact information
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Nexperia 74AUP1G74
Low-power D-ty pe flip-flop with set and reset; positive-edge trigger
18. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3
6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
7 Functional description . . . . . . . . . . . . . . . . . . . 5
8 Limiting values . . . . . . . . . . . . . . . . . . . . . . . . . . 6
9 Recommended operating conditions. . . . . . . . 6
10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 7
11 Dynamic characteristics . . . . . . . . . . . . . . . . . 10
12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 19
14 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 27
15 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 27
16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 28
16.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 28
16.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
16.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 28
16.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 29
17 Contact information. . . . . . . . . . . . . . . . . . . . . 29
18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
© Nexperia B.V. 2017. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release:
28 October 2016