AVAILABLE
Functional Diagrams
Pin Configurations appear at end of data sheet.
Functional Diagrams continued at end of data sheet.
UCSP is a trademark of Maxim Integrated Products, Inc.
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
EVALUATION KIT AVAILABLE
General Description
The MAX668/MAX669 constant-frequency, pulse-width-
modulating (PWM), current-mode DC-DC controllers are
designed for a wide range of DC-DC conversion applica-
tions including step-up, SEPIC, flyback, and isolated-
output configurations. Power levels of 20W or more can
be controlled with conversion efficiencies of over 90%.
The 1.8V to 28V input voltage range supports a wide
range of battery and AC-powered inputs. An advanced
BiCMOS design features low operating current (220µA),
adjustable operating frequency (100kHz to 500kHz),
soft-start, and a SYNC input allowing the MAX668/
MAX669 oscillator to be locked to an external clock.
DC-DC conversion efficiency is optimized with a low
100mV current-sense voltage as well as with Maxim’s
proprietary Idle Mode™ control scheme. The controller
operates in PWM mode at medium and heavy loads for
lowest noise and optimum efficiency, then pulses only as
needed (with reduced inductor current) to reduce oper-
ating current and maximize efficiency under light loads.
A logic-level shutdown input is also included, reducing
supply current to 3.5µA.
The MAX669, optimized for low input voltages with a
guaranteed start-up voltage of 1.8V, requires boot-
strapped operation (IC powered from boosted output). It
supports output voltages up to 28V. The MAX668 oper-
ates with inputs as low as 3V and can be connected in
either a bootstrapped or non-bootstrapped (IC powered
from input supply or other source) configuration. When
not bootstrapped, it has no restriction on output voltage.
Both ICs are available in an extremely compact 10-pin
µMAX package.
Features
o1.8V Minimum Start-Up Voltage (MAX669)
oWide Input Voltage Range (1.8V to 28V)
oTiny 10-Pin µMAX Package
oCurrent-Mode PWM and Idle Mode™ Operation
oEfficiency over 90%
oAdjustable 100kHz to 500kHz Oscillator or
SYNC Input
o220µA Quiescent Current
oLogic-Level Shutdown
oSoft-Start
Applications
Cellular Telephones
Telecom Hardware
LANs and Network Systems
POS Systems
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
19-4778; Rev 2; 1/12
Idle Mode is a trademark of Maxim Integrated Products.
+ Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
/V Denotes an automotive qualified part.
Note: Devices are also available in a lead(Pb)-free/RoHS-com-
pliant package. Specify lead-free by adding “+” to the part
number when ordering.
Ordering Information
Typical Operating Circuit
MAX669
FREQ CS+
SYNC/
SHDN
PGND
FB
GND
VCC EXT
LDO
REF
VOUT = 28V
VIN = 1.8V to 28V
1
2
3
4
5
10
9
8
7
6
SYNC/SHDN
VCC
EXT
PGNDREF
GND
FREQ
LDO
MAX668
MAX669
µMAX
TOP VIEW
CS+FB
Pin Configuration
PART TEMP RANGE PIN - PA C K A G E
MAX668EUB -40°C to +85°C 10 µMAX
MAX669EUB -40°C to +85°C 10 µMAX
MAX669EUB/V+T -40°C to +85°C 10 µMAX
MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VCC = VLDO = +5V, ROSC = 200kΩ, TA= 0°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.)
VCC to GND ..........................................................-0.3V to +30V
PGND to GND....................................................................±0.3V
SYNC/SHDN to GND .............................................-0.3V to +30V
EXT, REF to GND.....................................-0.3V to (VLDO + 0.3V)
LDO, FREQ, FB, CS+ to GND ................................ -0.3V to +6V
LDO Output Current...........................................-1mA to +20mA
REF Output Current..............................................-1mA to +1mA
LDO Short Circuit to GND .........................................Momentary
REF Short Circuit to GND ..........................................Continuous
Continuous Power Dissipation (TA= +70°C)
10-Pin µMAX (derate 5.6mW/°C above +70°C) ............444mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering,10sec) ..............................+300°C
Soldering Temperature (Reflow) ......................................+300°C
Lead(Pb)-Free Packages..............................................+260°C
Packages Containing Lead(Pb)....................................+240°C
85 100 115
425 500 575
225 250 275ROSC = 200kΩ±1%
Oscillator Frequency
Oscillator
1.0 1.1 1.2Rising edge, 1% hysteresisREF Undervoltage Lockout Threshold
-2 -10REF load = 0 to 50µA REF Load Regulation
1.225 1.250 1.275No load, CREF = 0.22µFREF Output Voltage
2.40 2.50 2.60
Sensed at LDO, falling edge,
hysteresis = 1%, MAX668 only
Undervoltage Lockout Threshold
2.65 5.50
3V ≤VCC ≤28V
(includes LDO dropout)
4.50 5.00 5.50
LDO Output Voltage
Reference and LDO Regulators
328MAX668
PWM Controller
Input Voltage Range, VCC
3.5 6
SYNC/SHDN = GND, VCC = 28V
Shutdown Supply Current (VCC)
220 350VFB = 1.30V, VCC = 3V to 28VVCC Supply Current (Note 1)
0.2 1CS+ forced to GNDCS+ Input Current
51525Idle Mode Current-Sense Threshold
2.7 5.5Input Voltage Range with VCC Tied to LDO
1.225 1.250 1.275FB Threshold
1 20 VFB = 1.30VFB Input Current
85 100 115Current Limit Threshold
MIN TYP MAXCONDITIONSPARAMETER
kHz
V
mV
V
V
V
µA
µA
µA
mV
mV
nA
V
V
V
UNITS
MAX669 1.8 28
LDO load =
∞to 400Ω
5V ≤VCC ≤28V
(includes LDO dropout)
ROSC = 500kΩ±1%
ROSC = 100kΩ±1%
0.013
Typically 0.013% per mV on CS+;
VCS+ range is 0 to 100mV for 0 to full
load current.
FB Threshold Load Regulation %/mV
0.012
Typically 0.012% per % duty factor on
EXT; EXT duty factor for a step-up is:
100% (1 – VIN/VOUT)
FB Threshold Line Regulation %/%
REFERENCE AND LDO REGULATORS
OSCILLATOR
PWM CONTROLLER
2
Maxim Integrated
MAX668/MAX669
V
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
70
100 500SYNC Input Frequency Range
SYNC/SHDN Falling Edge to Shutdown Delay
2 5 EXT high or lowEXT On-Resistance
1EXT forced to 2V
Ω
EXT Sink/Source Current
1.51.8V < VCC < 3.0V (MAX669)
A
SYNC/SHDN Input High Voltage
0.301.8V < VCC < 3.0V (MAX669)
µA
SYNC/SHDN Input Low Voltage
0.5 3.0VSYNC/SHDN = 5V
SYNC/SHDN Input Current 1.5 6.5VSYNC/SHDN = 28V
V
MIN TYP MAXCONDITIONSPARAMETER
µs
kHz
UNITS
ELECTRICAL CHARACTERISTICS (continued)
(VCC = VLDO = +5V, ROSC = 200kΩ, TA= 0°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.)
ELECTRICAL CHARACTERISTICS
(VCC = VLDO = +5V, ROSC = 200kΩ, TA= -40°C to +85°C, unless otherwise noted.) (Note 2)
2.40 2.60
Sensed at LDO, falling edge,
hysteresis = 1%, MAX669 only
LDO Undervoltage Lockout Threshold
2.65 5.50
3V ≤VCC ≤28V
(includes LDO dropout)
4.50 5.50
5V ≤VCC ≤28V
(includes LDO dropout)
LDO Output Voltage
Reference and LDO Regulators
V
328MAX668
V
PWM Controller
Input Voltage Range, VCC
6
SYNC/SHDN = GND, VCC = 28V
Shutdown Supply Current (VCC)
350VFB = 1.30V, VCC = 3V to 28V
µA
VCC Supply Current (Note 1)
1CS+ forced to GND
µA
CS+ Input Current
327
µA
Idle Mode Current-Sense Threshold
2.7 5.5
mV
Input Voltage Range with VCC Tied to LDO
1.22 1.28
mV
FB Threshold
20 VFB = 1.30V nAFB Input Current
85 115
V
Current-Limit Threshold
MIN MAXCONDITIONS
V
PARAMETER
V
UNITS
86 90 94ROSC = 500kΩ±1%
MAX669
LDO load =
∞to 400Ω
1.8 28
3.0V < VCC < 28V
3.0V < VCC < 28V 2.0
0.45
V
200
Not testedSYNC Input Rise/Fall Time ns
50 200Minimum SYNC Input Low Pulse Width ns
20 45Minimum SYNC Input-Pulse Duty Cycle %
290Minimum EXT Pulse Width ns
87 90 93ROSC = 200kΩ±1%
86 90 94ROSC = 100kΩ±1%Maximum Duty Cycle %
PWM CONTROLLER
REFERENCE AND LDO REGULATORS
Maxim Integrated
3
MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
ns
%Minimum SYNC Input-Pulse Duty Cycle 45
Minimum SYNC Input Low Pulse Width 200
SYNC Input Rise/Fall Time Not tested 200 ns
ELECTRICAL CHARACTERISTICS (continued)
(VCC = VLDO = +5V, ROSC = 200kΩ, TA= -40°C to +85°C, unless otherwise noted.)
ROSC = 200kΩ±1% 87 93
SYNC Input Frequency Range 100 500 kHz
1.8V < VCC < 3.0V (MAX669) 0.30 V
1.8V < VCC < 3.0V (MAX669) 1.5 V
VSYNC/SHDN = 28V 6.5 µA
EXT On-Resistance EXT high or low 5Ω
SYNC/SHDN Input Current VSYNC/SHDN = 5V 3.0
Note 1: This is the VCC current consumed when active but not switching. Does not include gate-drive current.
Note 2: Limits at TA= -40°C are guaranteed by design.
222 278
UNITSPARAMETER CONDITIONS MIN MAX
ROSC = 200kΩ±1%
%Maximum Duty Cycle
ROSC = 500kΩ±1% 86 94
425 575ROSC =100kΩ±1% kHzOscillator Frequency
85 115ROSC = 500kΩ±1%
ROSC = 100kΩ±1% 86 94
SYNC/SHDN Input High Voltage 3.0V < VCC < 28V 2.0
SYNC/SHDN Input Low Voltage 3.0V < VCC < 28V 0.45
VREF Output Voltage No load, CREF = 0.22µF 1.22 1.28
mVREF Load Regulation REF load = 0 to 50µA -10
VREF Undervoltage Lockout Threshold Rising edge, 1% hysteresis 1.0 1.2
OSCILLATOR
4
Maxim Integrated
MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
50
60
65
70
75
80
85
90
95
1 10 100 1000 10,000
EFFICIENCY vs. LOAD CURRENT
(VOUT = 5V)
MAX668 toc01
LOAD CURRENT (mA)
EFFICIENCY (%)
55
VIN = 3.3V
VIN = 3.6V
VIN = 2V
VIN = 2.7V
BOOTSTRAPPED
FIGURE 3
R4 = 200kΩ
70
1 10,000100010 100
MAX668 EFFICIENCY vs.
LOAD CURRENT (VOUT = 12V)
85
75
95
80
90
MAX668 toc02
LOAD CURRENT (mA)
EFFICIENCY (%)
VIN = 5V
NON-BOOTSTRAPPED
FIGURE 4
R4 = 200kΩ
MAX668 EFFICIENCY vs.
LOAD CURRENT (VOUT = 24V)
MAX668 toc03
LOAD CURRENT (mA)
EFFICIENCY (%)
70
1 10,000100010 100
85
75
95
80
90 VIN = 8V
VIN = 5V
VIN = 12V
NON-BOOTSTRAPPED
FIGURE 4
R4 = 200kΩ
0
1.5
1.0
0.5
2.0
2.5
3.0
0 400300100 200 500 600 700 800 900 1000
MAX669 MINIMUM START-UP VOLTAGE
vs. LOAD CURRENT
MAX668 toc04
LOAD CURRENT (mA)
MINIMUM START-UP VOLTAGE (V)
VOUT = 5V
VOUT = 12V
BOOTSTRAPPED
FIGURE 2
0
0.5
1.5
2.0
2.5
3.0
3.5
0105 15202530
SHUTDOWN CURRENT vs.
SUPPLY VOLTAGE
MAX668 toc07
SUPPLY VOLTAGE (V)
SHUTDOWN CURRENT (µA)
1.0
CURRENT INTO VCC PIN
MAX668
MAX669
0
400
200
800
600
1000
1200
010155 202530
SUPPLY CURRENT vs.
SUPPLY VOLTAGE
MAX668 toc05
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (µA)
MAX669
MAX668
CURRENT INTO VCC PIN
ROSC = 500kΩ
0
500
1000
2000
2500
3000
3500
4000
042681012
NO-LOAD SUPPLY CURRENT vs.
SUPPLY VOLTAGE
MAX668 toc06
SUPPLY VOLTAGE (V)
NO-LOAD SUPPLY CURRENT (µA)
1500
VOUT = 12V
BOOTSTRAPPED
FIGURE 2
R4 = 200kΩ
150
190
210
170
250
230
270
290
-40 -20 0 20 40 60 80 100
SUPPLY CURRENT vs.
TEMPERATURE
MAX668 toc08
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
ROSC = 100kΩ
ROSC = 200kΩ
ROSC = 500kΩ
0.1 1 10 20
LDO DROPOUT VOLTAGE vs.
LDO CURRENT
MAX668 toc09
LDO CURRENT (mA)
LDO DROPOUT VOLTAGE (mV)
300
0
50
100
150
200
250
VIN = 3V
VIN = 4.5V
Typical Operating Characteristics
(Circuits of Figures 2, 3, 4, and 5; TA= +25°C; unless otherwise noted.)
Maxim Integrated
5
MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
Typical Operating Characteristics (continued)
(Circuits of Figures 2, 3, 4, and 5; TA= +25°C; unless otherwise noted.)
0
100
150
50
250
300
200
400
450
350
500
0 100 200 300 400 500
SWITCHING FREQUENCY vs. ROSC
MAX668 toc11
ROSC (kΩ)
SWITCHING FREQUENCY (kHz)
VCC = 5V
100 1000 10,000
EXT RISE/FALL TIME vs.
CAPACITANCE
MAX668 toc13
CAPACITANCE (pF)
EXT RISE/FALL TIME (ns)
60
0
10
20
30
40
50
tR, VCC = 3.3V
tF, VCC = 3.3V
tR, VCC = 5V
tF, VCC = 5V
6
Maxim Integrated
MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
EXITING SHUTDOWN
MAX668 toc14
OUTPUT
VOLTAGE
5V/div
INDUCTOR
CURRENT
2A/div
SHUTDOWN
VOLTAGE
5V/div
MAX668, VIN = 5V, VOUT = 12V, LOAD = 1.0A, ROSC = 100kΩ,
LOW VOLTAGE, NON-BOOTSTRAPPED
500µs/div
0V
0V
0A
ENTERING SHUTDOWN
MAX668 toc15
OUTPUT
VOLTAGE
5V/div
SHUTDOWN
VOLTAGE
5V/div
MAX668, VIN = 5V, VOUT = 12V, LOAD = 1.0A,
LOW VOLTAGE, NON-BOOTSTRAPPED
200µs/div
0V
0V
HEAVY-LOAD SWITCHING WAVEFORM
MAX668 toc16
VOUT
200mV/div
AC-COUPLED
IL
1A/div
Q1, DRAIN
5V/div
MAX668, VIN = 5V, VOUT = 12V, ILOAD = 1.0A,
LOW VOLTAGE, NON-BOOTSTRAPPED
1µs/div
0V
0A
LOAD-TRANSIENT RESPONSE
MAX668 toc18
OUTPUT
VOLTAGE
AC-COUPLED
100mV/div
LOAD
CURRENT
1A/div
MAX668, VIN = 5V, VOUT = 12V, ILOAD = 0.1A TO 1.0A,
LOW VOLTAGE, NON-BOOTSTRAPPED
1ms/div
LIGHT-LOAD SWITCHING WAVEFORM
MAX668 toc17
VOUT
100mV/div
AC-COUPLED
IL
1A/div
Q1, DRAIN
5V/div
MAX668, VIN = 5V, VOUT = 12V, ILOAD = 0.1A,
LOW VOLTAGE, NON-BOOTSTRAPPED
1µs/div
0V
0A
Typical Operating Characteristics (continued)
(Circuits of Figures 2, 3, 4, and 5; TA= +25°C; unless otherwise noted.)
LINE-TRANSIENT RESPONSE
MAX668 toc19
INPUT
VOLTAGE
5V/div
0V
OUTPUT
VOLTAGE
100mV/div
AC-COUPLED
MAX668, VIN = 5V TO 8V, VOUT = 12V, LOAD = 1.0A,
HIGH VOLTAGE, NON-BOOTSTRAPPED
20ms/div
Maxim Integrated
7
MAX668/MAX669
Detailed Description
The MAX668/MAX669 current-mode PWM controllers
operate in a wide range of DC-DC conversion applica-
tions, including boost, SEPIC, flyback, and isolated out-
put configurations. Optimum conversion efficiency is
maintained over a wide range of loads by employing
both PWM operation and Maxim’s proprietary Idle
Mode control to minimize operating current at light
loads. Other features include shutdown, adjustable
internal operating frequency or synchronization to an
external clock, soft start, adjustable current limit, and a
wide (1.8V to 28V) input range.
MAX668 vs. MAX669 Differences
Differences between the MAX668 and MAX669 relate
to their use in bootstrapped or non-bootstrapped cir-
cuits (Table 1). The MAX668 operates with inputs as
low as 3V and can be connected in
either
a boot-
strapped or non-bootstrapped (IC powered from input
supply or other source) configuration. When not boot-
strapped, the MAX668 has no restriction on output volt-
age. When bootstrapped, the output cannot exceed
28V.
The MAX669 is optimized for low input voltages (down
to 1.8V) and
requires
bootstrapped operation (IC pow-
ered from VOUT) with output voltages no greater than
28V. Bootstrapping is required because the MAX669
does not have undervoltage lockout, but instead drives
EXT with an open-loop, 50% duty-cycle start-up oscilla-
tor when LDO is below 2.5V. It switches to closed-loop
operation only when LDO exceeds 2.5V. If a non-boot-
strapped connection is used with the MAX669 and if
VCC (the input voltage) remains below 2.7V, the output
voltage will soar above the regulation point. Table 2
recommends the appropriate device for each biasing
option.
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
NAME FUNCTION
1LDO 5V On-Chip Regulator Output. This regulator powers all internal circuitry including the EXT gate driver.
Bypass LDO to GND with a 1µF or greater ceramic capacitor.
2FREQ
Oscillator Frequency Set Input. A resistor from FREQ to GND sets the oscillator from 100kHz (ROSC =
500kΩ) to 500kHz (ROSC = 100kΩ). fOSC = 5 x 1010 / ROSC. ROSC is still required if an external clock is used
at SYNC/SHDN. (See
SYNC/SHDN and FREQ Inputs
section.)
PIN
3GND Analog Ground
7PGND Power Ground for EXT Gate Driver and Negative Current-Sense Input
6CS+ Positive Current-Sense Input. Connect a current-sense resistor, RCS, between CS+ and PGND.
5FB Feedback Input. The FB threshold is 1.25V.
4REF 1.25V Reference Output. REF can source 50µA. Bypass to GND with a 0.22µF ceramic capacitor.
10 SYNC/
SHDN
Shutdown control and Synchronization Input. There are three operating modes:
• SYNC/SHDN low: DC-DC off.
• SYNC/SHDN high: DC-DC on with oscillator frequency set at FREQ by ROSC.
• SYNC/SHDN clocked: DC-DC on with operating frequency set by SYNC clock input. DC-DC conversion
cycles initiate on rising edge of input clock.
9 VCC Input Supply to On-Chip LDO Regulator. VCC accepts inputs up to 28V. Bypass to GND with a 0.1µF ceramic
capacitor.
8EXT External MOSFET Gate-Driver Output. EXT swings from LDO to PGND.
Pin Description
Table 1. MAX668/MAX669 Comparison
MAX668 MAX669
VCC Input
Range 3V to 28V 1.8V to 28V
Operation
Bootstrapped or nonboot-
strapped. VCC can be con-
nected to input, output, or
other voltage source such as
a logic supply.
Must be boot-
strapped (VCC
must be connect-
ed to boosted out-
put voltage, VOUT).
Under-
voltage
Lockout
IC stops switching for LDO
below 2.5V. No
Soft-Start Yes When LDO is
above 2.5V
FEATURE
8
Maxim Integrated
MAX668/MAX669
PWM Controller
The heart of the MAX668/MAX669 current-mode PWM
controller is a BiCMOS multi-input comparator that
simultaneously processes the output-error signal, the
current-sense signal, and a slope-compensation ramp
(Figure 1). The main PWM comparator is direct sum-
ming, lacking a traditional error amplifier and its associ-
ated phase shift. The direct summing configuration
approaches ideal cycle-by-cycle control over the out-
put voltage since there is no conventional error amp in
the feedback path.
In PWM mode, the controller uses fixed-frequency, cur-
rent-mode operation where the duty ratio is set by the
input/output voltage ratio (duty ratio = (VOUT - VIN) / VIN
in the boost configuration). The current-mode feedback
loop regulates peak inductor current as a function of
the output error signal.
At light loads the controller enters Idle Mode. During
Idle Mode, switching pulses are provided only as need-
ed to service the load, and operating current is mini-
mized to provide best light-load efficiency. The
minimum-current comparator threshold is 15mV, or 15%
of the full-load value (IMAX) of 100mV. When the con-
troller is synchronized to an external clock, Idle Mode
occurs only at very light loads.
Bootstrapped/Non-Bootstrapped Operation
Low-Dropout Regulator (LDO)
Several IC biasing options, including bootstrapped and
non-bootstrapped operation, are made possible by an
on-chip, low-dropout 5V regulator. The regulator input is
at VCC, while its output is at LDO. All MAX668/MAX669
functions, including EXT, are internally powered from
LDO. The VCC-to-LDO dropout voltage is typically
200mV (300mV max at 12mA), so that when VCC is less
than 5.2V, LDO is typically VCC - 200mV. When LDO is
in dropout, the MAX668/MAX669 still operate with VCC
as low as 3V (as long as LDO exceeds 2.7V), but with
reduced amplitude FET drive at EXT. The maximum
VCC input voltage is 28V.
LDO can supply up to 12mA to power the IC, supply
gate charge through EXT to the external FET, and sup-
ply small external loads. When driving particularly large
FETs at high switching rates, little or no LDO current
may be available for external loads. For example, when
switched at 500kHz, a large FET with 20nC gate charge
requires 20nC x 500kHz, or 10mA.
VCC and LDO allow a variety of biasing connections to
optimize efficiency, circuit quiescent current, and full-
load start-up behavior for different input and output
voltage ranges. Connections are shown in Figures 2, 3,
4, and 5. The characteristics of each are outlined in
Table 1.
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
ANTISAT MUX LOW-VOLTAGE
START-UP
OSCILLATOR
(MAX669 ONLY)
+A
-A X6
+C
-C X1
+S
-S X1
SLOPE COMPENSATION
SQ
BIAS
OSC OSC
FREQ
SYNC/SHDN
0
1
LDO
PGND
1.25V
REF
EXT
UVLO
VCC
R1
552k
R2
276k
R3
276k
100mV
15mV
IMAX
IMIN
MAIN PWM
COMPARATOR
1.25V
FB
CURRENT SENSE
CS+
MAX668
MAX669
LDO
MAX669 ONLY
R
Figure 1. MAX668/MAX669 Functional Diagram
Maxim Integrated
9
MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
MAX669
LDO
CS+
REF
FREQ
V+
SYNC/
SHDN
PGND
FB
GND
N1
EXT
VIN = 1.8V to 12V
C3
C2
C1
C4
R4
R1 R2
R3
C7
D1 C5 C6 C8
3
5
7
6
8
2
4
9
1
10
VOUT = 12V @ 0.5A
L1
Figure 2. MAX669 High-Voltage Bootstrapped Configuration
MAX669
LDO
CS+
REF
FREQ
VCC
SYNC/
SHDN
PGND
FB
GND
N1
EXT
VIN = 1.8V to 5V
C3
0.22µF
C2
1µF
R4
100k
1%
R1
0.02Ω
R2
75k
1%
R3
24.9k
1%
C7
220pF
D1
MBRS340T3 C4
68µF
10V
C5
68µF
10V
C6
0.1µF
3
5
7
6
8
2
4
9
1
10
VOUT = 5V @ 1A
C1
68µF
10V L1
4.7µH
FDS6680
IRF7401
Figure 3. MAX669 Low-Voltage Bootstrapped Configuration
Bootstrapped Operation
With bootstrapped operation, the IC is powered from
the circuit output (VOUT). This improves efficiency
when the input voltage is low, since EXT drives the FET
with a higher gate voltage than would be available from
the low-voltage input. Higher gate voltage reduces the
FET on-resistance, increasing efficiency. Other (unde-
sirable) characteristics of bootstrapped operation are
increased IC operating power (since it has a higher
operating voltage) and reduced ability to start up with
high load current at low input voltages. If the input volt-
age range extends below 2.7V, then bootstrapped
operation with the MAX669 is the only option.
With VCC connected to VOUT, as in Figure 2, EXT volt-
age swing is 5V when VCC is 5.2V or more, and VCC -
0.2V when VCC is less than 5.2V. If the output voltage
does not exceed 5.5V, the on-chip regulator can be
disabled by connecting VCC to LDO (Figure 3). This
eliminates the LDO forward drop and supplies maxi-
mum gate drive to the external FET.
10
Maxim Integrated
MAX668/MAX669
Non-Bootstrapped Operation
With non-bootstrapped operation, the IC is powered
from the input voltage (VIN) or another source, such as
a logic supply. Non-bootstrapped operation (Figure 4)
is recommended (but not required) for input voltages
above 5V, since the EXT amplitude (limited to 5V by
LDO) at this voltage range is no higher than it would be
with bootstrapped operation. Note that non-boot-
strapped operation is
required
if the output voltage
exceeds 28V, since this level is too high to safely con-
nect to VCC. Also note that only the MAX668 can be
used with non-bootstrapped operation.
If the input voltage does not exceed 5.5V, the on-chip
regulator can be disabled by connecting VCC to LDO
(Figure 5). This eliminates the regulator forward drop
and supplies the maximum gate drive to the external
FET for lowest on-resistance. Disabling the regulator
also reduces the non-bootstrapped minimum input volt-
age from 3V to 2.7V.
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
MAX668
LDO
CS+
REF
FREQ
VCC
SYNC/
SHDN
PGND
FB
GND
N1
EXT
VIN = 2.7V to 5.5V
C3
0.22µF
C2
1µF
R4
100k
1%
R1
0.02Ω
R2
218k
1%
R3
24.9k
1%
C7
220pF
D1
MBRS340T3 C4
68µF
20V
C5
68µF
20V
C6
0.1µF
3
5
7
6
8
2
4
9
1
10
VOUT = 12V @ 1A
C1
68µF
10V L1
4.7µH
FDS6680
Figure 5. MAX668 Low-Voltage Non-Bootstrapped Configuration
MAX668
LDO
CS+
REF
FREQ
VCC
PGND
FB
GND
N1
EXT
VIN = 3V to 12V
C3
0.22µF
C4
1µF
C2
0.1µF
R4
100k
1%
R1
0.02Ω
R2
218k
1%
R3
24.9k
1%
C7
220pF
D1
MBRS340T3 C5
68µF
20V
C6
68µF
20V
C8
0.1µF
3
5
7
6
8
2
4
9
1
10
VOUT = 12V @ 1A
C1
68µF
20V L1
4.7µH
FDS6680
SYNC/
SHDN
Figure 4. MAX668 High-Voltage Non-Bootstrapped Configuration
Maxim Integrated
11
MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
Table 2. Bootstrapped and Non-Bootstrapped Configurations
CONFIGURATION FIGURE USE
WITH:
INPUT
VOLTAGE
RANGE* (V)
OUTPUT
VOLTAGE
RANGE (V)
COMMENTS
High-Voltage,
Bootstrapped
Figure
2MAX669 1.8 to 28 3V to 28
Connect VCC to VOUT. Provides maximum external
FET gate drive for low-voltage (Input <3V) to high-
voltage (output >5.5V) boost circuits. VOUT cannot
exceed 28V.
Low-Voltage,
Bootstrapped
Figure
3MAX669 1.8 to 5.5 2.7 to 5.5
Connect VOUT to VCC and LDO. Provides maxi-
mum possible external FET gate drive for low-volt-
age designs, but limits VOUT to 5.5V or less.
High-Voltage,
Non-Bootstrapped
Figure
4MAX668 3 to 28 VIN to ∞
Connect VIN to VCC. Provides widest input and out-
put range, but external FET gate drive is reduced for
VIN below 5V.
Low-Voltage,
Non-Bootstrapped
Figure
5MAX668 2.7 to 5.5 VIN to ∞
Connect VIN to VCC and LDO. FET gate-drive
amplitude = VIN for logic-supply (input 3V to 5.5V) to
high-voltage (output >5.5V) boost circuits. IC oper-
ating power is less than in Figure 4, since IC current
does not pass through the LDO regulator.
Extra IC supply,
Non-Bootstrapped None MAX668 Not
Restricted VIN to ∞
Connect VCC and LDO to a separate supply
(VBIAS) that powers only the IC. FET gate-drive
amplitude = VBIAS. Input power source (VIN) and
output voltage range (VOUT) are not restricted,
except that VOUT must exceed VIN.
In addition to the configurations shown in Table 2, the
following guidelines may help when selecting a config-
uration:
1) If VIN is ever below 2.7V, VCC
must
be boot-
strapped to VOUT and the MAX669 must be used. If
VOUT never exceeds 5.5V, LDO may be shorted to
VCC and VOUT to eliminate the dropout voltage of
the LDO regulator.
2) If VIN is greater than 3.0V, VCC can be powered
from VIN, rather than from VOUT (non-bootstrapped).
This can save quiescent power consumption, espe-
cially when VOUT is large. If VIN never exceeds
5.5V, LDO may be shorted to VCC and VIN to elimi-
nate the dropout voltage of the LDO regulator.
3) If VIN is in the 3V to 4.5V range (i.e., 1-cell Li-Ion or
3-cell NiMH battery range), bootstrapping VCC from
VOUT, although not required, may increase overall
efficiency by increasing gate drive (and reducing
FET resistance) at the expense of quiescent power
consumption.
4) If VIN always exceeds 4.5V, VCC should be tied to
VIN, since bootstrapping from VOUT does not
increase gate drive from EXT but does increase
quiescent power dissipation.
*
For standard step-up DC-DC circuits (as in Figures 2, 3, 4, and 5), regulation cannot be maintained if VIN exceeds VOUT. SEPIC
and transformer-based circuits do not have this limitation.
12
Maxim Integrated
MAX668/MAX669
SYNC/
SHDN
and FREQ Inputs
The SYNC/SHDN pin provides both external-clock syn-
chronization (if desired) and shutdown control. When
SYNC/SHDN is low, all IC functions are shut down. A
logic high at SYNC/SHDN selects operation at a fre-
quency set by ROSC, connected from FREQ to GND.
The relationship between fOSC and ROSC is:
ROSC = 5 x 1010 / fOSC
So a 500kHz operating frequency, for example, is set
with ROSC = 100kΩ.
Rising clock edges on SYNC/SHDN are interpreted as
synchronization inputs. If the sync signal is lost while
SYNC/SHDN is high, the internal oscillator takes over at
the end of the last cycle and the frequency is returned
to the rate set by ROSC. If sync is lost with SYNC/SHDN
low, the IC waits for 70µs before shutting down. This
maintains output regulation even with intermittent sync
signals. When an external sync signal is used, Idle
Mode switchover at the 15mV current-sense threshold
is disabled so that Idle Mode only occurs at very light
loads. Also, ROSC should be set for a frequency 15%
below the SYNC clock rate:
ROSC(SYNC) = 5 x 1010 / (0.85 x fSYNC)
Soft-Start
The MAX668/MAX669 feature a “digital” soft start which
is preset and requires no external capacitor. Upon
start-up, the peak inductor increments from 1/5 of the
value set by RCS, to the full current-limit value, in five
steps over 1024 cycles of fOSC or fSYNC. For example,
with an fOSC of 200kHz, the complete soft-start
sequence takes 5ms. See the
Typical Operating
Characteristics
for a photo of soft-start operation. Soft-
start is implemented: 1) when power is first applied to
the IC, 2) when exiting shutdown with power already
applied, and 3) when exiting undervoltage lockout. The
MAX669’s soft-start sequence does not start until LDO
reaches 2.5V.
Design Procedure
The MAX668/MAX669 can operate in a number of DC-
DC converter configurations including step-up, SEPIC
(single-ended primary inductance converter), and fly-
back. The following design discussions are limited to
step-up, although SEPIC and flyback examples are
shown in the
Application Circuits
section.
Setting the Operating Frequency
The MAX668/MAX669 can be set to operate from
100kHz to 500kHz. Choice of operating frequency will
depend on number of factors:
1) Noise considerations may dictate setting (or syn-
chronizing) fOSC above or below a certain frequency
or band of frequencies, particularly in RF applica-
tions.
2) Higher frequencies allow the use of smaller value
(hence smaller size) inductors and capacitors.
3) Higher frequencies consume more operating power
both to operate the IC and to charge and discharge
the gate of the external FET. This tends to reduce
efficiency at light loads; however, the MAX668/
MAX669’s Idle Mode feature substantially increases
light-load efficiency.
4) Higher frequencies may exhibit poorer overall effi-
ciency due to more transition losses in the FET;
however, this shortcoming can often be nullified by
trading some of the inductor and capacitor size
benefits for lower-resistance components.
The oscillator frequency is set by a resistor, ROSC, con-
nected from FREQ to GND. ROSC must be connected
whether or not the part is externally synchronized ROSC
is in each case:
ROSC = 5 x 1010 / fOSC
when
not
using an external clock.
ROSC(SYNC) = 5 x 1010 / (0.85 x fSYNC)
when using an external clock, fSYNC.
Setting the Output Voltage
The output voltage is set by two external resistors (R2
and R3, Figures 2, 3, 4, and 5). First select a value for
R3 in the 10kΩto 1MΩrange. R2 is then given by:
R2 = R3 [(VOUT / VREF) – 1]
where VREF is 1.25V.
Determining Inductance Value
For most MAX668/MAX669 boost designs, the inductor
value (LIDEAL) can be derived from the following equa-
tion, which picks the optimum value for stability based
on the MAX668/MAX669’s internally set slope compen-
sation:
LIDEAL = VOUT / (4 x IOUT x fOSC)
The MAX668/MAX669 allow significant latitude in induc-
tor selection if LIDEAL is not a convenient value. This
may happen if LIDEAL is a not a standard inductance
(such as 10µH, 22µH, etc.), or if LIDEAL is too large to
be obtained with suitable resistance and saturation-cur-
rent rating in the desired size. Inductance values small-
er than LIDEAL may be used with no adverse stability
effects; however, the peak-to-peak inductor current
(ILPP) will rise as L is reduced. This has the effect of
raising the required ILPK for a given output power and
also requiring larger output capacitance to maintain a
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
Maxim Integrated
13
MAX668/MAX669
given output ripple. An inductance value larger than
LIDEAL may also be used, but output-filter capacitance
must be increased by the same proportion that L has to
LIDEAL. See the
Capacitor Selection
section for more
information on determining output filter values.
Due the MAX668/MAX669’s high switching frequencies,
inductors with a ferrite core or equivalent are recom-
mended. Powdered iron cores are
not
recommended
due to their high losses at frequencies over 50kHz.
Determining Peak Inductor Current
The peak inductor current required for a particular out-
put is:
ILPEAK = ILDC + (ILPP / 2)
where ILDC is the average DC input current and ILPP is
the inductor peak-to-peak ripple current. The ILDC and
ILPP terms are determined as follows:
where VDis the forward voltage drop across the
Schottky rectifier diode (D1), and VSW is the drop
across the external FET, when on.
where L is the inductor value. The saturation rating of
the selected inductor should meet or exceed the calcu-
lated value for ILPEAK, although most coil types can be
operated up to 20% over their saturation rating without
difficulty. In addition to the saturation criteria, the induc-
tor should have as low a series resistance as possible.
For continuous inductor current, the power loss in the
inductor resistance, PLR, is approximated by:
PLR ≅(IOUT x VOUT / VIN)2x RL
where RLis the inductor series resistance.
Once the peak inductor current is selected, the current-
sense resistor (RCS) is determined by:
RCS = 85mV / ILPEAK
For high peak inductor currents (>1A), Kelvin sensing
connections should be used to connect CS+ and
PGND to RCS. PGND and GND should be tied together
at the ground side of RCS.
Power MOSFET Selection
The MAX668/MAX669 drive a wide variety of N-channel
power MOSFETs (NFETs). Since LDO limits the EXT
output gate drive to no more than 5V, a logic-level
NFET is required. Best performance, especially at low
input voltages (below 5V), is achieved with low-thresh-
old NFETs that specify on-resistance with a gate-
source voltage (VGS) of 2.7V or less. When selecting an
NFET, key parameters can include:
1) Total gate charge (Qg)
2) Reverse transfer capacitance or charge (CRSS)
3) On-resistance (RDS(ON))
4) Maximum drain-to-source voltage (VDS(MAX))
5) Minimum threshold voltage (VTH(MIN))
At high switching rates, dynamic characteristics (para-
meters 1 and 2 above) that predict switching losses
may have more impact on efficiency than RDS(ON),
which predicts DC losses. Qgincludes all capacitances
associated with charging the gate. In addition, this
parameter helps predict the current needed to drive the
gate at the selected operating frequency. The continu-
ous LDO current for the FET gate is:
IGATE = Qgx fOSC
For example, the MMFT3055L has a typical Qgof 7nC
(at VGS = 5V); therefore, the IGATE current at 500kHz is
3.5mA. Use the FET manufacturer’s
typical
value for Qg
in the above equation, since a maximum value (if sup-
plied) is usually too conservative to be of use in esti-
mating IGATE.
Diode Selection
The MAX668/MAX669’s high switching frequency
demands a high-speed rectifier. Schottky diodes are
recommended for most applications because of their
fast recovery time and low forward voltage. Ensure that
the diode’s average current rating is adequate using
the diode manufacturer’s data, or approximate it with
the following formula:
Also, the diode reverse breakdown voltage must
exceed VOUT. For high output voltages (50V or above),
Schottky diodes may not be practical because of this
voltage requirement. In these cases, use a high-speed
silicon rectifier with adequate reverse voltage.
Capacitor Selection
Output Filter Capacitor
The minimum output filter capacitance that ensures sta-
bility is:
where VIN(MIN) is the minimum expected input voltage.
Typically COUT(MIN), though sufficient for stability, will
C (7.5V x L / L )
(2 R x V x f )
OUT(MIN) IDEAL
CS IN(MIN) OSC
=π
II
I- I
3
DIODE OUT LPEAK OUT
=+
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
I = I (V + V
(V – V
LDC OUT OUT D
IN SW
)
)
I = (V – V ) (V + V – V )
L x f (V + V )
LPP IN SW OUT D IN
OSC OUT D
14
Maxim Integrated
MAX668/MAX669
not be adequate for low output voltage ripple. Since
output ripple in boost DC-DC designs is dominated by
capacitor equivalent series resistance (ESR), a capaci-
tance value 2 or 3 times larger than COUT(MIN) is typi-
cally needed. Low-ESR types must be used. Output
ripple due to ESR is:
VRIPPLE(ESR) = ILPEAK x ESRCOUT
Input Capacitor
The input capacitor (CIN) in boost designs reduces the
current peaks drawn from the input supply and reduces
noise injection. The value of CIN is largely determined
by the source impedance of the input supply. High
source impedance requires high input capacitance,
particularly as the input voltage falls. Since step-up DC-
DC converters act as “constant-power” loads to their
input supply, input current rises as input voltage falls.
Consequently, in low-input-voltage designs, increasing
CIN and/or lowering its ESR can add as many as five
percentage points to conversion efficiency. A good
starting point is to use the same capacitance value for
CIN as for COUT.
Bypass Capacitors
In addition to CIN and COUT, three ceramic bypass
capacitors are also required with the MAX668/MAX669.
Bypass REF to GND with 0.22µF or more. Bypass LDO
to GND with 1µF or more. And bypass VCC to GND with
0.1µF or more. All bypass capacitors should be located
as close to their respective pins as possible.
Compensation Capacitor
Output ripple voltage due to COUT ESR affects loop
stability by introducing a left half-plane zero. A small
capacitor connected from FB to GND forms a pole with
the feedback resistance that cancels the ESR zero. The
optimum compensation value is:
where R2 and R3 are the feedback resistors (Figures 2,
3, 4, and 5). If the calculated value for CFB results in a
non-standard capacitance value, values from 0.5CFB to
1.5CFB will also provide sufficient compensation.
Applications Information
Starting Under Load
In non-bootstrapped configurations (Figures 4 and 5),
the MAX668 can start up with any combination of out-
put load and input voltage at which it can operate when
already started. In other words, there are no special
limitations to start-up in non-bootstrapped circuits.
In bootstrapped configurations with the MAX668 or
MAX669, there may be circumstances where full load
current can only be applied after the circuit has started
and the output is near its set value. As the input voltage
drops, this limitation becomes more severe. This char-
acteristic of all bootstrapped designs occurs when the
MOSFET gate is not fully driven until the output voltage
rises. This is problematic because a heavily loaded out-
put cannot rise until the MOSFET has low on-resis-
tance. In such situations, low-threshold FETs (VTH <
VIN(MIN)) are the most effective solution. The
Typical
Operating Characteristics
section shows plots of start-
up voltage versus load current for a typical boot-
strapped design.
Layout Considerations
Due to high current levels and fast switching waveforms
that radiate noise, proper PC board layout is essential.
Protect sensitive analog grounds by using a star ground
configuration. Minimize ground noise by connecting
GND, PGND, the input bypass-capacitor ground lead,
and the output-filter ground lead to a single point (star
ground configuration). Also, minimize trace lengths to
reduce stray capacitance, trace resistance, and radiat-
ed noise. The trace between the external gain-setting
resistors and the FB pin must be extremely short, as
must the trace between GND and PGND.
Application Circuits
Low-Voltage Boost Circuit
Figure 3 shows the MAX669 operating in a low-voltage
boost application. The MAX669 is configured in the
bootstrapped mode to improve low input voltage per-
formance. The IRF7401 N-channel MOSFET was select-
ed for Q1 in this application because of its very low
0.7V gate threshold voltage (VGS). This circuit provides
a 5V output at greater than 2A of output current and
operates with input voltages as low as 1.8V. Efficiency
is typically in the 85% to 90% range.
+12V Boost Application
Figure 5 shows the MAX668 operating in a 5V to 12V
boost application. This circuit provides output currents
of greater than 1A at a typical efficiency of 92%. The
MAX668 is operated in non-bootstrapped mode to mini-
mize the input supply current. This achieves maximum
light-load efficiency. If input voltages below 5V are
used, the IC should be operated in bootstrapped mode
to achieve best low-voltage performance.
4-Cell to +5V SEPIC Power Supply
Figure 6 shows the MAX668 in a SEPIC (single-ended
primary inductance converter) configuration. This con-
figuration is useful when the input voltage can be either
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
C C x ESR
(R2 x R3) / (R2 + R3)
FB OUT COUT
=
Maxim Integrated
15
MAX668/MAX669
larger or smaller than the output voltage, such as when
converting four NiMH, NiCd, or Alkaline cells to a 5V
output. The SEPIC configuration is often a good choice
for combined step-up/step-down applications.
The N-channel MOSFET (Q1) must be selected to with-
stand a drain-to-source voltage (VDS) greater than the
sum of the input and output voltages. The coupling
capacitor (C2) must be a low-ESR type to achieve max-
imum efficiency. C2 must also be able to handle high
ripple currents; ordinary tantalum capacitors should not
be used for high-current designs.
The circuit in Figure 6 provides greater than 1A output
current at 5V when operating with an input voltage from
3V to 25V. Efficiency will typically be between 70% and
85%, depending upon the input voltage and output cur-
rent.
Isolated +5V to +5V Power Supply
The circuit of Figure 7 provides a 5V isolated output at
400mA from a 5V input power supply. Transformer T1
provides electrical isolation for the forward path of the
converter, while the TLV431 shunt regulator and
MOC211 opto-isolator provide an isolated feedback
error voltage for the converter. The output voltage is set
by resistors R2 and R3 such that the mid-point of the
divider is 1.24V (threshold of TLV431). Output voltage
can be adjusted from 1.24V to 6V by selecting the
proper ratio for R2 and R3. For output voltages greater
than 6V, substitute the TL431 for the TLV431, and use
2.5V as the voltage at the midpoint of the voltage-
divider.
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
R3
100k
R4
0.02Ω
R1
75k
R2
25k
C4
520pF
VIN
3V to 25V
30V
FDS6680
Q1
L1
CTX5-4
MAX668
SHDNVCC
910
LDO
FREQ
D1: MBR5340T3, 3A, 40V SCHOTTKY DIODE
R4: WSL-2512-R020F, 0.02Ω
C3: AVX TPSZ686M020R0150, 68µF, 150mΩ ESR
REF
EXT
CS+
8
6
PGNDGND
73
FB
1
2
4
5
1µF
22µF x 3
@ 35V
C3
68µF x 3
VOUT
5V @ 1A
4.9µH
C2
10µF @ 35V
D1
40V
0.22µF
Figure 6. MAX668 in SEPIC Configuration
16
Maxim Integrated
MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
MAX668
LDO
CS+
FB
SHDN
PGND
FREQREF
VCC
GND
T1
1:2
EXT
VIN = +5V
T1: COILTRONICS CTX03-14232
+5V @ 400mA
+5V RETURN
0.1Ω
R2
301k
1%
510Ω
TLV431
610Ω0.068µF
R3
100k
1%
MBR0540L
MBR0540L
47µH
220µF
10V
0.22µF
1µF
100k
10k
MOC211
IRF7603
220µF
10V
0.1µF
Figure 7. Isolated +5V to +5V at 400mA Power Supply
PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO.
10 µMAX U10-2 21-0061 90-0330
Package Information
For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a "+", "#", or
"-" in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing per-
tains to the package regardless of RoHS status.
Maxim Integrated
17
MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
Revision History
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
2 1/12
Added automotive qualified part and updated lead-free and leaded soldering
temperatures 1, 2
MAX668/MAX669
18 Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical
Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
© 2012 Maxim Integrated The Maxim logo and Maxim Integrated are trademarks of Maxim Integrated Products, Inc.