Semiconductor Components Industries, LLC, 2002
March, 2002 – Rev. 2 1Publication Order Number:
NTHD5903T1/D
NTHD5903T1
Power MOSFET
Dual P-Channel ChipFET
2.1 Amps, 20 Volts
Features
•Low RDS(on) for Higher Efficiency
•Logic Level Gate Drive
•Miniature ChipFET Surface Mount Package Saves Board Space
Applications
•Power Management in Portable and Battery–Powered Products; i.e.,
Cellular and Cordless Telephones and PCMCIA Cards
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating Symbol 5 secs Steady
State Unit
Drain–Source Voltage VDS –20 V
Gate–Source Voltage VGS 12 V
Continuous Drain Current
(TJ = 150°C) (Note 1)
TA = 25°C
TA = 85°C
ID
2.9
2.1
2.1
1.5
A
Pulsed Drain Current IDM 10 A
Continuous Source Current
(Diode Conduction) (Note 1) IS–1.8 –0.9 A
Maximum Power Dissipation
(Note 1)
TA = 25°C
TA = 85°C
PD
2.1
1.1 1.1
0.6
W
Operating Junction and Storage
Temperature Range TJ, Tstg –55 to +150 °C
1. Surface Mounted on 1″ x 1″ FR4 Board.
G1G2
S1
D1
S2
D2
P–Channel MOSFETP–Channel MOSFET
Device Package Shipping
ORDERING INFORMATION
NTHD5903T1 ChipFET 3000/Tape & Reel
ChipFET
CASE 1206A
STYLE 2
DUAL P–CHANNEL
2.1 AMPS, 20 VOLTS
RDS(on) = 155 m
1
2
3
45
6
7
8
PIN CONNECTIONS MARKING
DIAGRAM
A7
A7 = Specific Device Code
1
2
3
4
S1
G1
S2
G2
D1
D1
D2
D2
8
7
6
5
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THERMAL CHARACTERISTICS
Characteristic Symbol Typ Max Unit
Maximum Junction–to–Ambient (Note 2)
t 5 sec
Steady State
RthJA 50
90 60
110
°C/W
Maximum Junction–to–Foot (Drain)
Steady State RthJF 30 40 °C/W
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Characteristic Symbol Test Condition Min Typ Max Unit
Static
Gate Threshold Voltage VGS(th) VDS = VGS, ID = –250 A –0.6 – – V
Gate–Body Leakage IGSS VDS = 0 V, VGS = 12 V – – 100 nA
Zero Gate Voltage Drain Current IDSS VDS = –16 V, VGS = 0 V – – –1.0 A
VDS = –16 V, VGS = 0 V,
TJ = 85°C– – –5.0
On–State Drain Current (Note 3) ID(on) VDS –5.0 V, VGS = –4.5 V –10 – – A
Drain–Source On–State Resistance (Note 3) rDS(on) VGS = –4.5 V, ID = –2.1 A – 0.130 0.155
()
VGS = –3.6 V, ID = –2.0 A – 0.150 0.180
VGS = –2.5 V, ID = –1.7 A – 0.215 0.260
Forward Transconductance (Note 3) gfs VDS = –10 V, ID = –2.1 A – 5.0 – S
Diode Forward Voltage (Note 3) VSD IS = –0.9 A, VGS = 0 V – –0.8 –1.2 V
Dynamic (Note 4)
Total Gate Charge Qg
V10 V V 45V
– 3.0 6.0 nC
Gate–Source Charge Qgs VDS = –10 V, VGS = –4.5 V,
I
D
= –2.1 A – 0.9 –
Gate–Drain Charge Qgd
I
D
=
–
2
.
1
A
– 0.6 –
Turn–On Delay Time td(on) – 13 20 ns
Rise Time trVDD = –10 V, RL = 10
ID–10A V
GEN =–45V
– 35 55
Turn–Of f Delay Time td(off) ID –1.0 A, VGEN = –4.5 V,
RG = 6 – 25 40
Fall Time tf
RG
6
– 25 40
Source–Drain Reverse Recovery Time trr IF = –0.9 A, di/dt = 100 A/s– 40 80
2. Surface Mounted on 1″ x 1″ FR4 Board.
3. Pulse Test: Pulse Width 300 s, Duty Cycle 2%.
4. Guaranteed by design, not subject to production testing.
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TYPICAL ELECTRICAL CHARACTERISTICS
3 V
125°C
0
10
5
8
6
632
–VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
ID, DRAIN CURRENT (AMPS)
4
2
01
Figure 1. On–Region Characteristics
0
10
8
324
6
4
2
1
05
Figure 2. Transfer Characteristics
VGS, GATE–TO–SOURCE VOLTAGE (VOLTS)
1
24
3
2
0
Figure 3. On–Resistance vs. Gate–to–Source
Voltage
–VGS, GATE–TO–SOURCE VOLTAGE (VOLTS)
RDS(on), DRAIN–TO–SOURCE RESISTANCE ()
ID, DRAIN CURRENT (AMPS)
191085
0.25
4
0.15
Figure 4. On–Resistance vs. Drain Current and
Gate Voltage
–ID, DRAIN CURRENT (AMPS)
–50 0–25 25
1.4
1.2
1
0.8
0.6 50 125100
Figure 5. On–Resistance Variation with
Temperature
TJ, JUNCTION TEMPERATURE (°C)
TJ = 25°C
VGS = 1.4 V
4
13
TC = –55°C
ID = –2.1 A
TJ = 25°C
0.4
0.05
75 150
TJ = 25°C
ID = –2.1 A
VGS = –4.5 V
RDS(on), DRAIN–TO–SOURCE
RESISTANCE (NORMALIZED)
4
25°C
RDS(on), DRAIN–TO–SOURCE RESISTANCE ()
1.6
VGS = –4.5 V
VGS = –3.6 V
1.8 V
2.2 V
05
7623
04 8
1.0E–11 2016
Figure 6. Drain–to–Source Leakage Current
vs. Voltage
–VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
12
VGS = 0 V
IDSS, LEAKAGE (A)
TJ = 150°C
TJ = 100°C
2.4 V
2.6 V
2.8 V
3.4 V
3.6 V
VGS = 4 V – 10 V
0.35
0.2
0.1
0.3 VGS = –2.5 V
1.0E–10
1.0E–9
1.0E–8
1.0E–7
1.0E–6
TJ = 25°C
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TYPICAL ELECTRICAL CHARACTERISTICS
VDS = 0 V VGS = 0 V
–VGS
84–12 12
600
300
200
100
020
GATE–TO–SOURCE OR DRAIN–TO–SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
C, CAPACITANCE (pF)
02
6
14
4
1
0
Figure 8. Gate–to–Source and
Drain–to–Source Voltage vs. Total Charge
Qg, TOTAL GATE CHARGE (nC)
–VGS, GATE–TO–SOURCE VOLTAGE (VOLTS)
TJ = 25°C
Coss
Ciss
Crss
ID = –2.1 A
TJ = 25°C
QT
500
32.5
2
3
–VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
6
5
4
1
0
Q2Q1
101
10
1100
RG, GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
t, TIME (ns)
VDD = –10 V
ID = –1.0 A
VGS = –4.5 V
100
–8 0
400
5
2
3
td(off)
td(on)
tf
tr
VGS VDS
–VDS
–4 16 1.50.5 3.5
0.80
1
01.2
VSD, SOURCE–TO–DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage vs. Current
IS, SOURCE CURRENT (AMPS)
VGS = 0 V
TJ = 25°C
5
10.60.40.2
2
3
4
2
1
0.1
0.0110 1010
–4 –3 –2 –1
10 1 10 100 600
Square Wave Pulse Duration (sec)
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
Single Pulse
0.1
0.05
0.02 1. Duty Cycle, D =
2. Per Unit Base = RthJA = 90°C/W
3. TJM – TA = PDMZthJA(t)
4. Surface Mounted
t1
t2
PDM
Notes:
t1t2
Figure 11. Normalized Thermal Transient Impedance, Junction–to–Ambient
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Notes
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Notes
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PACKAGE DIMENSIONS
ChipFET
CASE 1206A–03
ISSUE D
BS
C
D
G
L
A
1234
8765
M
J
K
1234
8765
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A2.95 3.10 0.116 0.122
B1.55 1.70 0.061 0.067
C1.00 1.10 0.039 0.043
D0.25 0.35 0.010 0.014
G0.65 BSC 0.025 BSC
J0.10 0.20 0.004 0.008
K0.28 0.42 0.011 0.017
L0.55 BSC 0.022 BSC
M°5 NOM
S1.80
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MOLD GATE BURRS SHALL NOT EXCEED 0.13 MM
PER SIDE.
4. LEADFRAME TO MOLDED BODY OFFSET IN
HORIZONTAL AND VERTICAL SHALL NOT EXCEED
0.08 MM.
5. DIMENSIONS A AND B EXCLUSIVE OF MOLD GATE
BURRS.
6. NO MOLD FLASH ALLOWED ON THE TOP AND
BOTTOM LEAD SURFACE.
7. 1206A-01 AND 1206A-02 OBSOLETE. NEW
STANDARD IS 1206A-03.
0.05 (0.002)
°5 NOM
STYLE 2:
PIN 1. SOURCE 1
2. GATE 1
3. SOURCE 2
4. GATE 2
5. DRAIN 2
6. DRAIN 2
7. DRAIN 1
8. DRAIN 1
2.00 0.072 0.080
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NTHD5903T1/D
ChipFET is a trademark of Vishay Siliconix.
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