DATA SH EET
Product specification
Supersedes data of 2003 Jan 30 2003 Nov 25
INTEGRATED CIRCUITS
74LVC16245A; 74LVCH16245A
16-bit bus transceiver with direction
pin; 5 V tolerant; 3-state
2003 Nov 25 2
Philips Semiconductors Product specification
16-bit bus transceiver with direction pin; 5 V tolerant;
3-state 74LVC16245A;
74LVCH16245A
FEATURES
•5 V tolerant inputs/outputs for interfacing with 5 V logic
•Wide supply voltage range from 1.2 to 3.6 V
•CMOS low power consumption
•MULTIBYTETM flow-through standard pin-out
architecture
•Low inductance multiple power and ground pins for
minimum noise and ground bounce
•Direct interface with TTL levels
•High-impedance when VCC =0V
•All data inputs have bushold (74LVCH16245A only)
•Complies with JEDEC standard no. 8-1A
•ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
DESCRIPTION
The 74LVC(H)16245A is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families. Inputs can be
driven from either 3.3 or 5 V devices. In 3-state operation,
outputs can handle 5 Volt. These features allow the use of
these devices as a mixed 3.3 and 5 V environment.
The 74LVC(H)16245A is a 16-bit transceiver featuring
non-inverting 3-state bus compatible outputs in both send
and receive directions. The device features two output
enable (nOE) inputs for easy cascading and two
send/receive (nDIR) inputs for direction control. nOE
controls the outputs so that the buses are effectively
isolated. This device can be used as two 8-bit transceivers
or one 16-bit transceiver.
The 74LVCH16245A bushold data inputs eliminates the
need for external pull-up resistors to hold unused inputs.
QUICK REFERENCE DATA
GND = 0 V; Tamb =25°C; tr=t
f≤2.5 ns.
Notes
1. CPD is used to determine the dynamic power dissipation (PDin µW).
PD=C
PD ×VCC2×fi×N+Σ(CL×VCC2×fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in Volts;
N = total load switching outputs;
Σ(CL×VCC2×fo) = sum of the outputs.
2. The condition is VI= GND to VCC.
SYMBOL PARAMETER CONDITIONS TYPICAL UNIT
tPHL/tPLH propagation delay nAn to nBn; nBn to nAn CL= 50 pF; VCC = 3.3 V 2.2 ns
CIinput capacitance 5.0 pF
CI/O input/output capacitance 10 pF
CPD power dissipation capacitance per gate VCC = 3.3 V; notes 1 and 2 30 pF
2003 Nov 25 3
Philips Semiconductors Product specification
16-bit bus transceiver with direction pin; 5 V tolerant;
3-state 74LVC16245A;
74LVCH16245A
ORDERING INFORMATION
FUNCTION TABLE
See note 1.
Note
1. H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
TYPE NUMBER PACKAGE
TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE
74LVC16245ADL −40 to +125 °C 48 SSOP48 plastic SOT370-1
74LVCH16245ADL −40 to +125 °C 48 SSOP48 plastic SOT370-1
74LVC16245ADGG −40 to +125 °C 48 TSSOP48 plastic SOT362-1
74LVCH16245ADGG −40 to +125 °C 48 TSSOP48 plastic SOT362-1
74LVC16245AEV −40 to +125 °C 56 VFBGA56 plastic SOT702-1
74LVCH16245AEV −40 to +125 °C 56 VFBGA56 plastic SOT702-1
INPUT OUTPUT
nOE nDIR nAn nBn
L L A = B inputs
L H inputs B = A
HXZZ
2003 Nov 25 4
Philips Semiconductors Product specification
16-bit bus transceiver with direction pin; 5 V tolerant;
3-state 74LVC16245A;
74LVCH16245A
PINNING
SYMBOL PIN BALL DESCRIPTION
1DIR 1 A1 direction control input
1B0 2 B2 data input/output
1B1 3 B1 data input/output
GND 4, 10, 15, 21, 28, 34, 39, 45 B3, B4, D3, D4, G3, G4, J3, J4 ground (0 V)
1B2 5 C2 data input/output
1B3 6 C1 data input/output
VCC 7, 18, 31, 42 C3, C4, H3, H4 supply voltage
1B4 8 D2 data input/output
1B5 9 D1 data input/output
1B6 11 E2 data input/output
1B7 12 E1 data input/output
2B0 13 F1 data input/output
2B1 14 F2 data input/output
2B2 16 G1 data input/output
2B3 17 G2 data input/output
2B4 19 H1 data input/output
2B5 20 H2 data input/output
2B6 22 J1 data input/output
2B7 23 J2 data input/output
2DIR 24 K1 direction control input
2OE 25 K6 output enable input (active LOW)
2A7 26 J5 data input/output
2A6 27 J6 data input/output
2A5 29 H5 data input/output
2A4 30 H6 data input/output
2A3 32 G5 data input/output
2A2 33 G6 data input/output
2A1 35 F5 data input/output
2A0 36 F6 data input/output
1A7 37 E6 data input/output
1A6 38 E5 data input/output
1A5 40 D6 data input/output
1A4 41 D5 data input/output
1A3 43 C6 data input/output
1A2 44 C5 data input/output
1A1 46 B6 data input/output
1A0 47 B5 data input/output
1OE 48 A6 output enable input (active LOW)
n.c. −A2, A3, A4, A5, K2, K3, K4, K5 not connected
2003 Nov 25 5
Philips Semiconductors Product specification
16-bit bus transceiver with direction pin; 5 V tolerant;
3-state 74LVC16245A;
74LVCH16245A
16245
mna710
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1B0
1B1
GND
1A0
1A1
GND
1DIR 1OE
1B2
1B3
VCC
1B4
1B5
GND
1B6
1B7
2B0
2B1
GND
2B2
2B3
VCC
2B4
2B5
GND
2B6
2B7
2DIR
1A2
1A3
VCC
1A4
1A5
GND
1A6
1A7
2A0
2A1
GND
2A2
2A3
VCC
2A4
2A5
GND
2A6
2A7
2OE
Fig.1 Pin configuration SSOP48 and TSSOP48. Fig.2 Pin configuration VFBGA56.
mna707
1DIR n.c. n.c. n.c. n.c.
n.c. n.c. n.c. n.c.
1B1
1B3
1B5
1B7
2B0
2B2
2B4
2B6
2DIR
A
B
C
D
E
F
G
H
J
K
1B0
1B2
1B4
1B6
2B1
2B3
2B5
2B7
GND
VCC
GND
GND
VCC
GND
GND
VCC
GND
GND
VCC
GND
1A0
1A2
1A4
1A6
2A1
2A3
2A5
2A7
1OE
1A1
1A3
1A5
1A7
2A0
2A2
2A4
2A6
123456
2OE
2003 Nov 25 6
Philips Semiconductors Product specification
16-bit bus transceiver with direction pin; 5 V tolerant;
3-state 74LVC16245A;
74LVCH16245A
handbook, full pagewidth
47
1
1DIR
2
48
1B0
1B1
1B2
1B3
1B4
1B5
1B6
1B7
46
3
44
5
43
6
41
8
40
9
38
11
37
1A0
1A1
1A2
1A3
1A4
1A5
1A6
1A7 12
1OE 36
24
2DIR
13
25
2B0
2B1
2B2
2B3
2B4
2B5
2B6
2B7
35
14
33
16
32
17
30
19
29
20
27
22
26
2A0
2A1
2A2
2A3
2A4
2A5
2A6
2A7 23
2OE
MNA708
Fig.3 Logic symbol.
2003 Nov 25 7
Philips Semiconductors Product specification
16-bit bus transceiver with direction pin; 5 V tolerant;
3-state 74LVC16245A;
74LVCH16245A
handbook, halfpage
G3
G6
3EN1[BA]
6EN4[BA]
3EN2[AB]
6EN5[AB]
47
36
46
35
44
33
43
32
41
30
40
29
38
27
37
26
2
13
3
14
5
16
6
17
8
19
9
20
11
22
12
23
1A0
2A1
2A0
2A2
2A3
2A4
2A5
2A6
2A7
2B1
2B2
2B3
2B4
2B5
2B6
2B7
1OE
1DIR
MNA709
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1B0
2B0
1B1
1B2
1B3
1B4
1B5
1B6
1B7
5
4
2
1
25
24
48
1
2OE
2DIR
Fig.4 Logic symbol (IEEE/IEC).
handbook, halfpage
to internal circuit
MNA705
VCC
data input
Fig.5 Bushold circuit.
2003 Nov 25 8
Philips Semiconductors Product specification
16-bit bus transceiver with direction pin; 5 V tolerant;
3-state 74LVC16245A;
74LVCH16245A
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. Above 60 °C the value of PD derates linearly with 5.5 mW/K.
3. Above 70 °C the value of PD derates linearly with 1.8 mW/K.
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VCC supply voltage for maximum speed
performance 2.7 3.6 V
for low voltage applications 1.2 3.6 V
VIinput voltage 0 5.5 V
VOoutput voltage output HIGH or LOW state 0 VCC V
output 3-state 0 5.5 V
Tamb operating ambient temperature in free air −40 +125 °C
tr,t
finput rise and fall times VCC = 1.2 to 2.7 V 0 20 ns/V
VCC = 2.7 to 3.6 V 0 10 ns/V
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VCC supply voltage −0.5 +6.5 V
IIK input diode current VI<0 −−50 mA
VIinput voltage note 1 −0.5 +6.5 V
IOK output diode current VO>V
CC or VO<0 −±50 mA
VOoutput voltage output HIGH or LOW state;
note 1 −0.5 VCC + 0.5 V
output 3-state; note 1 −0.5 +6.5 V
IOoutput source or sink current VO=0toV
CC −±50 mA
ICC, IGND VCC or GND current −±100 mA
Tstg storage temperature −65 +150 °C
Ptot power dissipation
SSOP and TSSOP package Tamb =−40 to +125 °C; note 2 −500 mW
VFBGA package Tamb =−40 to +125 °C; note 3 −1000 mW
2003 Nov 25 9
Philips Semiconductors Product specification
16-bit bus transceiver with direction pin; 5 V tolerant;
3-state 74LVC16245A;
74LVCH16245A
DC CHARACTERISTICS
At recommended operating conditions; voltages are referenced to GND (ground=0V).
SYMBOL PARAMETER TEST CONDITIONS MIN. TYP. (1) MAX. UNIT
OTHER VCC (V)
Tamb =−40 to +85 °C
VIH HIGH-level input voltage 1.2 VCC −−V
2.7 to 3.6 2.0 −−V
V
IL LOW-level input voltage 1.2 −−0V
2.7 to 3.6 −−0.8 V
VOH HIGH-level output
voltage VI=V
IH or VIL
IO=−100 µA 2.7 to 3.6 VCC −0.2 VCC −V
IO=−12 mA 2.7 VCC −0.5 −−V
I
O
=−18 mA 3.0 VCC −0.6 −−V
I
O
=−24 mA 3.0 VCC −0.8 −−V
V
OL LOW-level output voltage VI=V
IH or VIL
IO= 100 µA 2.7 to 3.6 −0 0.20 V
IO=12mA 2.7 −−0.40 V
IO=24mA 3.0 −−0.55 V
ILI input leakage current VI= 5.5 V or GND
; notes 2 and 3 3.6 −±0.1 ±5µA
IOZ 3-state output OFF-state
current VI=V
IH or VIL;
VO= 5.5 Vor GN
D
3.6 −0.1 ±5µA
Ioff power off leakage supply VIor VO= 5.5 V 0.0 −0.1 ±10 µA
ICC quiescent supply current VI=V
CC or GND;
IO=0 3.6 −0.1 10 µA
∆ICC additional quiescent
supply current per pin VI=VCC −0.6 V;
IO=0 2.7 to 3.6 −5 500 µA
IBHL bushold LOW sustaining
current VI= 0.8 V;
notes 4, 5 and 6 3.0 75 −−µA
I
BHH bushold HIGH sustaining
current VI= 2.0 V;
notes 4, 5 and 6 3.0 −75 −−µA
I
BHLO bushold LOW overdrive
current notes 4, 5 and 7 3.6 500 −−µA
I
BHHO bushold HIGH overdrive
current notes 4, 5 and 7 3.6 −500 −−µA
2003 Nov 25 10
Philips Semiconductors Product specification
16-bit bus transceiver with direction pin; 5 V tolerant;
3-state 74LVC16245A;
74LVCH16245A
Notes
1. All typical values are measured at VCC = 3.3 V and Tamb =25°C.
2. For bushold parts, the bushold circuit is switched off when VI>V
CC allowing 5.5 V on the input terminal.
3. For I/O ports the parameter IOZ includes the input leakage current.
4. Valid for data inputs of bushold parts (74LVCH16245A) only.
5. For data inputs only, control inputs do not have a bushold circuit.
6. The specified sustaining current at the data input holds the input below the specified VI level.
7. The specified overdrive current at the data input forces the data input to the opposite input state.
Tamb =−40 to +125 °C
VIH HIGH-level input voltage 1.2 VCC −−V
2.7 to 3.6 2.0 −−V
V
IL LOW-level input voltage 1.2 −−GND V
2.7 to 3.6 −−0.8 V
VOH HIGH-level output
voltage VI=V
IH or VIL
IO=−100 µA 2.7 to 3.6 VCC −0.3 −−V
I
O
=−12 mA 2.7 VCC −0.65 −−V
I
O
=−18 mA 3.0 VCC −0.75 −−V
I
O
=−24 mA 3.0 VCC −1−−V
V
OL LOW-level output voltage VI=V
IH or VIL
IO= 100 µA 2.7 to 3.6 −0 0.3 V
IO=12mA 2.7 −−0.6 V
IO=24mA 3.0 −−0.8 V
ILI input leakage current VI= 5.5 V or GND
; note 2 3.6 −−±20 µA
IOZ 3-state output OFF-state
current VI=V
IH or VIL;
VO= 5.5 Vor GN
D; notes 2 and 3
3.6 −−±20 µA
Ioff power off leakage supply VIor VO= 5.5 V 0.0 −−±20 µA
ICC quiescent supply current VI=V
CC or GND;
IO=0 3.6 −−40 µA
∆ICC additional quiescent
supply current per pin VI=VCC −0.6 V;
IO=0 2.7 to 3.6 −−5000 µA
IBHL bushold LOW sustaining
current VI= 0.8 V;
notes 4, 5 and 6 3.0 60 −−µA
I
BHH bushold HIGH sustaining
current VI= 2.0 V;
notes 4, 5 and 6 3.0 −60 −−µA
I
BHLO bushold LOW overdrive
current notes 4, 5 and 7 3.6 500 −−µA
I
BHHO bushold HIGH overdrive
current notes 4, 5 and 7 3.6 −500 −−µA
SYMBOL PARAMETER TEST CONDITIONS MIN. TYP. (1) MAX. UNIT
OTHER VCC (V)
2003 Nov 25 11
Philips Semiconductors Product specification
16-bit bus transceiver with direction pin; 5 V tolerant;
3-state 74LVC16245A;
74LVCH16245A
AC CHARACTERISTICS
GND = 0 V; tr=t
f≤2.5 ns.
Notes
1. All typical values are measured at Tamb =25°C.
2. Typical values are measured at VCC = 3.3 V and Tamb =25°C.
SYMBOL PARAMETER TEST CONDITIONS MIN. TYP.(1) MAX. UNIT
WAVEFORMS VCC (V)
Tamb =−40 to +85 °C
tPHL/tPLH propagation delay nAn to nBn;
nBn to nAn see Figs 6 and 8 1.2 −13.0 −ns
2.7 1.0 2.7 4.7 ns
3.0 to 3.6 1.0 2.2(2) 4.5 ns
tPZH/tPZL 3-state output enable time nOE
to nAn; nOE to nBn see Figs 7 and 8 1.2 −15.0 −ns
2.7 1.5 3.6 6.7 ns
3.0 to 3.6 1.0 2.8(2) 5.5 ns
tPHZ/tPLZ 3-state output disable time nOE
to nAn; nOE to nBn see Figs 7 and 8 1.2 −11.0 −ns
2.7 1.5 3.4 6.6 ns
3.0 to 3.6 1.5 3.2(2) 5.6 ns
Tamb =−40 to +125 °C
tPHL/tPLH propagation delay nAn to nBn;
nBn to nAn see Figs 6 and 8 1.2 −−−ns
2.7 1.0 −6.0 ns
3.0 to 3.6 1.0 −6.0 ns
tPZH/tPZL 3-state output enable time nOE
to nAn; nOE to nBn see Figs 7 and 8 1.2 −−−ns
2.7 1.5 −8.5 ns
3.0 to 3.6 1.0 −7.0 ns
tPHZ/tPLZ 3-state output disable time nOE
to nAn; nOE to nBn see Figs 7 and 8 1.2 −−−ns
2.7 1.5 −8.5 ns
3.0 to 3.6 1.5 −7.0 ns
2003 Nov 25 12
Philips Semiconductors Product specification
16-bit bus transceiver with direction pin; 5 V tolerant;
3-state 74LVC16245A;
74LVCH16245A
AC WAVEFORMS
handbook, halfpage
MNA477
nAn, nBn
input
nBn, nAn
output
tPHL tPLH
GND
VI
VM
VM
VOH
VOL
Fig.6 The input (nAn, nBn) to output (nBn, nAn) propagation delays.
VOL and VOH are typical output voltage drop that occur with the output load.
VCC VMINPUT
VItr=t
f
1.2 V 0.5 ×VCC VCC ≤2.5 ns
2.7 V 1.5 V 2.7 V ≤2.5 ns
3.0 to 3.6 V 1.5 V 2.7 V ≤2.5 ns
2003 Nov 25 13
Philips Semiconductors Product specification
16-bit bus transceiver with direction pin; 5 V tolerant;
3-state 74LVC16245A;
74LVCH16245A
handbook, full pagewidth
MNA362
tPLZ
tPHZ
outputs
disabled outputs
enabled
VY
VX
outputs
enabled
output
LOW-to-OFF
OFF-to-LOW
output
HIGH-to-OFF
OFF-to-HIGH
nOE input
VI
VOL
VOH
VCC
VM
GND
GND
tPZL
tPZH
VM
VM
Fig.7 3-state enable and disable times.
VOL and VOH are typical output voltage drop that occur with the output load.
VCC VMINPUT
VItr=t
f
1.2 V 0.5 ×VCC VCC ≤2.5 ns
2.7 V 1.5 V 2.7 V ≤2.5 ns
3.0 to 3.6 V 1.5 V 2.7 V ≤2.5 ns
VX=V
OL +0.3VatV
CC ≥2.7 V;
VX=V
OL +0.1VatV
CC < 2.7 V.
VY=V
OH −0.3VatV
CC ≥2.7 V;
VY=V
OH −0.1VatV
CC < 2.7 V.
2003 Nov 25 14
Philips Semiconductors Product specification
16-bit bus transceiver with direction pin; 5 V tolerant;
3-state 74LVC16245A;
74LVCH16245A
Fig.8 Load circuitry for switching times.
Note
1. The circuit performs better when RL= 1000 Ω.
VCC VICLRL(1) VEXT
tPLH/tPHL tPZH/tPHZ tPZL/tPLZ
1.2 V VCC 50 pF 500 Ωopen GND 2 ×VCC
2.7 V 2.7 V 50 pF 500 Ωopen GND 2 ×VCC
3.0 to 3.6 V 2.7 V 50 pF 500 Ωopen GND 2 ×VCC
handbook, full pagewidth
VEXT
VCC
VIVO
MNA616
D.U.T.
CL
RT
RL
RL
PULSE
GENERATOR
Definitions for test circuit:
RL= Load resistor.
CL= Load capacitance including jig and probe capacitance.
RT= Termination resistance should be equal to the output impedance Zo of the pulse generator.
2003 Nov 25 15
Philips Semiconductors Product specification
16-bit bus transceiver with direction pin; 5 V tolerant;
3-state 74LVC16245A;
74LVCH16245A
PACKAGE OUTLINES
UNIT A
1
A
2
A
3
b
p
cD
(1)
E
(1)
eH
E
LL
p
QZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.4
0.2 2.35
2.20 0.25 0.3
0.2 0.22
0.13 16.00
15.75 7.6
7.4 0.635 1.4 0.25
10.4
10.1 1.0
0.6 1.2
1.0 0.85
0.40 8
0
o
o
0.18 0.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
SOT370-1 99-12-27
03-02-19
(1)
w
M
b
p
D
H
E
E
Z
e
c
v
M
A
X
A
y
48 25
MO-118
24
1
θ
A
A
1
A
2
L
p
Q
detail X
L
(A )
3
pin 1 index
0 5 10 mm
scale
SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm SOT370-1
A
max.
2.8
2003 Nov 25 16
Philips Semiconductors Product specification
16-bit bus transceiver with direction pin; 5 V tolerant;
3-state 74LVC16245A;
74LVCH16245A
UNIT A1A2A3bpcD
(1) E(2) eH
ELL
pQZywvθ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.15
0.05 0.2
0.1 8
0
o
o
0.1
DIMENSIONS (mm are the original dimensions).
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
SOT362-1 99-12-27
03-02-19
wM
θ
A
A1
A2
D
Lp
Q
detail X
E
Z
e
c
L
X
(A )
3
0.25
124
48 25
y
pin 1 index
b
H
1.05
0.85 0.28
0.17 0.2
0.1 12.6
12.4 6.2
6.0 0.5 1 0.25
8.3
7.9 0.50
0.35 0.8
0.4
0.08
0.8
0.4
p
EvMA
A
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm SOT362-1
A
max.
1.2
0
2.5
5 mm
scale
MO-153
2003 Nov 25 17
Philips Semiconductors Product specification
16-bit bus transceiver with direction pin; 5 V tolerant;
3-state 74LVC16245A;
74LVCH16245A
0.65
A
1
bA
2
UNIT D ye
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
02-08-08
03-07-01
IEC JEDEC JEITA
mm 10.3
0.2 0.7
0.6 4.6
4.4
y1
7.1
6.9
0.45
0.35 0.08 0.1
e1
3.25
e2
5.85
DIMENSIONS (mm are the original dimensions)
SOT702-1 MO-225
E
0.15
v
0.08
w0 2.5 5 mm
scale
SOT702-1
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2003 Nov 25 18
Philips Semiconductors Product specification
16-bit bus transceiver with direction pin; 5 V tolerant;
3-state 74LVC16245A;
74LVCH16245A
DATA SHEET STATUS
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
LEVEL DATA SHEET
STATUS(1) PRODUCT
STATUS(2)(3) DEFINITION
I Objective data Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II Preliminary data Qualification This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III Product data Production This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
DEFINITIONS
Short-form specification The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
attheseorat anyother conditionsabove thosegiven inthe
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Application information Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentationorwarranty thatsuchapplicationswillbe
suitable for the specified use without further testing or
modification.
DISCLAIMERS
Life support applications These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductorscustomersusingor sellingtheseproducts
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes Philips Semiconductors
reserves the right to make changes in the products -
including circuits, standard cells, and/or software -
described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
© Koninklijke Philips Electronics N.V. 2003 SCA75
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Philips Semiconductors – a worldwide compan y
Contact information
For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
Printed in The Netherlands R20/07/pp19 Date of release: 2003 Nov 25 Document order number: 9397 750 12155
