August 1995 - Linear Technology

AUGUST 1995 VOLUME V NUMBER 3

The LT1304: Micropower

DC/DC Converter

with Independent

Low-Battery Detector

by Steve Pietkiewicz

Introduction

In the expanding world of low power

portable electronics, a 2- or 3-cell

battery remains a popular power

source. Designers have many options

for converting the 2V-4V battery volt-

age to 5V, 3.3V, and other required

system voltages using low voltage

DC/DC converter ICs. The LT1304

offers users a micropower step-up

DC/DC converter featuring Burst

Mode

operation and a low-battery

detector that stays alive when the

converter is shut down. The device

consumes only 125µA when active,

yet can deliver 5V at up to 200mA

from a 2V input. High frequency

operation up to 300kHz allows the

use of tiny surface mount inductors

and capacitors. When the device is

shut down, the low-battery detector

draws only 10µA. An efficient internal

power NPN switch handles 1A switch

current with a drop of 500mV. Up to

85% efficiency is obtainable in

2-cell-to-5V converter applications.

The fixed-output LT1304-5 and

LT1304-3.3 versions have internal

resistor dividers that set the output

voltage to 5V or 3.3V, respectively.

Operation

The LT1304’s operation can best

be understood by examining the

block diagram in Figure 1 (page 17).

Comparator A1 monitors the output

voltage via resistor-divider string R3/

R4 at the FB pin. When V

is higher

than the 1.24V reference, A2 and the

timers are turned off. Only the refer-

ence, A1, and A3 consume current,

typically 120µA. As V

drops below

1.24V plus A1’s hysteresis (about

6mV), A1 enables the rest of the cir-

cuit. Power switch Q1 is then cycled

on for 6µs, or until current compara-

tor A2 turns off the on-timer,

whichever comes first. Off-time is fixed

at approximately 1.5µs. Q1’s switch-

ing causes current to alternately build

up in inductor L1 and discharge into

output capacitor C2 via D1, increas-

ing the output voltage. As V

increases enough to overcome C1’s

hysteresis, switching action ceases.

C2 is left to supply current to the

load until V

OUT

decreases enough to

force A1’s output high, and the entire

cycle repeats.

If switch current reaches 1A, caus-

ing A2 to trip, switch on-time is

reduced. This allows continuous-

mode operation during bursts. A2

monitors the voltage across 7.2Ω

resistor R1, which is directly related

to the switch current. Q2’s collector

current is set by the emitter-area

ratio to 0.5% of Q1’s collector

IN THIS ISSUE . . .

COVER ARTICLE

The LT

1304: Micropower DC/DC

Converter with Independent

Low-Battery Detector ................ 1

Steve Pietkiewicz

Editor's Page ............................2

Richard Markell

LTC in the News ....................... 2

DESIGN FEATURES

LT1510 Battery Charger IC

Supports All Battery Types,

Including Lithium-Ion ............... 3

Chia Wei Liao

LT1118 Terminates

Active SCSI and More ................ 5

Gary Maulding

LT1580 Low Dropout Regulator

Uses New Approach to

Achieve High Performance ........ 7

Craig Varga

Power Factor Correction —

Part Three: Discontinuity ......... 9

Dale Eagar

The New LT1508/LT1509 Combines

Power Factor Correction and a

PWM in a Single Package ........ 11

Kurk Mathews

LTC

1329 Micropower,

8-Bit, Current Output DAC ...... 16

K.S. Yap

DESIGN INFORMATION

RS232 Transceiver Protected to

15kV IEC-801-2 ESD Standards

...............................................20

Gary Maulding

V.35 Transceivers Allow

3-chip V.35 Port Solution ....... 22

Y.K. Sim

DESIGN IDEAS ................. 24–37

(complete list on page 24)

New Device Cameos ................ 38

continued on page 17

, LTC and LT are registered trademarks of Linear Technology Corporation.

Burst Mode and Super Burst are trademarks of Linear Technology Corporation.

LINEAR TECHNOLOGY

Linear Technology Magazine • August 1995

EDITOR'S PAGE

Eggs on the Wall? by Richard Markell

I was in the lunch room several

weeks ago calmly eating my lunch,

when suddenly a large “boom”

sounded behind me. (No, it wasn’t an

underrated tantalum capacitor.) I

turned around (slowly) to find that

one of our physicists had tried to

hard boil an egg in the microwave

without first putting a vent hole in

the eggshell. My first reaction was to

exclaim that any physicist should

know that when most things get hot,

they expand (go boom!). Sure, we

could plot the size of the vent hole

versus the “time to go boom.” The

conservative engineer might do this.

Both the analytical approach and try-

ing things to see what happens are

useful, but maybe we need more

“booms.” It seems that, in today’s

business atmosphere, there is too

much conservatism and too few

people just trying things to see what

happens. At LTC we try to encourage

both approaches.

The featured article for this issue

highlights the LT1304 micropower

DC/DC converter, which includes a

low-battery detector that stays alive

when the converter is shut down. The

LT1304 is a micropower step-up

DC/DC converter tailored for opera-

tion from two or three cells and

featuring Burst Mode operation.

The device consumes only 125µA

when operating and can deliver 5V at

up to 200mA from a 2V input. The

device features 300kHz operation,

allowing the use of tiny surface mount

inductors.

A second article features the

LT1118 family of fixed voltage regula-

tors that can both source and sink

current. These devices are ideal for

use as active SCSI terminators. The

LT1118 family of regulators features

excellent stability and load transient

settling with most capacitive loads.

The devices can source up to 800mA

and sink up to 400mA. Quiescent

current is only 600µA unloaded.

The LT1510 is a battery charger IC

that allows fast charging of all types

of batteries, including Li-Ion. The

LT1510 allows users to precisely set

battery current and voltage, and to

choose the best charging algorithm

for a given application. For many

situations, such as Li-Ion, no exter-

nal monitoring of the battery is

required. The LT1510 is a current

mode PWM battery charger that

allows constant-current and/or con-

stant-voltage charging. The internal

switch is capable of delivering 1.5A

DC current (2A peak current).

Another featured product is the

LT1508/LT1509 “combo” power

factor correction circuit and PWM

controller in a single package. The

LT1508/LT1509 integrates the

functionality of an LT1248 power

factor controller with a 50% maxi-

mum duty cycle PWM in a single

20-pin DIP or SOIC.

“Power Factor Correction: Part

Three,” continues the series that be-

gan two issues ago. This installment

discusses discontinuity, and the grief

it causes for those trying to under-

stand the operation of the PFC.

The LTC1329, a micropower, 8-bit,

current output DAC, is the subject of

a short article. The LTC1329 is de-

signed to digitally control a power

supply’s output voltage or to serve as

a trimmer pot replacement. This is a

versatile part with a 1, 2 or 3 wire

interface. Additional information on

applying LTC’s DAC product line will

be found in a feature on 12-bit voltage

mode DACs. This article highlights

circuits ranging from a computer-

controlled 4-to-20mA current loop to

an opto-isolated serial interface.

In our “Design Information” sec-

tion, we present information on

electrostatic discharge (ESD) and the

IEC-801-2 specification. Our popular

RS232 transceiver, the LT1137A, has

been upgraded to include on-chip

ESD protection compliant with level

four of the IEC-801-2 standard. This

upgrade allows full ESD protection

with no energy absorbing components

external to the LT1137A.

Our “Design Ideas” section is chock

full of useful circuits. These include

circuits for driving diode-ring mixers,

a fully differential 8-channel, 12-bit

A/D system, and a circuit for

touchscreen interface.

LTC in the News...

Linear Technology reports record

annual and quarter sales!!!

Thanks to all of you for your hard

work and constant drive to make Linear

Technology the best analog company

world wide, the company’s annual

sales once again increased to a record

$265,023,000 for fiscal year end July

2, 1995, an increase of 32% over net

sales from the previous year. The

company also reported record net

income for the year of $84,696,000 or

$2.22 per share, an increase of 49%

over the $56,827,000, or $1.51 per

share, reported for fiscal 1994.

Linear Technology also announced

that the board of directors approved

both an increase in the quarterly

dividend to $0.08 from $0.07 per

share and a two-for-one stock

split of its common stock. A cash

dividend will be paid on August 23,

1995 to shareholders of record on

August 4, 1995. Shareholders of

record on August 11, 1995 will be

issued certificates reflecting the stock

split; these shares will be distributed

on September 1, 1995.

Chief Executive Magazine’s May,

1995 issue features the prestigious

‘Charting The Chief Executive 100

Index.’ Robert Swanson Jr. is among

the top ten Chief Executives for a third

year in a row. In order to make the

CE100, the following criteria had to

be met. Each CEO had to have been in

their position throughout 1992-1994,

the company had to be public for that

time frame and the market value of the

firms public stock had to exceed $500

million at the end of 1994.

Financial World’s July 18, 1995

issue included Linear Technology

Corporation on its list of “America’s 50

Best Mid-Cap Companies.” LTC was

ranked number 5 up from 21 the

previous year.

Investor’s Business Daily June

28,1995 issue featured an interview

with Paul Coghlan, titled ANALOG

LIFE, Linear Technology Keeps Pulse

Of Light, Heat, Sound, Speed. Mr.

Coghlan attributes the company’s

success to being in the right market at

the right time with a good strategy.

Linear Technology Magazine • August 1995

LT1510 Battery Charger

IC Supports All Battery Types,

Including Lithium-Ion by Chia Wei Liao

The LT1510 can charge batteries

ranging from 1V to 20V; ground-

sensing of current is not required.

The battery negative terminal can be

tied directly to ground. A saturating

switch running at 200kHz gives high

charging efficiency and small induc-

tor size. A blocking diode between

the chip and the battery is not re-

quired because the chip goes into

sleep mode and drains only 3µA when

the wall-adapter is unplugged. Soft-

start and shutdown features are also

provided. The LT1510S8 comes in an

8-pin SOIC and the LT1510S16 comes

in a 16-pin, fused-lead, power SO

package with a thermal resistance of

45°C/W.

Circuit Operation

The LT1510 is a current mode PWM

step-down (buck) switcher (see Fig-

ure 1). The battery DC charging

current is programmed by a resistor

PROG

(or a DAC output current) at

the PROG pin. Amplifier CA1 con-

verts the charging current through

RS1 to a much lower current (I

PROG

500µA/A), which is then fed into the

PROG pin. Amplifier CA2 compares

the output of CA1 with the pro-

grammed current and drives the PWM

loop to force them to be equal. High

DC accuracy is achieved with averag-

ing capacitor C

PROG

. Note that I

PROG

has both AC and DC components.

PROG

flows through R1 and generates

a ramp signal that is fed to the PWM

Figure 1. LT1510 block diagram

Introduction

A sure way to start an argument

among electronic engineers is to bring

up the subject of battery charging.

This relatively simple problem has

spawned more solutions than the

proverbial mouse trap. This situation

seems to be the result of misinforma-

tion about the basic electrochemistry

of the batteries themselves, the diffi-

culty of quantifying results, and the

fertile imaginations of engineers who

like to create. At times, battery charg-

ing seems to have as much to do with

religion as with science.

The LT1510 was created with this

situation in mind. It is a basic build-

ing block for transferring energy

efficiently and accurately from one

source to another. Battery current

and voltage are precisely defined by

the user, who can decide which charg-

ing algorithm is best and set up the

LT1510 in whatever programmed

current or voltage combination is

required. For many situations, espe-

cially lithium-ion, no extra external

battery monitoring is needed.

The LT1510 current mode PWM

battery charger is the simplest, most

efficient solution to fast charge mod-

ern rechargeable batteries, including

lithium-ion, nickel-metal-hydride

(NiMH), and nickel-cadmium (NiCd),

that require constant-current and/

or constant-voltage charging. The in-

ternal switch is capable of delivering

1.5A DC current (2A peak current).

The onboard current sense resistor

(0.1Ω) makes programming the charg-

ing current very simple. One resistor

(or a programming current from a

DAC) is required to set the full charg-

ing current (1.5A max.) to within 5%

or the trickle-charge current (150mA)

to 10% accuracy. With 1% reference-

voltage accuracy, the LT1510S16

meets the critical constant-voltage

charging requirement for lithium cells.

DESIGN FEATURES

–

0.7V

1.5V

BAT

REF

GND

SLOPE COMPENSATION

PWM

CA2

–

CA1

REF

2.465V

SHUTDOWN

200kHz

OSCILLATOR

R1

BAT

PROG

BOOST

SENSE

BAT

0VP

1510 BD

PROG

60k

PROG

BAT

= 500µA/A

= 0.64

Ω

CHARGING CURRENT I

BAT



= (I

PROG

)(2000)



= 2.465V

PROG

(2000)

()

Linear Technology Magazine • August 1995

control comparator C1 through buffer

B1 and level-shift resistors R2 and

R3, forming the current mode inner

loop. The BOOST pin drives the NPN

switch (Q

) into saturation and re-

duces power loss. For batteries such

as lithium, which require both con-

stant-current and constant-voltage

charging, the 1% 2.5V reference and

the amplifier VA reduce the charging

current when battery voltage reaches

the preset level. For NiMH and NiCd,

VA can be used for overvoltage pro-

tection. When an input voltage is not

present, the charger goes into low

current (3µA typical) sleep mode as

input drops to 0.7V below the battery

voltage. To shut down the charger,

pull the V

pin low with a transistor.

Typical Charging Algorithms

The following algorithms are

representative of current techniques:

Lithium-Ion — charge at constant

voltage with current limiting set to

protect components and to avoid over-

loading the charging source. When

the battery voltage reaches the pro-

grammed voltage limit, current will

automatically decay to float levels.

The accuracy of the float voltage is

critical for long battery life. Be aware

that lithium ion batteries in series

suffer from “walk away,” because of

the required constant-float-voltage

charging technique. “Walk away” is a

condition where the batteries in the

series string wind up in different states

of the charge/discharge cycle. They

may need to be balanced by redistrib-

Figure 3. Charging Li-Ion batteries

DESIGN FEATURES

1510_2. eps

BOOST

10µF

R1

50K

1µF

0.1µF

IBAT

2V TO 20V

IBAT = 1A

IBAT = 0.1A

300ΩR2

5.6K

GND

SENSE

VCC

C1

0.22µF

WALL

ADAPTOR

D1

1N914

1N5819

PROG

VCQ1

VN2222

BAT ON:

OFF:

22µF

LT1510S8

30µH

–

Figure 2. Charging NiCd or NiMH batteries

1510_3. eps

BOOST

10µF

3.83kΩ

0.1µF

4.2V

R3

59K R4

25K

OVP

GND

SENSE

**OPTIONAL

C1

0.22µF

11V TO 25V 

DC WALL

ADAPTOR

D1

1N914

1N5819

PROG

Q3**

VN2222

BAT

22µF

LT1510S16

30µH

–

4.2V

–

1µF

300Ω

uting charge from one battery to an-

other. This phenomenon is minimized

by carefully matching the batteries

within a pack.

Nickel-Cadmium — charge at a

constant current, determined by the

power available or by a maximum

specified by the manufacturer. Moni-

tor battery charge state using voltage

change with time (dV/dt), second de-

rivative of voltage (d

V/dt), battery

pressure, or some combination of

these parameters. When the battery

approaches full charge, reduce the

charging current to a value (top-off)

that can be maintained for a long time

without harming the battery. After

the top-off period, usually set by a

simple time out, reduce the current

further to a trickle level that can be

maintained indefinitely, typically 1/10

to 1/20 of the battery capacity.

Nickel-Metal-Hydride — same as

NiCd, except that some NiMH batter-

ies cannot tolerate a continuous low

level trickle charge. Instead, they

require a pulsed current of moderate

value, with a low duty cycle, so that

the average current represents a

trickle level. A typical scenario would

be one second “on” and thirty sec-

onds “off,” with the current set to

thirty times desired trickle level.

Recharging NiMH

or NiCd Batteries

The circuit in Figure 2 will charge

battery cells with voltages up to 20V

at a full charge current of 1A (when

Q1 is on) and a trickle charge current

of 100mA (when Q1 is off). If the third

charging level is needed, simply add

a resistor and a switch. The basic

formula for charging current is:

2 465

122000 1

2 465

12000 1

RR whenQ on

RwhenQ off

(

)

(

)

For NiMH batteries, a pulsed trickle

charge can be easily implemented

with a switch in series with R1; switch

Q1 at the desired rate and duty cycle.

If a micro-controller is used to control

the charging, connect the DAC cur-

rent sink output to the PROG pin.

Recharging Lithium-Ion

Batteries

The circuit in Figure 3 will charge

lithium ion batteries at a constant

current of 1.5A until battery voltage

reaches 8.4V, set by R3 and R4. It

then goes into constant-voltage charg-

ing and the current slowly tapers off

to zero. Q3 can be added to discon-

nect R3 and R4 so they will not drain

the battery when the wall-adapter is

unplugged.

Linear Technology Magazine • August 1995

LT1118 Terminates Active SCSI

and More

The new LT1118 family of positive,

fixed voltage regulators is unique in

maintaining output voltage regula-

tion while both sinking and sourcing

current. Conventional positive volt-

age regulators lose regulation if the

load circuit attempts to return cur-

rent to the regulator output. Capable

of sourcing up to 800mA and sinking

400mA, LT1118 family regulators

feature excellent stability and load-

transient settling with any capacitive

load greater than 0.22µF. Their in-

sensitivity to capacitive loading makes

the regulators easy to use in any

application within their power level.

Quiescent current is only 600µA when

unloaded. 5V, 2.5V, and 2.85V ver-

sions of the LT1118 are available in

3-pin SOT-223 or fused-lead SO-8

packages. The SO-8-packaged devices

include an enable pin that allows

the device to be shut down with the

output at high impedance. Quiescent

current drops to zero when the enable

pin is low.

The ability to maintain regulation

while both sourcing and sinking cur-

rent is valuable in several regulator

applications. Appropriate applica-

tions are data-bus termination,

power-supply splitting, and any ap-

plication where fast settling of large

load transients is needed. The 2.85V

version is ideal for use as an active

termination for SCSI cables. The 2.5V

version makes a convenient low power

supply splitter in 5V systems. The 5V

version is ideal where fast settling of

load transients is required. The shut-

down pin on the SO-8-packaged

devices is valuable for power manage-

ment and supply sequencing.

Active SCSI Terminator

The SCSI parallel bus requires cable

terminations at each end of the cable.

The termination serves the dual pur-

poses of impedance matching and

providing the pull-up to the 2.8V

negated logic level. The open-drain or

open-collector drivers on the bus es-

tablish the low level and make

multiplexing of equipment simple,

due to the “wired-OR” nature of the

bus signals.

Passive terminators consisting of a

resistor divider from the termpower

supply (Figure 1) were commonly used

on early SCSI networks. Passive ter-

minators have mostly disappeared

from use in recent systems due to the

high power dissipation and lack of

power supply rejection of the resistor

divider. The Boulay or active termina-

tion has replaced the passive

terminations in today’s equipment. A

Boulay active termination uses a

2.85V voltage regulator to establish

the negated logic level and 110Ω re-

sistors to provide the impedance

match to each data and control line

(Figure 2). Power consumption when

all lines are in the high (negated)

state is dominated by the low quies-

cent current of the regulator, a 0.225W

saving over resistor terminators in a

27-line wide SCSI bus.

SCSI-2 introduced the use of

active-negation drivers in SCSI bus

systems. Active-negation drivers have

three states: active (low), negated

(high), and high impedance. By rais-

ing the data line above the 2.85V

termination voltage when negated,

the effects of cable reflections and

crosstalk between lines are overcome,

improving the noise margin in high

speed data busses. Active negation

may be used on all but three SCSI

data and control lines (three lines,

BSY, SEL, and RST, must be wire-

OR’d and cannot use active negation

drivers). Each negated driver can

source up to 7mA when in the high

state. Most voltage regulators will

lose regulation if any current is re-

turned to their outputs, causing the

termination voltage to rise.

The LT1118-2.85, with current

sinking, is the perfect solution for

this application. The 800mA sourcing

capability and 400mA current-sink

capability provide ample margin to

terminate a 27-line wide SCSI bus

in the fully asserted or negated state.

Even though SCSI standards restrict

the active negation drivers to a 3.24V

and 7mA negated signal level, many

driver circuits in use exceed the al-

lowed SCSI drive levels. If the

maximum of 24 lines are negated in a

Wide-SCSI bus, 168mA of current is

forced back into the terminator. The

400mA sink capability of the LT1118

gives more than twice the required

by Gary Maulding

Figure 1. SCSI passive terminator Figure 2. Boulay active terminator

DESIGN FEATURES

1118_1.eps

5V TERMPOWER

220Ω

ONE PER

BUS LINE

330Ω

1118_2.eps

5V TERMPOWER 18 OR

27 LINES

1µF0.1µF

2.85V

REGULATOR

OUT

Authors can be contacted

at (408) 432-1900

Linear Technology Magazine • August 1995

DESIGN FEATURES

degrade the noise margin of the bus

signals. The capacitance inevitably

comes from the pin-to-pin capaci-

tance of the IC package, the ESD

protection devices on the chip, and

the distributed capacitance of the dif-

fused resistors on the chip. The

reduced noise margin of the SCSI bus

increases error rates and limits the

length of the bus and the number of

nodes that can reliably be connected.

The external surface mount resistors

used with the LT1118-2.85 reduce

the capacitance to the stray PC board

capacitance.

Power consumption further limits

the capabilities of SCSI terminators

with on-chip resistors. The worst-

case power consumption for a SCSI

terminator occurs when all data and

control lines are active (low). For a

27-line wide SCSI bus, the regulator

dissipates 1.2W and the resistors dis-

sipate 2.0W. The surface mount IC

packages used for SCSI terminators

cannot dissipate this total power of

3.2W. This fundamental limit restricts

the devices with on-chip resistors to

nine lines. Three terminator chips

with integral resistors must be used,

versus one LT1118-2.85 with inex-

pensive surface mount resistors. The

cost of three SCSI terminator ICs

with integral resistors is more than

three times the cost of an LT1118-

2.85 and the external 110Ω resistors.

Power Supply Splitter

Often a system has only a single 5V

power supply, but has analog sec-

tions that require positive and negative

supplies. The current source and sink

capabilities of the LT1118-2.5 are

ideal for generating a virtual ground

current handling without damage or

loss of regulation.

The fast settling time and stability

of the LT1118 allow the regulator

output capacitor to be reduced from a

typical 10µF to a surface mount 1µF

ceramic capacitor saving board

space and cost. The low, 600µA

quiescent current of the regulator

allows the terminator to be connected

to the SCSI term power line when not

in use.

The maximum voltage spikes for

Figure 3’s circuit are less than 0.3V

and settle out in 5µs. These tests were

under maximum load transient con-

ditions: 800mA sourcing to 400mA

sinking. This transient is far more

severe than would be seen in a SCSI

bus termination, yet the voltage

output is always within acceptable

SCSI voltage levels. The amplitude

of the output voltage spikes may

be reduced further by use of larger

output capacitors.

Several competitors offer active

SCSI terminators that use on-chip

resistors. These terminators, while

offering some convenience, are lim-

ited in performance and are not as

economical a solution as the LT1118-

2.85. Capacitance on the output pins

of the terminators cause impedance

mismatches at high frequencies,

which increase cable reflections and

Figure 4. Supply splitter

Figure 5. Power sequencing using the LT1118

Figure 3. LT1118 typical application

LT1118-2.85

GND

1118_3.eps

2.2µF

1µF

CERAMIC

LOAD

OUT

to allow the use of analog compo-

nents without a negative supply.

Figure 4 shows the LT1118-2.5 used

as a 5V supply splitter. The LT1118

can absorb large DC or transient

ground currents that would force high

power consumption if a resistive sup-

ply splitter were used. The regulator’s

fast settling time allows the use of

small capacitors, and its stability with

any large capacitive load makes it

easy to apply to almost any splitter

application. Competing supply split-

ters are known to suffer from stability

problems with capacitive loading.

Power Management

The enable control on the SO-8

packaged LT1118 provides easy power

management solutions. A logic low

on the enable pin causes the

regulator’s output to go high imped-

ance and its quiescent current to

drop to zero. A logic high brings the

regulator into normal regulation.

Intelligent power controllers can

make use of this capability to selec-

tively power subcircuits as needed

(see Figure 5). The small output ca-

pacitor requirements of the LT1118

minimize turn-on time and the sup-

ply current spikes that result from

charging large filter capacitors.

1118_4.eps

2.5V

VIRTUAL

GROUND

0.1µF1µF

GND

LT1118-2.5

OUT

continued on page 15

1118_5.eps

OUT

1

5V

(FIRST ON/LAST OFF)



OUT

2

5V

(LAST ON

FIRST OFF)

0.1µF

0.1µF 0.22µF

GND

LT1118-5

OUT

0.1µF

0.01µF

0.22µF

GND

LT1118-5

IN OUT

10k

OFF

Linear Technology Magazine • August 1995

LT1580 Low Dropout Regulator

Uses New Approach to

Achieve High Performance

Introduction

Low dropout regulators have be-

come more common in desktop

computer systems as microprocessor

manufacturers have moved away from

5V-only CPUs. A wide range of supply

requirements exist today, with new

voltages just over the horizon. In many

cases the input-output differential is

very small, effectively disqualifying

many of the low dropout regulators

on the market today. Several manu-

facturers have chosen to achieve lower

dropout by using PNP-based regula-

tors. The drawbacks of this approach

include much larger die size, inferior

line rejection, and poor transient

response.

Enter the LT1580

The new LT1580 NPN regulator is

designed to make use of the higher

supply voltages already present in

most systems. The higher voltage

source is used to provide power for

the control circuitry and supply the

drive current to the NPN output tran-

sistor. This allows the NPN to be driven

into saturation, thereby reducing the

dropout voltage by a V

compared to

a conventional design. Applications

for the LT1580 include 3.3V to 2.5V

conversion with a 5V control supply,

5V to 4.2V conversion with a 12V

control supply, or 5V to 3.6V conver-

sion with a 12V control supply. It is

easy to obtain dropout voltages as

low as 0.4V at 4A, along with excel-

lent static and dynamic specifications.

The LT1580 is capable of 7A maxi-

mum, with approximately 0.8V

input-to-output differential. The

current requirement for the control

voltage source is approximately 1/50

of the output load current, or about

140mA for a 7A load. The LT1580

presents no supply-sequencing is-

sues. If the control voltage comes up

first, the regulator will not try to sup-

ply the full load demand from this

source. The control voltage must be

at least 1V greater than the output to

obtain optimum performance. For

adjustable regulators the adjust-pin

current is approximately 60µA and

varies directly with absolute tempera-

ture. In fixed regulators the ground

pin current is about 10mA and stays

essentially constant as a function of

load. Transient response performance

is similar to that of the LT1584

fast-transient-response regulator.

Maximum input voltage from the

main power source is 7V, and the

absolute maximum control voltage is

14V. The part is fully protected from

overcurrent and over-temperature

conditions. Both fixed voltage and

adjustable versions are available. The

adjustables are packaged in 5-pin

TO-220s, whereas the fixed voltage

parts are 7-pin TO-220s.

Figure 1. LT1580 delivers 2.5V from 3.3V at up to 6A

The LT1580 Brings

Many New Features

Why so many pins? The LT1580

includes several innovative features

that require additional pins. Both the

fixed and adjustable versions have

remote-sense pins, permitting very

accurate regulation of output voltage

at the load, where it counts, rather

than at the regulator. As a result, the

typical load regulation over a range of

100mA to 7A with a 2.5V output is

approximately 1mV. The sense pin

and the control-voltage pin, plus the

conventional three pins of an LDO

regulator, give a pin count of five for

the adjustable design. The fixed-

voltage part adds a ground pin for

the bottom of the internal feedback

divider, bringing the pin count to six.

The seventh pin is a no-connect.

Note that the adjust pin is brought

out even on the fixed-voltage parts.

This allows the user to greatly

improve the dynamic response of the

regulator by bypassing the feedback

DESIGN FEATURES

1580_1.eps

C2

220µF

10V

CONT

3.3V

RTN

SENSE

OUT

ADJ

R1

110Ω

OUT

= 2.5V

U1

LT1580

C3

22µF

25V

C4

0.33µF

R2

110Ω

C1

100µF

10V

100µF

10V

1µF

25V

10X

MICROPROCESSOR

SOCKET

by Craig Varga

Linear Technology Magazine • August 1995

temperature, guaranteed, while

operating with an input/output dif-

ferential of well under 1V.

In some cases a higher supply volt-

age for the control voltage will not be

available. If the control pin is tied to

the main supply, the regulator will

still function as a conventional LDO

and offer a dropout specification

approximately 70mV better than

conventional NPN-based LDOs. This

is the result of eliminating the voltage

drop of the on-die connection to the

control circuit that exists in older

designs. This connection is now made

externally, on the PC board, using

much larger conductors than are

possible on the die.

Circuit Examples

Figure 1 shows a circuit designed

to deliver 2.5V from a 3.3V source

with 5V available for the control volt-

age. Figure 2 shows the response to a

load step of 200mA to 4.0A. The cir-

cuit is configured with a 0.33µF

adjust-pin bypass capacitor. The per-

formance without this capacitor is

shown in Figure 3. This difference in

performance is the reason for provid-

ing the adjust pin on the fixed-voltage

Figure 4. Small FET adds shutdown capability to LT1580 circuit

divider with a capacitor. In the past,

using a fixed regulator meant suffer-

ing a loss of performance due to lack

of such a bypass. A capacitor value of

0.1µF to approximately 1µF will gen-

erally provide optimum transient

response. The value chosen depends

on the amount of output capacitance

in the system.

In addition to the enhancements

already mentioned, the reference

accuracy has been improved by a

factor of two, with a guaranteed 0.5%

tolerance. Temperature drift is also

very well controlled. When combined

with ratiometrically accurate inter-

nal divider resistors, the part can

easily hold 1% output accuracy over

devices. A substantial savings in

expensive output decoupling capaci-

tance may be realized by adding a

small “1206-case” ceramic capacitor

at this pin.

Figure 4 shows an example of a

circuit with shutdown capability. By

switching the control voltage rather

than the main supply, the transistor

providing the switch function needs

only a small fraction of the current

handling ability that it would need if

it was switching the main supply.

Also, in most applications, it is not

necessary to hold the voltage drop

across the controlling switch to a very

low level to maintain low dropout

performance.

DESIGN FEATURES

1580_4.eps

C2

220µF

10V

CONT

3.3V

SHUTDOWN

RTN

SENSE

OUT

ADJ

R1

110Ω

OUT

= 2.5V

U1

LT1580

Q1

Si9407DY

C3

22µF

25V

C4

0.33µF

R2

110Ω

R3

10k

LOAD

C1

100µF

10V

50µs/DIV

2A/DIV

50mV/DIV

2A/DIV

50mV/DIV

50µs/DIV

Figure 3. Transient response without adjust-

pin bypass capacitor. Otherwise, conditions

are the same as in Figure 2

Figure 2. Transient response of Figure 1’s

circuit with adjust-pin bypass capacitor. Load

step is from 200mA to 4A

Linear Technology Magazine • August 1995

Power Factor Correction —

Part Three: Discontinuity

In Part One of this series (in Linear

Technology V:1, pp. 17–18, 21), we

investigated power factor correction

(PFC) by looking at its line-frequency

voltage, current, and power wave-

forms. We developed the concept of

a DC variac and demonstrated its

utility for performing PFC.

In Part Two (LT V:2, pp. 3–7), we

developed the boost converter and

investigated its properties when op-

erating in the continuous-mode. We

showed that a continuous-mode boost

converter does a pretty good job of

emulating the DC variac.

Part Three continues our investi-

gation of the boost converter by

focusing on its properties when oper-

ating in the discontinuous-mode. We

will see that a discontinuous-mode

boost converter doesn’t look anything

like a DC variac.

There is elegance and simplicity in

the concept of the DC variac. There is

beauty in its application to PFC, a

beauty that is manifest in the por-

tions of line cycle where the boost

converter is operating in the continu-

ous-mode.

Insubordination

Wreaks Havoc

In analog engineering, we like to

view things as continuous and

smooth, with all nonlinearities well

defined. We look at an AC sine wave

and see the voltage go from positive,

through zero, to negative with no

discontinuity. This explains a good

portion of the genuine perplexity ex-

perienced by the author when the

bank practices alchemy on perfectly

legitimate checks—changing the

paper into rubber. One would think

the bank would know that it is only

two days until payday and the check

book is still half full.

Research into the character of

banking employees reveals the star-

tling truth that the local bank is

staffed by the genetic precursor of the

digital engineer, a human so vile, so

base, as to actually enjoy inserting

discontinuities into an otherwise

continuous system. In the boost con-

verter it is the output diode that acts

as the banker.

The boost converter shown in Fig-

ure 1a is the boost converter from

heaven. Its glory is directly attributed

to its having a switch, rather than a

vile diode, in its output. The switch

allows current flow in both direc-

tions, and thus inserts no additional

discontinuities. The boost converter

from heaven always operates in the

continuous-mode. Back here on earth

we must live with discontinuities.

In a boost converter operating in

continuous-mode, the volt-seconds,

and thus the current in the inductor,

is entirely controlled by:

1. The input voltage

2. The output voltage

3. The duty factor.

The boost converter of Figure 1b is

the mortal version. The inductor cur-

rent (I

) in the boost converter, driven

by the three factors above, goes to

zero when the input line voltage

swings through zero. Figure 2 shows

that the input line current is actually

the average of the inductor current

over a full switching-frequency cycle.

Figure 2a is the inductor current when

the input line voltage has reached its

peak with the average value repre-

senting the line current at the plug.

(The ripple is filtered out by the input

EMI filter.) Similarly, Figure 2b shows

the inductor current and input cur-

rent when the instantaneous input

line voltage is at 40% of its peak

value. Finally, Figure 2c shows the

inductor current and input line cur-

rent as the instantaneous input line

voltage is at 10% of its peak value.

Notice that on each switching-

frequency cycle, the inductor current

goes to zero and then tries to reverse.

When the inductor current attempts

to reverse, the diode commits the

disgraceful act of insubordination,

destroying the beauty, simplicity, and

continuity of the control function of

the continuous-mode boost converter.

Figure 2c also shows the area gained

due to the clipping of the negative

portion of the inductor current. The

net effect is that the average current

is higher than the current that the

continuous-mode’s duty factor con-

trol of this DC variac would have

requested. The very act of preventing

the inductor current from reversing,

a hideous act indeed, necessitates a

new set of models to describe the

discontinuous-mode operation of the

boost converter. Further, a new con-

trol law is required to control the

discontinuous-mode boost converter.

The Boundary

is a Moving Target

The boost converter could be

likened to a fish tank, with the sur-

face of the water representing the

boundary of continuity, above which

the boost converter operates in the

continuous-mode and below which it

operates in the discontinuous-mode.

Folks living outside the fish tank tend

to obtain their oxygen from the air,

whereas folks living inside the fish

tank tend to get their oxygen from the

water. Air folk and water folk have

great trouble communicating, as

by Dale Eagar

Figure 1a. The boost converter from heaven Figure 1b. Mortal boost converter

DESIGN FEATURES

pfc3_1a.eps

LOAD

L1 SW1 OFF

pfc3_1b.eps

LOAD

ESW1

Linear Technology Magazine • August 1995

neither is equipped to speak, let alone

breathe, in the other’s medium. This

lack of communication has had a

significant effect on the way the two

groups think.

When air folk look at controlling

their boost converters, they speak of

duty-factor, the all important con-

trolling entity. Water folk control their

boost converters with on-time. We,

looking at the whole system from the

outside, know that the switching-

frequency is constant, and thus on-

time and duty-factor are describing

the same thing.

When air folk plot duty-factor, they

see a smooth curve extending down to

the surface of the water, and then

being refracted at the surface to a

different slope as it goes further down

to the bottom of the tank. The air folk

mathematicians have developed

equations that predict the duty-

factor plot, equations that exactly

describe everything it does in the air.

The air folk equations are incapable

of predicting what happens when the

plot is below the water. The water folk

mathematicians have the exact same

problem in reverse. We the onlookers

can inspect the equations, and when

we do, we see that the respective

equations have no hope of being

consolidated into one. The air folk

equation states that the duty-factor

is a function of instantaneous input

and output voltage and the rate of

change in the current flow, but is

altogether independent of the steady-

state value of the current flow,

the operating frequency, and the

inductor’s inductance value.

The water folk equation states that

the on-time is a function of the steady-

state current flow, the inductance of

the inductor, the switching frequency,

and the input voltage, and is inde-

pendent of the output voltage and the

rate of change in current flow. Fortu-

nately for all of us, both equations

converge on the same point at the

water’s surface.

Air folks use volt-seconds to de-

scribe the stretch in their inductors,

and water folk use joules to describe

the energy stored in their inductors.

As onlookers, we can convert between

Joules and volt-seconds by using the

following equations:

To further complicate matters, the

index of refraction of the water

changes and is directly related to the

water level. The water level changes

due to input voltage, output voltage,

switching frequency, output current,

and inductance of the inductor.

Memory Lost

In continuous-mode, the choke

current, and thus power intercepted

from the input line, depends on what

the choke current was during the

previous cycle. Evaluation of con-

tinuous-mode boost is best performed

by looking at the overall action of an

integral number of switching cycles

of a running converter.

In discontinuous-mode, the choke

current goes to zero during each

J = 1

2L (V • S)2

2LJ

V • S =

J = Energy in Joules

L = Inductance in Henries

V • S = Stretch in Volt Seconds

continued on page 15

DESIGN FEATURES

SWITCH

OFF

ACTIVE

OFF

TIME

AVE

000

AVE

INACTIVE

OFF

TIME

AVE

DIODE

COMMUTATES AREA GAINED

pfc3_2.eps

(2a) (2b) (2c)

Figure 2. Choke-current waveforms

Linear Technology Magazine • August 1995

The New LT1508/LT1509 Combines

Power Factor Correction and a PWM

in a Single Package

Introduction

When a supply requires power fac-

tor correction (PFC), designers

commonly add a PFC controller, such

as the LT1248, to the front end of a

traditional off-line DC/DC converter.

Although this is a viable solution,

additional circuitry is usually re-

quired to ensure that the two

controllers work well together. The

LT1508/LT1509 eliminate the need

for the additional circuitry and PWM

by integrating the functionality of a

LT1248 power factor controller and a

50% maximum-duty-cycle PWM in a

single 20-pin DIP or SOIC. The LT1508

retains all the pins of the LT1248

except the EN/SYNC, and adds quiet-

ground, soft-start, control-voltage,

current-limit and gate-driver pins

to form a voltage-mode PWM (see

Figure 1). In the LT1509, the current

limit becomes the ramp pin (PWM

current sense), forming a current-

mode PWM (see Figure 2).

Full Featured PFC

All features of the LT1248 remain,

requiring no compromises when

implementing PFC with the LT1508/

LT1509. Continuous-boost average

current mode reduces magnetics size

while operating at a fixed frequency,

without the need for slope compensa-

tion. Built-in overvoltage protection

reduces the external parts count.

Current amplifier offset voltage is dealt

with internally, minimizing crossover

distortion. Full differential input cur-

rent sense is available, as are 1.5A

gate drivers for both the PFC and

PWM stages. In addition to these

familiar performance features there

are a few new ones incorporated in

the PWM section.

Hand-Holding

Whether the application involves

voltage mode or current mode con-

trol, smooth interaction between the

PFC and PWM stages requires some

hand-holding. The first thing to

consider is start-up. The PFC pre-

regulator turns on with soft start as

usual. During this period the PWM’s

soft-start pin is held low, preventing

the second stage converter from turn-

ing on until the intermediate bus

voltage reaches its preset value (typi-

cally 380VDC to 400VDC for a

universal input). In addition to delay-

ing the PWM soft start during start-up,

the same comparator employs hys-

teresis to shut down the PWM stage in

the event the intermediate bus volt-

age drops below 73% of the preset

voltage (typically 280VDC). Once en-

abled, the PWM runs somewhat

independently of the PFC controller,

with a couple of exceptions. The oscil-

lator frequency is set by the values of

the capacitor and resistor to ground

on the C

SET

and R

SET

pins. Both the

PFC and PWM stages are synchro-

nized to this oscillator and operate at

the same switching frequency. Syn-

chronization is accomplished by

delaying the turn-on of the PWM stage

through 50% of the switching period.

In addition to making oscilloscope

measurements easier, these features

ensure that both switches don’t turn

on simultaneously, causing bus volt-

age spikes, noise and problems with

current mode in the PWM stage.

Single frequency and synchroniza-

tion also ensure the absence of beat

frequencies in the conducted emis-

sions. A preset duty cycle limit of

50% and leading-edge blanking fur-

ther ease the design of the PWM

section. The PWM stage is quickly

disabled by pulling the control

voltage low. Finally, the LT1509’s

current mode comparator has a 1.2

VDC offset to accommodate opto-feed-

back, and both the LT1508 and

LT1509 contain independent over-

current comparators.

Typical Application

Figure 3 shows a 24VDC, 300W

power-factor-corrected, universal-

input supply. The continuous,

current mode boost PFC preregulator

minimizes the differential-mode in-

put filter size required to meet

European low-frequency conducted

emission standards while providing

a high power factor. The 2-transistor

forward converter offers many ben-

efits including low peak currents, a

non-dissipative snubber, 500VDC

switches and automatic core reset

guaranteed by the LT1509’s 50%

maximum duty-cycle limitation.

An LT1431 and inexpensive opto-

isolation is used to close the loop

conservatively at 3kHz with excess

margin (see Figure 4). Figure 5 shows

the output voltage’s response to a 2A

to almost 10A current step. Regula-

tion is maintained to within 0.5V.

Efficiency curves for output powers

of 30, 150, and 300W are shown

in Figure 6. The PFC preregulator

alone has efficiency numbers of be-

tween about 87% and 97% over line

and load.

Start up of the circuit begins with

the LT1509’s V

bypass capacitors

trickle charging through 91kΩ

to 16VDC, overcoming the chip’s

.25mA typical start-up current (V

≤

lockout voltage). PFC soft start is

then released, bringing up the

382VDC bus with minimal overshoot.

As the bus voltage reaches its final

value, the forward converter comes

up, powering the LT1431, and

closing the feedback loop. A 3-turn

by Kurk Mathews

DESIGN FEATURES

Linear Technology Magazine • August 1995

Figure 1. Block diagram: LT1508

DESIGN FEATURES

–

+–

–

200µA

–

415

1508_1.eps

SENSE

7.5V

7.9V

16V TO 10V

12µA

7µA

7.0V

4.7V

EA CA

2.2V

25k

OUT

REF

7.5V

REF

OUT

SENSE

OUT

SET

LIMIT

50µA

0.7V

RUN

OSC

55%

DELAY

150ns

BLANKING

LIM

GND1

GTDR1

16V

GND2

GTDR2

OVP

SS1

SS2 PWMOK

–

Authors can be contacted

at (408) 432-1900

Linear Technology Magazine • August 1995

Figure 2. Block diagram: LT1509

DESIGN FEATURES

–

+–

–

200µA

–

415

19 18

1508_2.eps

SENSE

7.5V

7.9V

16V TO 10V

12µA

7µA

7.0V

4.7V

EA CA

2.2V

25k

1.2V

OUT

REF

7.5V

REF

OUT

SENSE

OUT

SET

RAMP V

50µA

0.7V

RUN

OSC

55%

DELAY

150ns

BLANKING

LIM

GND1

GTDR1

16V

GND2

GTDR2

OVP

SS1

SS2 PWM0K

–

+–

Linear Technology Magazine • August 1995

Figure 3. Schematic diagram of 300W, 24V DC output, power-factor corrected, universal-input supply

DESIGN FEATURES

–

1508_3.eps

SENSE

OUT

REF

LIM

OUT

SENSE

REF

OVP

IAC

10 12 5 8 7

OUT

GTDR1

GTDR2

1.2V

LT1431

20k

4.02k

1% 4.02k

499k

382VBUS

20k

15k

220Ω20k

2N2907

2.2k

330Ω

20k20Ω

IRF840

2N2222A

220Ω

10Ω15V,

1N965

(× 2) 20k

IRF840

MUR450

499k

0.0047µF

0.1

“X”

0.001µF

0.047µF

0.01µF

0.47µF330k

GI

KBU4J 0.15, 3W

FUKUSHIMA MPC71

10k

1.8k

470µ

20k

2.2k

10Ω

1N5819

GND2

0.001µF

0.1µF

4700pF

“Y” 4700pF

“Y”

1000pF

100pF

1µF20Ω

20Ω

0.001µF

GND1

LT1509

SET

1µF

SS2

0.047µF

0.022µF

COLL

62 5

GNDF GNDS

COMP

3.4k

1µF

63V

FILM

V+

24V

OUT

,

12.5 AMPS

RTOP

30.1k

10Ω

2000pF

REF

RMD

OUTPUT COM

100pF

RAMP

CNY17-3

200µF

15V

SS1

1815

SET

1µF

2.2µF

50V 330µF

35V

2.2µF

50V

10k

24.9k

REF

470µF, 50V

NICHICON

PL12.5X25

(× 3)

67µH

39 T 12AWG

T150-52

T2 7 TURNS

0.9" × 0.005" CU

ETD44-P

LPRI = 3.1mH

NOTE: UNLESS OTHERWISE SPECIFIED

1. ALL RESISTORS 1/4W, 5%

2. ALL CAPACITANCE VALUES IN MICROFARADS

GI

FEP

30DP

1M

1/2W

90 TO

264 VAC 0.1

“X”

4700pF

“Y”

KETEMA

SG57

SURGE-GARD

4700pF

“Y”

6A

FAST

0.1

“X”

20k

1µF

400V

ELECTRONIC

CONCEPTS

5MP12J105K

180µF

450V

91k

382VBUS

T1

COILTRONICS

CTX02-12378-2

1000pF

“Y”

ERA82-004

FUJI

ERA82-004

0.6AMP/40VR

10 : 15

TURNS

28AWG

846T500-3E2A

T2

35 TURNS

29AWG × 4

T2

35 TURNS

29AWG × 4

0.51, 2W

RG ALLEN

RFS2

(× 2)

MURH860CT

15V

ERA82-004

IRF840

Linear Technology Magazine • August 1995

100µs/DIV

DESIGN FEATURES

FREQUENCY (Hz)

–40

–20

LOOP GAIN (dB)

PHASE MARGIN (DEGREES)

1508_4.eps

10 100 1K 100K10K



100µs/DIV

5A/DIV

0.5V/DIV

(AC)

EFFICIENCY (%)

1508_6.eps

100 150 200 300250

300W

150W

30W

1118, continued from page 6

The enable pin provides many other

useful capabilities to the resourceful

designer. Figure 5 shows two LT1118-

5 regulators configured to provide

sequential turn-on and turn-off from

logic control. A logic high level turns

on the first regulator; the second regu-

lator turns on only after the first

output voltage is stable. Turn-off is in

the reverse order, due to the rapid

discharge of capacitor C3 through

the diode.

These and other applications will

benefit from the LT1118 family’s

unique performance attributes. Any

application that requires fast tran-

sient load response, unconditional

stability under capacitive loading,

or logic control of the power output

is a potential application for the

LT1118 family.

Figure 4. Bode plot of the circuit shown in

Figure 3 Figure 5. Figure 3’s response to a 2A to

approximately 10A load step Figure 6. Efficiency curves for Figure 3’s

circuit

secondary added to the 70-turn pri-

mary of T1, bootstraps V

to about

15VDC, supplying the chip’s 13mA

requirement as well as about 25mA to

cover the gate current of the three

FETs and high-side transformer

losses. A 0.15Ω sense resistor senses

input current and compares it to a

reference current (I

) created by the

outer voltage loop and multiplier. Thus

the input current follows the input

line voltage and changes, as neces-

sary, in order to maintain a constant

bank voltage. The forward converter

sees a voltage input of 382VDC un-

less the line voltage drops out, in

which case the 180µF main capacitor

discharges to 250VDC before the PWM

stage is shut down. Compared to a

typical off-line converter, the effective

input voltage range of the forward

converter is smaller, simplifying the

design. Additionally, the higher bus

voltage provides greater hold-up times

for a given capacitor size. The high-

side transformer effectively delays the

turn-on spike to the end of the built-

in blanking time, necessitating the

external blanking transistor.

Conclusion

The LT1508 and LT1509 offer

complete solutions for low-to-high

power, isolated, off-line power-

factor-corrected supplies. The many

built-in features ensure a simplified,

low-parts-count design for a variety

of applications.

PFC, continued from page 10

off-time. This allows us to model the

discontinuous-mode boost converter

as a sum of discrete events. Each

event consists of an on-time and an

off-time, with the off-time being longer

than the time it takes to empty all

stored energy from the inductor.

Figure 2c shows that the off-time

consists of two separate times:

❏the time when the diode is

conducting, the active off-time.

❏the time after the diode has

committed, yet before the next

on-time, the inactive-off-time.

The Energy Bucket

We look at a discontinuous-mode

boost converter as an energy bucket

that gets filled and dumped with each

cycle. During each cycle the bucket

takes a certain amount of energy (J).

Over a given number of cycles the

bucket will intercept many buckets-

ful of energy and deliver them to the

load. A boost converter operating at a

switching frequency of f and inter-

cepting an amount of energy of J

during each cycle, will be intercepting

f × J watts of power from the input

power line. Because this converter

is very efficient, essentially all of

the intercepted power is delivered to

the load.

This concludes part three of our

series introducing the power factor

correction conditioner.

Linear Technology Magazine • August 1995

LTC1329 Micropower,

8-Bit, Current Output DAC by K.S. Yap

DESIGN FEATURES

The LTC1329 is a micropower,

8-bit, current output DAC that

provides precision current output over

a wide supply range. This part is ideal

for portable and battery-powered

applications.

Description

The LTC1329 can communicate

with external circuitry by means of

one of three interface modes: stan-

dard, 3-wire serial-data mode, 1-wire

pulse mode, and 2-wire pulse mode.

In serial-data mode, the system mi-

croprocessor can serially transfer the

8-bit data to and from the LTC1329.

In pulse mode, the upper 6 bits of

DAC output can be programmed for

increment-only (1-wire interface) or

increment/decrement (2-wire inter-

face) operation. In increment-only

mode, when the count increases be-

yond full scale, the counter rolls over

and sets the DAC to zero. In incre-

ment/decrement mode, the counter

stops incrementing at full scale and

stops decrementing at zero, and will

not roll over.

The LTC1329 can operate over a

wide supply range from 2.5V to 6.5V,

with a very low quiescent current of

only 50µA, which drops to only 0.2µA

in shutdown mode. The DAC current

output can be biased from −20V to

+2.5V. The full-scale DAC current

output is 10µA ±2.5% and 50µA

±2.5% for the −10 and −50 versions

respectively. On power-up, the DAC

current output is automatically set

at mid-range.

The LTC1329’s micropower opera-

tion makes it ideal for portable and

battery-powered applications like

LCD contrast control, backlight

brightness control, power supply

voltage adjustment, battery charger

voltage/current adjustment, and trim

pot replacement. The LTC1329 is

available in 8-pin surface mount and

DIP packages. Figure 2. LTC1329 used to null op amp’s offset voltage

–

OUT

= 3.3V

SHDN

CLK

P1.0

OUT

GND

LTC1329-50

LT1006

V–

R1 =

TRIM RANGE = ±(0.5) (I

FULL SCALE

) (R2)

(0.5) (I

FULL SCALE

)

V–

1329_2.eps

R2

100Ω

R1

600k

MPU

(e.g. 8051)

Power Supply

Voltage Adjustment

Figure 1 is a schematic of a digi-

tally controlled power supply voltage

adjustment circuit using a 2-wire

interface. The LT1107 is configured

as a step-up DC/DC converter, with

the output voltage (V

OUT

) determined

by the values of the feedback resis-

tors. The LTC1329’s DAC current

output is connected to the feedback

node of these resistors, and an 8051

microprocessor is used to interface to

the LTC1329. By simply clocking the

LTC1329, the DAC current output is

decreased or increased (decreased if

= 0, increased if D

= 1), causing

OUT

to change accordingly.

Trimmer Pot Replacement

Figure 2 is a schematic of a digitally

controlled offset-voltage adjustment

circuit using a 1-wire interface. By

simply clocking the LTC1329, the DAC

current output is increased, causing

to increase accordingly. When the

DAC current output reaches full scale,

it will roll over to zero, causing V

change from the maximum offset trim

voltage to the minimum offset trim

voltage.

Figure 1. LTC1329 digitally controls the output voltage of a power supply

LIM

GND SW2

SW1



2V TO 3V

OUT



4V TO 6V

20mA

OUT

= 3.3V

SHDN

CLK

P1.0

P1.1

OUT

GND

LT1107

LTC1329-50

100µF

L1*

100µH1N5817

47Ω

*L1 = COILTRONICS CTX100-4

1329_1.eps

39k

10k

47µF

MPU

(e.g. 8051)

Linear Technology Magazine • August 1995

DESIGN FEATURES

sag, possibly tripping the low-battery

detector. Output voltage reaches 5V

in approximately 1ms. The addition

of R1 and C1 to Figure 2’s circuit

limits inrush current at start-up, pro-

viding for a smoother turn-on, as

indicated in Figure 6.

A 4-Cell-to-5V Converter

A 4-cell-to-5V converter is more

complex than a simple boost con-

verter because the input voltage can

be either above or below the output

voltage. The single-ended primary in-

ductance converter (SEPIC) shown in

Figure 7 accomplishes this task, with

the additional benefit of output isola-

tion. In shutdown conditions, the

converter’s output will go to zero,

unlike the simple boost converter,

where a DC path from input to output

through the inductor and diode re-

mains. In this circuit, peak current is

limited to approximately 500mA by

the addition of 22k resistor R1. This

allows very small, low-profile compo-

nents to be used. The 100µF

capacitors are D-case size, with a

height of 2.9mm, and the inductors

are 3.2mm high. The circuit can de-

liver 5V at up to 100mA. Efficiency is

relatively flat across the 1mA-to-

100mA load range.

Super Burst

Mode Operation:

5V/100mA DC/DC with 15µA

Quiescent Current

The LT1304’s low-battery detector

can be used to control the DC/DC

converter. The result is a reduction in

quiescent current by almost an order

of magnitude. Figure 9 details this

Super Burst circuit. V

OUT

is moni-

tored by the LT1304’s LBI pin via

resistor divider R1/R2. When LBI is

above 1.2V, LBO is high, forcing the

LT1304 into shutdown mode and re-

ducing current drain from the battery

to 10µA. When V

OUT

decreases enough

to overcome the low battery detector’s

hysteresis (about 35mV), LBO goes

low. Q1 turns on, pulling SHDN high

and turning on the rest of the IC. R3

limits peak current to 500mA; it can

be removed for higher output power.

Efficiency is illustrated in Figure 10.

current. When R1’s voltage drop ex-

ceeds 36mV, corresponding to 1A

switch current, A2’s output goes high,

truncating the on-time part of the

switch cycle. The 1A peak current can

be reduced by tying a resistor be-

tween the I

LIM

pin and ground, causing

a voltage drop to appear across R2.

The drop offsets some of the 36mV

reference voltage, lowering peak

current. A 22k resistor limits current

to approximately 550mA. A capacitor

connected between I

LIM

and ground

provides soft start. Shutdown is

accomplished by grounding the

SHDN pin.

The low-battery detector A3 has its

own 1.2V reference and is always on.

The open collector output device can

sink up to 500µA. Approximately

35mV of hysteresis is built into A3 to

reduce “buzzing” as the battery volt-

age reaches the trip level.

A 2-Cell-to-5V Converter

A compact 2-cell-to-5V converter

can be constructed using the circuit

of Figure 2. Using the LT1304-5 fixed-

output device eliminates the need for

external voltage-setting resistors, low-

ering component count. As the battery

voltage drops, the circuit continues

to function until the LT1304’s under-

voltage lockout disables the part at

approximately V

= 1.5V. 200mA is

available at a battery voltage of 2.0V.

As the battery voltage decreases be-

low 2V, cell impedance starts to

quickly increase. End-of-life is usu-

ally assumed to be around 1.8V, or

0.9V per cell. Efficiency is detailed in

Figure 3. Burst Mode micropower

operation keeps efficiency above 70%,

even for load current below 1mA.

Efficiency reaches 85% for a 3.3V

input. Load transient response is il-

lustrated in Figure 4. Since the

LT1304 uses a hysteretic comparator

in place of the traditional linear feed-

back loop, the circuit responds

immediately to changes in load cur-

rent. Figure 5 details start-up behavior

without soft-start circuitry (R1 and

C1 in Figure 2). Input current rises to

1A as the device is turned on, which

can cause the input supply voltage to

LT1304, continued from page 1

–

1304_1.eps

–

1.2V

36mV

OFF

LBI

ENABLE

LB0

C1 L1

GNDI

LIM

SHDN

FB A1

6 5

OUT

1.5V

UNDERVOLTAGE

LOCKOUT

Q2

Q1

200x

R2

R1

7.2Ω

DRIVER

BIAS

~1V

1.24V

REF

SHUTDOWN

TIMERS

6µs ON

1.5µs OFF

Figure 1. LT1304 Block diagram. Independent low-battery detector A3 remains alive when

device is in shutdown

Linear Technology Magazine • August 1995

Figure 2. 2-cell-to-5V/200mA boost converter takes four external parts. Components with

dashed lines are for soft-start (optional) Figure 3. 2-cell-to-5V converter efficiency

Figure 6. Start-up response with 1

F/1M

Ω

components in Figure 2 added. Input current

is more controlled. V

OUT

reaches 5V in 6ms.

Output drives 20mA load

Figure 7. 4-cell-to-5V step-up/step-down converter, also know as SEPIC (single-ended primary

inductance converter). Low profile components are used throughout

DESIGN FEATURES

GND I

SENSELBI

SHDNLB0

LT1304-5

100µF

C1

1µF

100µF

2 CELLS

22µH* MBRS130L

R1

5V

200mA

SHUTDOWN

*SUMIDA CD54-220

(708) 956-0666

1304_2.eps



LOAD CURRENT (mA)

EFFICIENCY (%)

1304_3.eps

0.1 1 10 500100

= 1.8V

= 3.3V

= 2.5V

GND

SENSELBI

SHDNLB0

LT1304-5

100µF

47µF

4 CELLS

3.5V TO 6.5V 22µH* 100µF

22µH*

MBR0530

R1

22k

5V

100mA

SHUTDOWN

*SUMIDA CD43-220

(708) 956-0666

1304_7.eps

LOAD CURRENT (mA)

EFFICIENCY (%)

100

1304_8.eps

110

= 5V

= 6V

= 3V

= 4V

Figure 8. Efficiency plot of SEPIC converter

shown in Figure 7

VOUT 100mV/DIV

AC COUPLED

ILOAD

100µs/DIV

200mA

Figure 4. Boost converter load-transient

response with V

= 2.2V

1ms/DIV

VOUT 2V/DIV

IIN

500mA/DIV

VSHDN

10V/DIV

VOUT 2V/DIV

1ms/DIV

IIN

500mA/DIV

VSHDN

10V/DIV

An output capacitor charging cycle

or “burst” is shown in Figure 11, with

the circuit driving a 50mA load. The

slow response of the low-battery de-

tector results in the high number of

individual switch cycles or “hits”

within the burst.

Figure 12 depicts output voltage at

the modest load of 100µA. The burst

The converter is approximately 70%

efficient at a 100µA load, 20 points

higher than the circuit of Figure 2.

Even at a 10µA load, efficiency is in

the 40%-50% range, equivalent to

100µW–120µW total power drain from

the battery. In contrast, Figure 2’s

circuit consumes approximately

300µW–400µW unloaded.

repetition rate is around 4Hz. With

the load removed, the repetition rate

drops to approximately 0.2Hz, or one

burst every 5 seconds. Systems that

spend a high percentage of operating

time in sleep mode can benefit from

the greatly reduced quiescent power

drain of Figure 9’s circuit.

Figure 5. Start-up response. Input current

rises quickly to 1A. V

OUT

reaches 5V in

approximately 1ms. Output drives 20mA load

Linear Technology Magazine • August 1995

DESIGN FEATURES

SHDN GND

LBI

Q1

2N3906

LB0

LT1304

100µF

2 CELLS

≈ 15µA33µH* MBR0530

47k

5V

80mA

1304_9.eps

22k

R2

1.21M

R1

3.83M

47k

0.01µF

330µF

200k

*SUMIDA CD54-330

(708) 956-0666

Figure 10. DC/DC converter efficiency of

Figure 9

LOAD CURRENT (mA)

EFFICIENCY (%)

100

1304_10.eps

0.01 0.1 1.0 10

= 3V

= 2V

VSW 1V/DIV

5ns/DIV

50ms/DIV

VOUT 100mV/DIV

AC COUPLED

50ms/DIV

VOUT 100mV/DIV

AC COUPLED

50µs/DIV

1A/DIV

VOUT 100mV/DIV

AC COUPLED

VSW

5V/DIV

Figure 11. Super Burst

Mode Operation

in action. V

= 2.5V, I

LOAD

= 50mA

Figure 12. Circuit using Super Burst

Mode Operation, 100µA load. Burst

occurs approximately once every 240ms

Figure 15. Switch fall time. Lower slope in

second and third graticules shows effect of

lead and bond wire inductance

Layout

The LT1304 switch turns on and

off very quickly. For best performance

we suggest the component placement

in Figure 13. Improper layouts will

result in poor load regulation, espe-

cially at heavy loads. Parasitic lead

inductance must be kept low for

proper operation. Switch turn-off is

detailed in Figure 14

. A close look at

the rise time (5ns) will confirm the

need for good PC board layout. The

200MHz ringing of the switch voltage

is attributable to lead inductance,

switch and diode capacitance, and

diode turn-on time. Switch turn-on is

shown in Figure 15. Transition time

is similar to that of Figure 14. Adher-

ence to the layout suggestions will

result in working DC/DC converters

with a minimum of trouble.

1. Instrumentation for oscillographs of Figures 14

and 15 include Tektronix P6032 active probe,

Type 1S1 sampling unit and type 547 mainframe.

1304_13.eps

LT1304

OUT

SHUTDOWN

OUT

GND (BATTERY AND LOAD RETURN)

Figure 13. Suggested layout for best performance. Input capacitor placement as shown is

highly recommended. Switch trace (pin 4) copper area is minimized

Figure 9. 2-cell-to-5V DC/DC converter using Super Burst Mode Operation draws only

A unloaded. Two AA Alkaline cells will last for years

Figure 14. LT1304 Switch rise time is in the

5ns range. These types of edges emphasize

the need for proper PC board layout

Linear Technology Magazine • August 1995

0.7ns < T

RISE

< 1.0ns

TIME (ns)

AMPS

ESD_2.eps

–20 20 60 100 140 180 220

IEC-801-2

HUMAN BODY MODEL

RS232 Transceiver Protected to

15kV IEC-801-2 ESD Standards

by Gary Maulding

Linear Technology’s popular

LT1137A RS232 transceiver has

been upgraded to include on-chip

ESD protection compliant with

IEC-801-2 level 4 standards. Device

pins connected to the RS232 line can

absorb up to ±15kV air-gap or ±8kV

contact-mode transients using the

IEC-801-2 ESD model, with no

damage or interruption of operation.

The 28-lead SOIC or SSOP packaged

circuit and five inexpensive ceramic

capacitors are the only components

required to implement a 5V powered

AT serial port that is fully compliant

with RS232 or V.28 electrical

specifications and IEC-801-2 static-

discharge standards.

ESD Effects on

Electronic Equipment

Electrostatic discharge (ESD) is a

well known killer of semiconductor

devices. Unless protective measures

are taken, ESD will result in various

forms of device degradation. Dis-

charge damage ranges from increased

leakage currents on device inputs

and outputs, to increased offset or

shifted threshold voltages, to failure

of the affected circuit.

To minimize the monetary loss due

to damaged IC’s and to improve the

reliability of equipment, the electron-

ics industry has adopted many

standard safeguard procedures

against ESD. These safeguards in-

clude the use of grounded work

surfaces, equipment, and personnel;

conductive plastic shipping materi-

als, on-chip protection circuits at the

input and output pins, and testing of

the ESD sensitivity of circuits.

The “Human Body Model,” defined

by Mil-Std-883B Method 3015, is a

commonly used ESD test standard

for rating integrated circuits for ESD-

damage immunity. This test method

is aimed directly at reducing the inci-

dence of failed devices installed on

equipment circuit boards. The test

discharges a charged 100pF capaci-

tor through a 1.5kΩ resistance directly

to the IC’s pins. Both positive and

negative voltages are tested. Rarely is

the device powered when testing is

conducted, and only permanent dam-

age to the circuit is considered.

The widespread adoption of envi-

ronmental static control and the

design of integrated circuits with

on-chip protection devices has dra-

matically reduced the incidence of

circuit failures due to ESD damage

during circuit manufacturing and

handling. Most semiconductor de-

vices enter a much safer environment

once installed in a PC board. Installa-

tion of the PC board into a chassis

further shields the IC from the envi-

ronment. No longer are most ICs’

input and output pins exposed to

direct ESD strikes, but ESD is still an

operational and reliability hazard for

electronic equipment. Everyone has

experienced the shock caused by

walking across a nylon carpet on a

dry winter day and touching a piece of

electrical equipment. This

static discharge can dam-

age internal circuitry of

the equipment if the

manufacturer does not

provide a safe discharge

path for the energy. In-

put/output ports on

personal computers are

especially vulnerable. The

ports are available so that users can

attach cabling to printers, mice, or

networks. Portable computers are

particularly vulnerable since the port

connections are made and broken

much more often than for desktop

machines. Most consumers would not

like to wear static control ground

straps when using their personal com-

puters. Hence, it is important that

ESD protection be built in to the end

user equipment.

What is IEC-801-2?

The International Electrotechnical

Commission (IEC) has defined a test

and rating standard for electronic

equipment exposed to ESD transients.

IEC-801-2 defines two alternate test

methodologies. The preferred method

is a contact-mode test, but the alter-

nate air-gap test is more easily

implemented and is more commonly

used. Equipment certified for IEC-

801-2 testing consists of a charging

circuit to apply the desired test volt-

age to a 150pF capacitor. A discharge

switch discharges the energy into the

equipment under test through a 330Ω

resistance (see Figure 1). IEC-801-2

certified test equipment must be able

to demonstrate that the applied test

150pF

ESD_1.eps

DEVICE

UNDER

TEST

HIGH

VOLTAGE

SUPPLY

330Ω

Figure 1. IEC-801-2 ESD test system Figure 2. ESD Transient current waveforms

DESIGN INFORMATION

Linear Technology Magazine • August 1995

voltage and current waveform meet

the prescribed rise and decay wave-

shape shown in Figure 2. Linear

Technology uses a Keytek MiniZap

for IEC-801-2 ESD testing.

The test results on equipment are

classified by the voltage level suc-

cessfully applied to the equipment

and the affect of test discharges on

the equipment. The IEC-801-2

standard defines the following per-

formance criteria:

1. Normal performance within

specification limits

2. Temporary degradation or loss of

function or performance that is

self-recoverable

3. Temporary degradation or loss of

function or performance that

requires operator intervention or

system reset

4. Degradation or loss of function

that is not recoverable, due to

damage of equipment (compo-

nents) or software, or loss of data

Table 1 details the rated test levels

for both contact and air-gap tests.

The contact-mode test is the

preferred methodology due to its

superior repeatability. The air-gap

test may be influenced by the test

environment’s relative humidity, as

well as by the approach speed of the

tester tip to the device under test.

LT1137A ESD

Test Performance

The LT1137A is an RS232 inter-

face transceiver with an integral

charge pump for single 5V operation.

The complement of three drivers and

five receivers matches the require-

ments for AT serial ports on personal

computers. The eight RS232 lines are

directly connected to the socket on

the computer’s case, and are there-

fore directly exposed to possible ESD

transients when cables are installed

or removed from the machine. The

inclusion of rugged ESD protection

on the chip eliminates the need for

the user to install costly and space-

consuming transient suppression

diodes on the RS232 lines.

The new, upgraded LT1137A has

been tested to level 4 IEC-801-2 test-

ing. In both the ±8kV contact-mode

test and the ±15kV air-gap test, the

transceiver suffered no damage and

no interruption of normal operation.

Linear Technology provides this

enhanced ESD protection on the

LT1137A at no extra cost to the user.

The improved level of protection re-

quires no increase in die area over the

older ±10kV protected devices. The

user must only follow the data sheet

and use low ESR capacitors (ceramic

chip caps are perfect) located close to

the device pins to obtain the benefits

of the on-chip protection (see Figure

3). The capacitors and the length of

PC board traces are important, since

the on-chip protection devices shunt

the ESD transient energy through

the capacitors and away from active

circuitry. The user should take care

to provide a short ground return path

for the energy in order not to cause

secondary damage to other PC board

components caused by the high-

speed, high-current transients that

will flow during an ESD discharge.

Is ESD Protection Effective?

In 1992 Linear Technology intro-

duced the first integrated circuits

capable of withstanding ±10kV ESD

transients as tested per Mil-Std.-883B

Method 3015 (Human Body Model).

Since their introduction, millions of

units have been installed in equip-

ment, but not one single unit has

been returned as a field failure due to

ESD damage. Prior to the on-chip

10kV ESD protection, interface cir-

cuits would routinely be found to

have suffered ESD damage when they

were used in systems that did not use

a TransZorb



for ESD protection. The

on-chip ESD protection has proven to

be a great enhancement to equip-

ment reliability and a cost saving to

computer manufacturers, who no

longer need to add protective devices

to their I/O ports. The enhanced pro-

tection achieved by meeting the

IEC-801-2 test standards will pro-

long this perfect record.

Figure 3. LT1137A ESD test circuit

DESIGN INFORMATION

Table 1. IEC-801-2 severity levels

Test Voltage Test Voltage

Level Contact Discharge (kV) Air Discharge (kV)

122

244

368

4815

TransZorb is a registered trademark of General Instruments, GSI.

ESD-3.eps

5V V



0.1µF

0.2µF

0.1µF

RS232

LINE PINS

PROTECTED

TO ±15kV

LT1137A

1

2

3

4

5

6

7

8

9

10

11

12

13

DRIVER 1 OUT

RX1 IN

DRIVER 2 OUT

RX2 IN

RX3 IN

RX4 IN

DRIVER 3 OUT

RX5 IN

ON/OFF

28

27

26

25

24

23

22

21

20

19

18

17

16

0.2µF

DRIVER 1 IN

RX1 OUT

DRIVER 2 IN

RX2 OUT

RX3 OUT

RX4 OUT

DRIVER 3 IN

RX5 OUT

–

0.1µF

GND

DRIVER DISABLE

Authors can be contacted

at (408) 432-1900

Linear Technology Magazine • August 1995

V.35 Transceivers Allow

3-chip V.35 Port Solution by Y.K. Sim

receiver with 100Ω as load termina-

tion. The ground potential between

the source and load is allowed to vary

up to ±4V, and the common-mode

resistance at both source and load is

150Ω. The specification calls for dif-

ferential transmitter signals of 0.55V

±20% and no more than ±0.6V

comon mode, exclusive of ground-

potential differences. Early V.35

implementations used constant-volt-

age-output drivers for the differential

signals, and resistors in series with

the outputs to provide the required

±0.55V output swing. This technique

suffered from a strong dependence

on power supply voltage and driver

output impedance to control the out-

put voltage. Further, common-mode

voltages present at the driver output

had a strong effect on output swing,

significantly limiting the driver-out-

put common mode range.

The LTC1345/LTC1346 transceiv-

ers avoid these problems by using a

constant-current, high impedance

output driver. Designed to be used

with matching external resistor net-

works to meet the Appendix II

specifications, the transmitter output

structure consists of two complemen-

tary switched current sources that

maintain a 0.55V signal magnitude

over ±4V common mode range. These

current sources are trimmed to source

and sink 11mA at the complemen-

tary outputs. The differential output

voltage of the transmitter is set by the

external source and load termination

resistor networks. The typical differ-

ential source/load resistance of 100Ω

gives an output voltage of 0.55V (11mA

× 100Ω/2). The common mode volt-

age at the transmitter is typically

less than 0.2V with zero ground po-

tential difference. The LTC1345 and

LTC1346 require 5% tolerance in the

termination resistors to meet the

20% differential voltage variation

specification. A termination resistor

network such as BI Technologies part

number 627T500/1250 (SOIC) or

899TR50/125 (DIP) meets this speci-

fication and is recommended for

proper cable termination. Discrete

5% resistors can also be used to ter-

minate the drivers and receivers;

either a Y (wye, Figure 1A) or ∆ (delta,

Figure 1B) connection can be used to

give the required 100Ω differential

and 150Ω common mode impedances.

The LTC1345/LTC1346 differen-

tial input receivers have 30kΩ input

impedance and a typical hysteresis of

40mV. This allows the receivers to

meet the V.35 specification with the

specified termination resistor net-

work. Additionally, they can be used

to detect RS422 signals if the 125Ω

V.35 common mode resistor is re-

moved. Both the LTC1345 and

LTC1346 transceivers feature four

digitally-selectable operating modes:

DTE, with two drivers and three re-

ceivers active; DCE, with three drivers

and two receivers active; all three

drivers and receivers active, and shut-

down. In shutdown, supply current

drops to 1µA typically. The differen-

tial transceivers are capable of

operating at data rates above

10MBaud in non-return-to-zero

(NRZ) format.

The RS232 handshaking lines can

be implemented with standard RS232

transceivers. The LT1134A provides

four RS232 drivers and four receiv-

ers, enough to implement the extended

8-line handshaking protocol speci-

fied in V.35. The LT1134A also

includes an onboard charge pump to

generate the higher voltages

required by RS232 from a single 5V

supply, making it an ideal companion

to the LTC1345. These two chips, to-

gether with the BI Technologies

termination resistor network chip,

provide a complete, surface mount-

able, 5V-only V.35 data port. Systems

that have multiple power supply

Two new LTC interface devices, the

LTC1345 and the LTC1346, provide

the differential drivers and receivers

needed to implement a V.35 inter-

face. When used in conjunction with

an RS232 transceiver like the

LT1134A, they allow a complete V.35

interface to be implemented with just

two transceiver chips and one resis-

tor-termination chip. The signals in

a typical V.35 interface are divided

into two groups, with five high-speed

differential signals for clock and data

transfer and five or eight slower,

single-ended V.28 (RS232) signals for

handshaking. The LTC1345 and

LTC1346 provide the three differen-

tial drivers and receivers necessary to

implement the high-speed path, and

the LT1134A provides the four RS232

drivers and receivers required for the

handshaking interface. Both the

LTC1345 and the LT1134A provide

onboard charge pump power sup-

plies, allowing a complete V.35

interface to be powered from a single

5V supply. For systems where ±5V

supplies are present, the LTC1346 is

offered without charge pumps, repre-

senting a 30% power savings.

Appendix II of the CCITT V.35

specification describes the differen-

tial signal requirements for the

high-speed interface lines. The speci-

fication stipulates a differential

transmitter of 100Ω source termina-

tion impedance driving a 100Ω

twisted-pair cable and a differential

Figure 1. Y and ∆ termination topologies

DESIGN INFORMATION

50Ω

125Ω

B1345_2.eps

300Ω

120Ω

Linear Technology Magazine • August 1995

DESIGN INFORMATION

voltages available and use only the

simpler 5-signal V.35 handshaking

protocol can use the LTC1346 with

the LT1135A or LT1039 RS232 trans-

ceivers; this combination provides a

complete port while saving board

space and complexity. Figure 2 shows

a typical LTC1345/LTC1134A V.35

Figure 2. Typical V.35 implementation using LTC1345 and LTC1346

implementation with five differential

signals and five basic handshaking

signals, with an option for three addi-

tional handshaking signals.

1µF

CC1



5V 21

1µF

273

12P

1µF

LTC1345 LTC1346

BI

627T500/

1250

(SOIC)

BI

627T500/

1250

(SOIC)

CC2



0.1µF

EE2

TXD (103)

SCTE (113)

TXC (114)

RXC (115)

RXD (104)

GND (102)

CABLE SHIELD

DX RX

T T

10 14 8

T T

H H

T T

CC1

8127

CC2

DTR (108)

0.2µF

3 22

0.2µF 0.2µF 0.2µF

0.1µF

241

0.1µFLT1134A LT1134A

4322

0.1µF

241

0.1µF

13 13

1345_1.eps

50Ω

=125Ω

50Ω

OPTIONAL SIGNALS

15 DX

20 RX

18 RX

16 RX

C C

RTS (105)

E E

DSR (107)

D D

CTS (106)

F F

DCD (109)

NN NN

TM (142)

N N

RDL (140)

L L

LLB (141)

ISO 2593

34-PIN DTE/DCE

INTERFACE CONNECTOR

ISO 2593

34-PIN DTE/DCE

INTERFACE CONNECTOR

Linear Technology Magazine • August 1995

dI1377_1.eps

LT1377

CTX20-2P*

1.24k

5V

*CTX20-2P, COILTRONICS 20µH

**OSCON, SANYO VIDEO COMPONENTS

47nF

MBRS130

150µF

6.3V

OSCON**

100nF

D1

1N5818

4.7nF

C1

2.2µF

SHDN

NFB

N.C.

8V TO 30V

INPUT

3.57k 10Ω

1N4148

617

PGV

V+

PFB

100µF

1MHz Step-Down Converter Ends

455kHz IF Woes

There can be no doubt that switch-

ing power supplies and radio IFs don’t

mix. One-chip converters typically

operate in the range of 20kHz–100kHz,

placing troublesome harmonics right

in the middle of the 455kHz band.

This contributes to adverse effects

such as “de-sensing” and outright

blocking of the intended signals.

A new class of switching converter

makes it possible to mix high-

efficiency power supply techniques

and 455kHz radio IFs without fear of

interference.

The circuit shown in Figure 1 uses

an LT1377 boost converter, operating

at 1MHz, to implement a high-

efficiency buck-topology switching

regulator. The switch is internally

grounded, calling for the floating

supply arrangement shown (D1 and

C1). The circuit converts inputs of

8V–30V to a 5V/1A output.

The chip’s internal oscillator oper-

ates at 1MHz for load currents of

greater than 50mA, with a guaranteed

tolerance of 12% over temperature.

Even wideband 455kHz IFs are

unaffected, as the converter’s operat-

ing frequency is well over one octave

distant.

Figure 2 shows the efficiency of

Figure 1’s circuit. You can expect

80%–90% efficiency over an 8V–16V

input range with loads of 200mA or

more. This makes the circuit suitable

for 12V battery inputs (that’s how I’m

using it), but no special consider-

ations are necessary with adapter

inputs of up to 30V.

Figure 1. Schematic diagram: 1MHz LT1377-based boost converter

DESIGN IDEAS

by Mitchell Lee

IOUT (mA)

100

EFFICIENCY (%)

1000

dI1377_2.eps

200 400 800600

VIN = 8V

VO = 5V

12V

16V

Figure 2. Efficiency graph of the circuit

shown in Figure 1

DESIGN IDEAS

1MHz Step-Down Converter Ends

455kHz IF Woes ...................... 24

Mitchell Lee

A Circuit That Smoothly Switches

Between 3.3V and 5V .............. 25

Doug La Porte

12-Bit Voltage-Mode DACs Pack

Versatility into 8-Pin SOs ....... 26

Kevin R. Hoskins

Wideband RMS Noise Meter ..... 28

Mitchell Lee

LTC1477: 70mW Protected

High-Side Switch Eliminates

“Hot Swap” Glitching ............. 32

Tim Skovmand

Driving a High-Level Diode-Ring

Mixer with an Operational

Amplifier ................................33

Mitchell Lee

Fully Differential, 8-Channel,

12-Bit A/D System Using the

LTC1390 and LTC1410 .......... 36

Kevin R. Hoskins

Linear Technology Magazine • August 1995

A Circuit That Smoothly Switches

Between 3.3V and 5V

Many subsystems require supply

switching between 3.3V and 5V to

support both low-power and high-

speed modes. This back-and-forth

voltage switching can cause havoc to

the main 3.3V and 5V supply buses.

If done improperly, switching the sub-

system from 5V to 3.3V can cause a

momentary jump on the 3.3V bus,

damaging other 3.3V devices. When

switching the subsystem from 3.3V

to 5V, the 5V supply bus can be

pulled down while charging the

subsystem’s capacitors, and may in-

advertently cause a reset.

The circuit shown in Figure 1 al-

lows smooth voltage switching

between 3.3V and 5V, with added

protection features to ensure safe

operation. IC1 is an LTC1470 switch-

matrix device. This part has on-chip

charge pumps running from the 5V

supply to fully enhance the internal

N-channel MOSFETs. The LTC1472

also has guaranteed break-before-

make switching to prevent cross-

conduction between buses. It also

features current limiting and

thermal shutdown.

When switching the subsystem

from 5V to 3.3V, the holding capaci-

tor and the load capacitance are

initially charged up to 5V. Connect-

ing these capacitors directly to the

main 3.3V bus causes a momentary

step to 5V. This transient is so fast

that the power supply cannot react in

time. Switching power supplies have

a particularly difficult time coping

with this jump. Switching supplies

source current to raise the supply

voltage and require the load to sink

current to lower the voltage. A switch-

ing supply will be unable to react to

counter the large positive voltage step.

This jump will cause damage to many

low-voltage devices.

The circuit in Figure 1 employs a

comparator (IC2) and utilizes the high

impedance state of the LTC1470 to

allow switching with minimal effect

on the supply. When the 3.3V output

is selected, IC1’s output will go into a

high impedance state until its output

falls below the 3.3V bus. The output

capacitors will slowly discharge to

3.3V, with the rate of discharge de-

pending on the current being pulled

by the subsystem and the size of the

Figure 1. Schematic diagram of 3.3V and 5V switchover circuit

holding capacitor. The example shown

in Figure 1 is for a 250mA subsystem.

The discharge time constant should

be about 4ms. Once the subsystem

supply has dropped below the 3.3V

supply, the comparator will trip, turn-

ing on the 3.3V switch. The

comparator has some hysteresis to

avoid instabilities. The subsystem

supply will reach a low point of about

3V before the 3.3V switch is fully

enhanced.

When switching from 3.3V to 5V,

IC1’s current limiting prevents the

main 5V bus from being dragged down

while charging the holding capacitor

and the subsystem’s capacitance.

Without current limiting, the inrush

current to charge these capacitors

could cause a droop in the main 5V

supply.

If done improperly, supply voltage

switching leads to disastrous system

consequences. The voltage switch

should monitor the output voltage

and have current limiting to prevent

main supply transient problems. A

correctly designed supply voltage

switch avoids the pitfalls and results

in a safe, reliable system.

by Doug La Porte

DESIGN IDEAS

dI1470_1.eps

IC1

LTC1470

5V 0.1µF

220µF

TANTALUM

HOLDING

CAPACITOR

TO

SUBSCRIBER

EN0

EN1

OUT

3.3V

0 = 5V

1 = 3.3V 51k

–

3.3V 1µF

1µF

IC2

LT1011

100µs/DIV

3.3V

5V/DIV

500mV/DIV

➛

2ms/DIV

Figure 2. Oscillograph of the switchover

waveform showing smooth transitions

Linear Technology Magazine • August 1995

12-Bit Voltage-Mode DACs Pack

Versatility into 8-Pin SOs

Introduction

Let’s face it, microprocessors and

microcontrollers cannot control me-

chanical potentiometers. They have

no fingers, just pins. And they have

neither eyes with which to set a wiper’s

position nor the intuition to know

when it’s set correctly. They need the

organs that provide these functions

transplanted into their “operational

environment.” The “organs” that fill

these roles are analog-to-digital con-

verters (ADCs) and the sensors

connected to their inputs, and digi-

tal-to-analog converters (DACs) and

the manipulative circuits or mechan-

ics they drive.

This article concentrates on the

“fingers” and “hands” capabilities that

DACs bestow upon microprocessors

and microcontrollers. Linear Tech-

nology has recently introduced 12-bit,

serially interfaced, voltage-output

DACs packaged in small 8-pin SOs.

These parts include the LTC1257,

LTC1451, LTC1452, and LTC1453.

All of these DACs are micropower,

have 12-bit monotonic transfer func-

tions, and operate on 4.75V to 15.75V

(LTC1257), 5V (LTC1451), or 3V to 5V

(LTC1452 and LTC1453) supply volt-

ages. Table 1 captures the important

specifications of the LTC1257,

LTC1451, LTC1452, and LTC1453.

Figures 1 and 2 show the block

diagrams of the LTC1257 and the

LTC1451, LTC1452, and LTC1453.

These devices share many common

circuit elements. With a logic low

applied to the CS input, serial data is

applied to a 12-bit serial shift regis-

ter. Each bit is latched on the rising

edge of the CLK input signal. The

shift register’s contents are trans-

ferred to the DAC register on the

rising edge of CS, which in turn up-

dates the output voltage’s magnitude.

Each of these DACs also has a data

output, D

OUT

, making it easy to

daisy-chain multiple DACs on a single

serial data line. The LTC1257 and

LTC1451 have an on-chip 2.048V

bandgap reference. The LTC1453 has

a 1.22V bandgap reference. The

LTC1257 has an internal 5V regula-

tor that powers all onboard digital

circuitry.

System Autoranging

System auto-ranging, adjusting an

ADC’s full-scale range, is an applica-

tion area for which these DACs are

appropriate. Auto-ranging is espe-

cially useful when using an ADC with

multiplexed inputs. Without auto-

ranging, only two reference values

are used: one to set the full-scale

magnitude and another to set the

zero-scale magnitude. Since it is com-

mon to have input signals with

different zero-scale and full-scale

magnitude requirements, fixed refer-

ence voltages present a problem.

Although the ranges selected for some

of the inputs may take advantage of

the full range of ADC output codes,

inputs that do not span the same

range will not generate all codes, re-

ducing the ADC’s effective resolution.

One possible solution is to match the

reference voltage span to the need of

each multiplexer input.

The circuit shown in Figure 3 uses

two LTC1257s to set the full-scale

and zero operating points of the

LTC1296 12-bit, 8-channel ADC. The

ADC shares its serial interface with

the DACs. To further simplify bus

connections, the DACs’ data is daisy-

chained. Two chip selects are used,

one to select the LTC1296 when pro-

gramming its multiplexer, and the

other to select the DACs when setting

their output voltages.

Figure 1. LTC1257 block diagram

Supply Differential Integral Linearity

Part Number Voltage Range Supply Current (Typ) Nonlinearity (Max) Error (Max)

LTC1257 4.75V to 15.75V 350µA at 5V Supply ±0.5 LSB ±3.5 LSB

LTC1451 4.5V to 5.5V 400µA at 4.5V ≤ VCC ≤ 5.5V ±0.5 LSB ±3.5 LSB

LTC1452 2.7V to 5.5V 225µA at 2.7V ≤ VCC ≤ 5.5V ±0.5 LSB ±3.5 LSB

LTC1453 2.7V to 5.5V 250µA at 2.7V ≤ VCC ≤ 5.5V ±0.5 LSB ±3.5 LSB

Table 1. Key specifications of the LTC1257, LTC1451, LTC1452, and LTC1453 8-pin, SO packaged, voltage-out DACs

DESIGN IDEAS

–

DAC

5V REGULATOR

12-BIT

SHIFT REGISTER

12-BIT LATCH

2.048V REFERENCE

OUT

GND

OUT

LOGIC

SUPPLY

CLK

LOAD

REF 12

dIDAC_1.eps

by Kevin R. Hoskins

Linear Technology Magazine • August 1995

The circuit in Figure 4 is a com-

puter controlled 4mA-to-20mA

current loop. It is designed to operate

on a single supply over a range of 3.3V

to 30V. The circuit’s zero output ref-

erence signal, 4mA, is set by R1 and

calibrated using R2, and its full-scale

output current is set by R3 and cali-

brated using R4.

The zero- and

full-scale output currents are set as

follows:

with a zero input code applied

to the LTC1453, the output current,

OUT

, is set to 4 mA by adjusting R2;

next, with a full-scale code applied to

the DAC, the full-scale output cur-

rent is set to 20mA by adjusting R4.

The circuit is self regulating, forc-

ing the output current to remain

stable for a fixed DAC output voltage.

This self regulation works as follows:

starting at t = 0, the LTC1453’s fixed

output (in this example, 2.5V) is

applied to the left side of R3; instan-

taneously, the voltage applied to the

LT1077’s input is 1.25V; this turns

on Q1 and the voltage across R

starts

increasing beginning from 1.25V; as

the voltage across R

increases, it

lifts the LTC1453’s GND pin above

0V; the voltage across R

continues to

increase until it equals the DAC’s

output voltage.

Once the circuit reaches this stable

condition, the constant DAC output

voltage sets a constant current

through R3 + R4 and R5. This con-

stant current fixes a constant voltage

across R5 that is also applied to the

LT1077’s noninverting input. Feed-

back from the top of R

is applied to

the inverting input. As the op amp

forces its inputs to the same voltage,

it will fix the voltage at the top of R

This in turn fixes the output current

to a constant value.

Opto-Isolated Serial Interface

The serial interface of the LTC1451

family and the LTC1257 make

opto-isolated interfaces very easy and

cost effective. Only three opto-isola-

tors are needed for serial data

communications. Since the inputs of

the LTC1451, LTC1452, and LTC1453

have generous hysteresis, the switch-

ing speed of the opto-isolators is not

Figure 2. Block diagram of the LTC1451, LTC1452, and LTC1453

During the conversion process, U2

and U3 receive the full- and zero-

scale codes, respectively, that

correspond to a selected multiplexer

channel. For example, let channel 2’s

span begin at 2V and end at 4.5V.

When a host processor wants a con-

version of channel 2’s input signal, it

first sends code that sets the output

of U2 to 2V and U3 to 4.5V, fixing the

span to 2.5V. The processor sends

data to the LTC1296, selecting chan-

nel 2. The processor next reads data

that was generated during the con-

version of the 3.5V

P–P

signal applied

to channel 2 from the LTC1296. As

other multiplexer channels are se-

lected, the DAC outputs are changed

to match their spans.

Computer Controlled

4mA-to-20mA Current Loop

A common and useful circuit is the

4mA-to-20mA current loop. It is used

to transmit information over long dis-

tances using varying current levels.

The advantage of using current over

voltage is the absence of IR losses and

the transmissions errors and signal

losses they can create.

continued on page 31

DESIGN IDEAS

DAC

–

REFERENCE

LTC1451: 2.048V

LTC1453: 1.22V

12-BIT

SHIFT

POWER-ON

RESET

dIDAC_2.eps

CLK 1

OUT

REF

GND

CS/LD

12-BIT DAC

0.1µFV

REF

OUT



CLK

LOAD

OUT



U2

LTC1257

REF

GND

OUT



CLK

LOAD

OUT



U3

LTC1257

dIDAC_3.eps

0.1µF

100Ω

µP

8 ANALOG

INPUT CHANNELS U1

LTC1296

CS

OUT



CLK

CH0

•

CH7

COM

REF

–

SSO

22µF

50k 50k

74HC04

GND

Figure 3. Using two LTC1257 12-bit voltage-output DACs to set the input span of the 12-bit,

8-channel LTC1296

Linear Technology Magazine • August 1995

Wideband RMS Noise Meter

by Mitchell Lee

Recently, I needed to measure and

optimize the wideband RMS noise of

a power supply over about a 40MHz

bandwidth. A quick calculation

showed that the 12nV–15nV/√Hz

noise floor of my spectrum analyzer

would come up short—my circuit was

predicted to exhibit a spot noise of

perhaps 8nV–10nV/√Hz. In fact,

I didn’t have a single instrument in

my lab that would measure 50µV–

60µV RMS.

For the 40MHz bandwidth, the

HP3403C RMS voltmeter is a good

choice, but its most sensitive range is

100mV, about 66dB shy of my re-

quirement. This obsolete instrument

today carries a hefty price on the used

market. The fact that here in the

Silicon Valley HP3403Cs are a com-

mon sight at flea markets is of little

consolation to most customers wish-

ing to reproduce my measurements.

We have several of these meters in the

LTC design lab, but they are in con-

stant use and closely guarded by “The

Keepers of the Secret RMS Knowl-

edge.” I resolved to build my own

meter using an LT1088 thermal RMS

converter.

Full scale on the LT1088 is 4.25V

RMS. To measure 50µV full-scale, I’d

need an amplifier with a gain of

100,000. At 40MHz bandwidth, this

didn’t sound like it would have a good

chance of working first-time—built

by hand and without benefit of a

custom casting.

Rather than build a circuit with

40MHz bandwidth and a gain of

100dB, I decided to use just enough

gain to put my desired noise perfor-

mance around twice minimum scale.

Aside from gain, this amplifier would

also need less than 5nV/√Hz input

noise, and the output stage would

have to drive the 50 ohm load pre-

sented by the LT1088.

It wasn’t hard to find an appropri-

ate output stage. The LT1206 (see

Figure 1) can easily drive the required

120mA peak current into the LT1088

converter, and there’s plenty left over

for handling noise spikes. To pre-

serve 40MHz bandwidth, the LT1206

was set to run at a gain of 2.

Figure 1. Noise meter gain stage

DESIGN IDEAS

–

LT1192

–5V

10nF

100nF

1200Ω

300Ω

dI1226_1.eps

LT1226

–5V

10nF

100nF

+5V

1200Ω

1000Ω100Ω100Ω1000Ω

SIGNAL

INPUT

TO

LT1206

100nF

2LT1226

–5V

10nF

100nF

–5V

100nF

1200Ω

100Ω100Ω1000Ω



The front end was harder to solve.

I needed a low noise, high speed

amplifier that could give me plenty of

gain. Here I selected the LT1226. This

is a 1GHz GBW op amp with only

2.6nV/√Hz input noise. It has a mini-

mum stable gain of 25, but in this

circuit, high gain is an advantage.

Cascading two LT1226s on the

front end gives a gain of 625, a little

shy of the 5,000 to 10,000 required.

Another gain of 5, plus the gain of 2 in

the LT1206 adds up to a gain of

6,250—just about right.

There are several ways to get 40MHz

bandwidth at a gain of 5, including

the LT1223 and LT1227 current-feed-

back amplifiers, but I settled on the

LT1192 voltage amplifier because it

is the lowest cost solution. This brings

the gain up to 6250, for a minimum

scale sensitivity of 34µV RMS, and a

full-scale sensitivity of 680µV RMS.

My advice-filled coworkers assured

me that there was no way I could

build a wideband amplifier with a

gain of 6250, and make it stable.

Nevertheless, I built my amplifier on a

Authors can be contacted

at (408) 432-1900

Linear Technology Magazine • August 1995

Figure 3. LT1088 RMS detector section

Figure 2. LT1206 buffer/driver section

1.5" × 6" copperclad board, taking

care to maintain a linear layout. The

finished circuit was stable, provided

that a coaxial connection was made

to the input. The amplifier was flat,

with 3dB points at 4kHz and 43MHz,

and some peaking at high frequencies.

The performance of the amplifier

and thermal converter can be opti-

mized by adjusting the value of the

feedback and gain setting resistors

around the LT1206. Slightly more

bandwidth can be achieved at the

expense of higher peaking by reduc-

ing the resistor values 10%. Reducing

the resistor values will decrease

peaking effects at the expense of

bandwidth. A good compromise value

is 680Ω.

I’ve shown the LT1226 amplifiers

operating from ±5 supplies, which

puts their bandwidth on the edge at

DESIGN IDEAS

–

U2

1/4

LT1014

10nF

15V

10k

OUTPUT

22nF 12k

33k

500Ω

1k

9.09M

27.4k

1% 27.4k

100nF

–5V

–

U1

1/4

LT1014

–

U4

1/4

LT1014

–

U3

1/4

LT1014

13178

51229

30k

15V

–15V

LT1088

SUB

2N3904

2N2219

FROM

LT1206

SHUTDOWN CONTROL

SUB

10nF

3.3nF

dI1226_3.eps

–

dI1226_2.eps

LT1206

–15V

100nF

10nF

100nF

15V

2FROM

LT1192 4

24kΩ

620Ω

1000ΩTO LT1088

SHUTDOWN CONTROL

620Ω

100nF

10nF

Linear Technology Magazine • August 1995

Coaxial Measurements

When measuring low-level sig-

nals, it is difficult to get a clean,

accurate result. Scope probes have

two problems. 10× probes attenuate

the already small signal, and both

1× and 10× probes suffer from cir-

cuitous grounds. Coaxial adapters

are a partial solution, but these are

expensive. They make for a lot of

wear and tear on the probes, and,

without a little forethought, they

can be a bear to attach to the circuit

under test. My favorite way to get

clean measurements of small sig-

nals is to directly attach a short

length of coaxial cable as shown in

Figure 4.

I use the good part of a damaged

BNC cable, cutting away the shorter

portion to leave at least 18" of RG-

58/U and one good connector. At

the cut, or as I call it, “real world”

end of the cable, I unbraid, twist,

and tin a very small amount of outer

conductor to form a stub 1/4" to

3/8" long. Next, I cut away the di-

electric, exposing a similar length of

center conductor, which I also tin.

Now the probe is ready for use. It can

be soldered directly to a circuit or

breadboard, eliminating any lead

length that might otherwise pick up

stray noise, or worse, act as an an-

tenna in a sensitive, high gain circuit.

Small signals aren’t the only ben-

eficiaries of this technique. This works

great for looking at ripple on the out-

puts of switching supplies. Ripple

measurements are simplified because

the large voltage swings associated

with the switch node are completely

isolated and no loop is formed where

di/dt could inject magnetically

coupled noise.

In some instances, I’ve found it

important to retain the 50Ω termina-

tion impedance on the cable, but it is

rarely possible to place a terminator

at the “BNC” end of the cable, since

this creates a DC path directly across

the circuit under test. There is, how-

ever, another way as shown in Figure

5. Here, a technique known as back-

termination is used. No termination

is used at the far end of the cable, but

a 51Ω resistor is connected in series

with the measurement end. Signals

sent down the cable reach the BNC

connector without attenuation, and

fast edges that bounce off the

unterminated end are absorbed back

into the 51Ω source resistor. I’ve found

this especially useful for measuring

fast switch signals, or, when measur-

ing the RMS value of small signals,

for ensuring that the amplifier input

sees a properly terminated source.

The resistor trick does not work if the

node under test is high impedance;

an FET probe is a better choice for

high-impedance measurements.

While I’m at it, I might as well

give away my only other secret. We’ve

all encountered ground loop prob-

lems, giving rise to 60Hz (50Hz for

my friends overseas) injection into

sensitive circuits. Every lab is re-

plete with isolation transformers and

“controlled substance” line cords

with missing ground prongs for bat-

tling ground loops. There are similar

problems at high frequencies, but

the victim is wave fidelity, not AC

pick up. To determine whether or

not high frequency grounding,

ground loops, or common-mode re-

jection is a problem for your

oscilloscope, simply clamp a small

ferrite E core around the probe lead

while observing any effects on the

waveform (see Figure 6). Sometimes

the news is bad; the waveform really

is messed up and there is some work

to be done on the circuit. But occa-

sionally the circuit is exonerated,

the unexplainable aberrations dis-

appear, proving that high frequency

gremlins are at work. If necessary,

several passes of the probe cable

can be made through the E-Core,

and it can be taped together for as

long as needed.

Figure 4. BNC cable used as a “probe” Figure 5. BNC cable probe back terminated

40MHz. Their bandwidth can be im-

proved by operating at ±15V.

Because the LT1206 operates on

15V rails, it is possible to overdrive

the LT1088 and possibly cause per-

manent damage. One section of the

LT1014 (U3) is used to sense an over-

drive condition on the LT1088 and

shut down the LT1206. Sensing the

feedback heater instead of the input

heater allows the LT1088 to accom-

modate high-crest-factor waveforms,

DESIGN IDEAS

shutting down only when the average

input exceeds maximum ratings.

By the way, my power supply noise

measured 200µV; filtering brought it

down to less than 60µV.

dicoax_1.eps

dicoax_2.eps

51Ω

Linear Technology Magazine • August 1995

12-Bit DACs, continued from page 27

critical. Further, because each of these

DACs can be daisy-chained to others,

only three opto-isolators are required.

Control Right

Where It’s Needed

Two major benefits of these DACs

are their small SO-8 size and serial

interface. These features make it very

easy to place an LTC1257 or an

LTC1451, LTC1452, or LTC1453 on a

PCB exactly where needed, next to its

associated circuitry. Unlike the com-

promises that exist with placing a

multi-DAC package and the difficulty

in optimizing analog-signal-trace

length and routing, the placement

flexibility of the LTC1257 and

LTC1451, LTC1452, or LTC1453 re-

duces analog-signal-path lengths to

a minimum.

Conclusion

The LTC1257 and the LTC1451,

LTC1452, and LTC1453 serially pro-

grammed 12-bit DACs are ideal

solutions for applications that

require 12-bit functionality in small

SO-8 packages and the ease and

economy of a serial interface.

DESIGN IDEAS

Figure 4. The LTC1453 forms the heart of this isolated 4mA-to-20mA current loop

dicoax_3.eps

Figure 6. An E-Core serves to choke off high frequency common mode currents from a ’scope probe

dIDAC_4.eps

R5

10k

R3

45k R4

R1

90k R2

Q1

2N3440



10Ω

LOOP



3.3V TO 30V

OUT

OUTIN

CLK



CS/LD

CLK



CS/LD

CLK



CS/LD

OUT

1µF

LTC1453

4N28

OPTO-ISOLATORS

3.3V

500Ω

LT1121-3.3

FROM

OPTO-

ISOLATED

INPUTS

REF

–

LT1077

Linear Technology Magazine • August 1995

LTC1477: 70mΩ Protected

High-Side Switch Eliminates

“Hot Swap” Glitching

When a printed circuit board is

“hot swapped” into a live 5V socket, a

number of bad things can happen.

First the instantaneous connec-

tion of a large, discharged,

supply-bypass capacitor may cause

a glitch to appear on the power bus.

The current flowing into the capaci-

tor is limited only by the socket

resistance, the card-trace resistance,

and the equivalent series resistance

(ESR) of the supply bypass capacitor.

This supply glitch can create real

havoc if the other boards in the sys-

tem have power-on RESET circuitry

with thresholds set at 4.65V.

Second, the card itself may be dam-

aged due to the large inrush of current

into the card. This current is some-

times inadvertently diverted to

sensitive (and expensive) integrated

circuits that cannot tolerate either

over-voltage or over-current condi-

tions even for short periods of time.

Third, if the card is removed and

then reinserted in a few milliseconds,

the glitching of the supply may “con-

fuse” the microprocessor or peripheral

ICs on the card, generating errone-

ous data in memory or forcing the

card into an inappropriate state.

Fourth, a card may be shorted,

and insertion may either grossly glitch

the 5V supply or cause severe physi-

cal damage to the card.

Figure 1 is a schematic diagram

showing how an LTC1477 protected

high-side switch and an LTC699

power-on RESET circuit reduce the

chance of glitching or damaging the

socket or card during “hot swapping.”

The LTC1477 protected high-side

switch provides extremely low R

DS(ON)

switching (typically 0.07Ω) with

built-in 2A current limiting and

thermal shutdown, all in an 8-pin

SO package.

As the card is inserted, the LTC699

power-on RESET circuit holds the

enable pin of the LTC1477 low for

approximately 200ms. When the en-

able pin is asserted high, the output

is ramped on in approximately 1ms.

Even if a very large supply bypass

capacitor (for example, over 100µF) is

used, the LTC1477 will limit the in-

rush current to 2A and ramp the

capacitor at an even slower rate. Fur-

ther, the board is protected against

short-circuit conditions by limiting

the switch current to 2A.

The 5V card supply can be dis-

abled via Q1. The only current flowing

is the standby quiescent current

of the LTC1477, which drops below

1µA, the 600µA quiescent current of

the LTC699, and the 10µA consumed

by R1.

Figure 1. “Hot swap” circuit featuring LTC1477 and LTC699

by Tim Skovmand

DESIGN IDEAS

dI1477_1.eps

LTC699CS8

3458

Q1

2N7002

DISABLE

LTC1477CS8

R1

510k

C1

1µF

LOAD



100µF

OUT

,

= 2A

IN1

IN2

OUT

IN2

IN3

GND

OUT

Authors can be contacted

at (408) 432-1900

Linear Technology Magazine • August 1995

Driving a High-Level Diode-Ring

Mixer with an Operational Amplifier

by Mitchell Lee

One of the most popular RF build-

ing blocks is the diode-ring mixer.

Consisting of a diode ring and two

coupling transformers, this simple

device is a favorite with RF designers

anywhere a quick multiplication is

required, as in frequency conversion,

frequency synthesis, or phase detec-

tion. In many applications these

mixers are driven from an oscillator.

Rarely does anyone try building an

oscillator capable of delivering +7dBm

for a “minimum geometry” mixer, let

alone one of higher level. One or more

stages of amplification are added to

achieve the drive level required by the

mixer. The new LT1206 high-speed

amplifier makes it possible to amplify

an oscillator to +27dBm in one stage.

Figure 1 shows the complete cir-

cuit diagram for a crystal oscillator,

LT1206 op amp/buffer, and diode-

ring mixer. Most of the components

Figure 1. Oscillator buffer drives +17 to +27dBm double balanced mixers

DESIGN IDEAS

–

dI1206_1.eps

LT1206

10nF

10nF 100nF

–15V

BUFFER/AMPLIFIEROSCILLATOR (TYPICAL) DIODE RING MIXER

–15V

10nF 100nF

15V15V

620Ω

51Ω, 2W

OPTIONAL DOUBLE-

TERMINATION RESISTOR LO IF

24k SHUTDOWN

OPERATE

10nF

100nF62pF

10MHz 110nF

1kΩ

120k

PN4416

10k

Figure 2. Spectrum plot of Figure 1’s circuit driving +30dBm into a 50Ω load (single

termination)

dI1206_2.eps

–

LT1206

620Ω

50Ω

30dBm

Linear Technology Magazine • August 1995

dI1206_3.eps

–

LT1206

620Ω

50Ω

27dBm

are used in the oscillator itself, which

is of the Colpitts class. Borrowing

from a technique I first discovered in

Hewlett Packard’s Unit Oscillator, the

current of the crystal is amplified,

rather than the voltage. There are

several advantages to this method,

the most important of which is low

distortion. Although the voltages

present in this circuit have poor wave

shape and are sensitive to loading,

the crystal current represents essen-

tially a filtered version of the voltage

waveform and is relatively tolerant of

loading effects.

DESIGN IDEAS

The impedance, and therefore the

voltage at the bottom of the crystal is

kept low by injecting the current into

the summing node of an LT1206 cur-

rent-feedback amplifier. Loop gain

reduces the input impedance to well

under one ohm. Oscillator bias is

adjustable, allowing control of the

mixer drive. This also provides a con-

venient point for closing an output

power servo loop.

One of the most popular

RF building blocks is the

diode-ring mixer.

Consisting of a diode

ring and two coupling

transformers, this simple

device is a favorite with

RF designers anywhere a

quick multiplication is

required, as in frequency

conversion, frequency

synthesis, or phase

detection

Figure 3. Spectrum plot of Figure 1’s circuit driving +27dBm into a 50Ω load (single termina-

tion)

Figure 4. Spectrum plot of Figure 1’s circuit driving +23dBm into a 50Ω load (single

termination)

dI1206_4.eps

–

LT1206

620Ω

50Ω

23dBm

Linear Technology Magazine • August 1995

Operating from ±15V supplies, the

LT1206 can deliver +32dBm to a 50Ω

load, and, with a little extra head-

room (the absolute maximum supply

voltage is ±18), it can reach 2W out-

put power into 50Ω. Peak guaranteed

output current is 250mA.

Shown in Figures 2–6 are spectral

plots for various combinations of

single and double termination at

power levels ranging from +17 to

+27dBm—not bad for an inductor-

less circuit. Double termination may

be used to present a 50Ω source im-

pedance to the mixer, or to isolate two

or more mixers driven simultaneously

from one LT1206 amplifier.

Although a 10MHz example has

been presented here, the LT1206’s

65MHz bandwidth makes it useful in

circuits up to 30MHz. In addition, the

shutdown feature can be used to gate

drive to the mixer. When the LT1206

is shut down, the oscillator will likely

stop, since the crystal then sees a

series impedance of 620Ω and the

mixer itself. Upon re-enabling the

LT1206 there will be some time delay

before the oscillator returns to full

power. The circuit works equally well

with an LC version of the oscillator.

Note that the current feedback to-

pology is inherently tolerant of stray

capacitive effects at the summing

node, making it ideal for this applica-

tion. Another nice feature is the

LT1206’s ability to drive heavy ca-

pacitive loads while remaining stable

and free of spurious oscillations.

For mixers below +17dBm, the

LT1227 is a lower cost alternative,

featuring 140MHz bandwidth in com-

bination with the shutdown feature

of the LT1206.

DESIGN IDEAS

Figure 5. Spectrum plot of Figure 1’s circuit driving +27dBm into a 100

Ω

load (double

termination)

Figure 6. Spectrum plot of Figure 1’s circuit driving +17dBm into a 100

Ω

load (double

termination)

dI1206_5.eps

–

LT1206

620Ω

50Ω

27dBm

dI1206_6.eps

–

LT1206

620Ω

50Ω

17dBm

Linear Technology Magazine • August 1995

Fully Differential, 8-Channel, 12-Bit

A/D System Using the LTC1390

and LTC1410

Figure 1. Fully differential 8-channel data acquisition system achieves 625ksps throughput

The LTC1410’s fast 1.25Msps con-

version rate and differential ±2.5V

input range make it ideal for applica-

tions that require multichannel

acquisition of fast, wide-bandwidth

signals. These applications include

multitransducer vibration analysis,

race-vehicle telemetry data acquisi-

tion, and multichannel telecommun-

ications. The LTC1410 can

be combined with the LTC1390

8-channel serial-interfaced analog

multiplexer to create a differential

A/D system with conversion through-

put rates up to 625ksps. This rate

applies to situations where the

selected channel changes with each

conversion. The conversion rate in-

creases to 1.25Msps if the same

channel is used for consecutive con-

versions.

Figure 1 shows the complete dif-

ferential, 8-channel A/D circuit. Two

LTC1390s, U1 and U2, are used

by Kevin R. Hoskins

DESIGN IDEAS

0.1µF

dI1390_1.eps



–A



VREF

REFCOMP

AGND

D11

D10

D9

D8

D7

D6

D5

D4

DGND



AVDD

DVDD

VSS

BUSY

CS

CONVST

RD

SHDN

NAP/SLP

OGND

D0

D1

D2

U3

LTC1410

S0

S1

S2

S3

S4

S5

S6

V+

D

V–

DATA2

DATA1

CS

CLK

GND

U2

LTC1390

S0

S1

S2

S3

S4

S5

S6

+CH0

+CH1

+CH2

+CH3

+CH4

+CH5

+CH6

+CH7

–CH0

–CH1

–CH2

–CH3

–CH4

–CH5

–CH6

–CH7

SERIAL DATA

CHIP SELECT MUX

SERIAL CLK

V+

D

V–

DATA2

DATA1

CS

CLK

GND

U1

LTC1390

0.1µF

+5V –5V

10µF0.1µF

10µF10µF 0.1µF

µP CONTROL

LINES

12-BIT

PARALLEL

BUS

0.1µF

Linear Technology Magazine • August 1995

DESIGN IDEAS

Figure 2. Timing diagram of circuit in Figure 1

as noninverting and inverting input

multiplexers. The outputs of the non-

inverting and inverting multiplexers

are applied to the LTC1410’s +A

and −A

inputs, respectively. The

LTC1390 share the CHIP SELECT

MUX, SERIAL DATA and SERIAL

CLOCK control signals. This arrange-

ment simultaneously selects the same

channel on each multiplexer: S0 for

both +CH0 and −CH0, S1 for both

+CH1 and −CH1, and so on.

As shown in the timing diagram

(Figure 2), MUX channel selection

and A/D conversion are pipelined to

maximize the converter’s throughput.

The conversion process begins with

selecting the desired multiplexer

channel-pair. With a logic high ap-

plied to the LTC1390’s CS input, the

channel-pair data is clocked into each

DATA 1 input on the rising edge of the

5MHz clock signal. CHIP SELECT

MUX is then pulled low, latching the

channel-pair selection data. The sig-

nals on the selected MUX inputs are

then applied to the LTC1410’s differ-

ential inputs. CHIP SELECT MUX is

pulled low 700ns before the LTC1410’s

conversion-start input, CONVST, is

pulled low. This accounts for the maxi-

mum time needed by the LTC1390’s

MUX switches to fully turn-on. This

ensures that the input signals are

fully settled before the LTC1410’s S/H

captures its sample.

The LTC1410’s S/H acquires the

input signal and begins conversion

on CONVST’s falling edge. During the

conversion, the LTC1390’s CS input

is pulled high and the data for the

next channel-pair is clocked into

DATA 1. This pipelined operation

continues until a conversion sequence

is completed. When a new channel-

pair is selected for each conversion,

the sampling rate of each channel is

78ksps, allowing an input-signal

bandwidth of 39kHz for each channel

of the LTC1390/LTC1410 system.

To maximize the throughput rate,

the LTC1410’s CS input is pulled low

at the beginning of a series of conver-

sions. The LTC1410’s data output

drivers are controlled by the signal

applied to RD. The conversion’s re-

sults are available 20ns before the

rising edge of BUSY. The rising edge

of the BUSY output signal can be

used to notify a processor that a con-

version has ended and data is ready

to read.

This circuit takes advantage of the

LTC1410’s very high 1.25Msps con-

version rate and differential inputs

and the LTC1390’s ease of program-

ming to create an A/D system

that maintains wide input-signal

bandwidth while sampling multiple

input signals.

DATA 0 DATA 1 DATA 2

SERIAL CLOCK LTC1390

5MHz, 200ns

A LOGIC LOW IS APPLIED TO THE LTC1410S CS INPUT DURING A CONVERSION SEQUENCE.

CHIP SELECT MUX LTC1390

DATA LTC1390

EN B2 B1 B0

700ns

EN B2 B1 B0 EN

CONVERSION 0 CONVERSION 1 CONVERSION 2

B2 B1 B0 EN B2 B1 B0

CONVST LTC1410

BUSY LTC1410

RD LTC1410

OUTPUT DATA LTC1410

dI1390_2.eps

Linear Technology Magazine • August 1995

NEW DEVICE CAMEOS

New Device Cameos

The DAC provides simple “bits-

to-lamp-current control,” and

communicates externally in two

interface modes: standard SPI mode

and pulse mode. On power-up, the

DAC counter is reset to half-scale

and the chip is configured to SPI or

pulse mode, depending on the CS

signal level. In SPI mode, the system

microprocessor serially transfers the

present 8-bit data and reads back the

previous 8-bit data from the DAC. In

pulse mode, the upper six bits of the

DAC implement increment-only

(1-wire interface) or increment/dec-

rement (2-wire interface) operation.

The operational mode (increment-only

or increment/decrement) is selected

by the DIN signal level.

The LT1186 operates from a logic

supply voltage of 3.3V or 5V. The IC

also has a battery supply voltage pin

that operates from 4.5V to 30V. The

LT1186 draws 6mA typical quiescent

current. An active low shutdown pin

typically reduces total supply current

to 35µA for standby operation while

the DAC retains its last setting. A

200kHz switching frequency mini-

mizes the size of required magnetic

components and the use of current-

mode switching techniques gives high

reliability and simple loop-frequency

compensation. The LT1186 is avail-

able in a 16-pin narrow body SO.

LTC1477/LTC1478: Single

and Dual 70mΩ, 2A,

Protected High-Side Switches

in SO Packaging

The LTC1477/LTC1478 single and

dual protected high-side switches

provide extremely low R

DS(ON)

switch-

ing with built in protection against

short-circuit and thermal-overload

conditions. The LTC1477 single is

available in 8-lead SO packaging and

the LTC1478 dual is available in

16-lead SO packaging. Both parts

operate from 2.7V to 5.5V.

The LTC1477/LTC1478 provide

two levels of protection. The first level

LTC1266/LTC1266-3.3/

LTC1266-5 Synchronous

Controllers Feature Precision

Output Regulation

The LTC1266, LTC1266-3.3, and

LTC1266-5 synchronous controllers

for N- or P-channel MOSFETs provide

a precision 1% internal reference for

tighter regulation of output voltage.

This precision reference, combined

with the LTC1266’s tight load regula-

tion and ability to drive two N-channel

MOSFETs for high currents, provides

the accuracy and current capability

necessary to meet the stringent

demands of many Pentium



micro-

processor applications.

The LTC1266 is a synchronous,

current mode, switching regulator

controller with automatic Burst Mode

operation (Burst Mode operation can

be disabled), available in the 16-lead

narrow SO package. Two user-pro-

grammable pins make it possible to

drive an N-channel MOSFET for high

current or step-up operation, or a P-

channel MOSFET for low dropout

operation. With an N-channel top-

side MOSFET for higher efficiency at

high currents and Burst Mode opera-

tion enabled for high efficiencies at

low currents, the LTC1266 can pro-

vide 90% or better efficiency for loads

from 10mA to 10A.

Other features of the LTC1266 in-

clude a shutdown mode, which

reduces supply current to 40µA, and

an on-chip comparator for use as a

“power-good” monitor, which stays

active in shutdown. The maximum

operating frequency of 400kHz al-

lows the use of small, surface mount

inductors and capacitors.

LT1368 and LT1369

Precision Rail-to-Rail Op

Amps with Excellent High-

Frequency Supply Rejection

The LT1368 dual and LT1369 quad

are the latest members of the LT1366

rail-to-rail op amp family. Designed

to operate with a 0.1µF output-com-

pensation capacitor, these devices

feature improved high frequency sup-

ply rejection and lower high frequency

output impedance. The output ca-

pacitance acts as a filter, reducing

noise pickup and ripple from the sup-

ply. This additional filtering is helpful

in mixed analog/digital systems with

common supplies, or in systems em-

ploying switching supplies.

Like the LT1366, the LT1368 and

LT1369 combine rail-to-rail input and

output operation with precision speci-

fications. These devices maintain their

characteristics over a supply range of

1.8V to 36V. Operation is specified

with +3V, +5V, and ±15V supplies.

The input offset voltage is typically

150µV, with a minimum open loop

gain (A

VOL

) of 1 million while driving a

2k load. The typical input-bias and

offset currents are 10nA and 1nA

respectively. The supply current per

amplifier is typically 375µA.

Common mode rejection is typi-

cally 90dB over the full rail-to-rail

input range, and supply rejection is

110dB (DC). The filter formed with

the amplifier’s output impedance and

the external compensating capacitor

provides approximately 40dB of sup-

ply rejection above 30kHz.

The LT1368 dual is available in

plastic 8-pin DIP and 8-lead SO

packages. The LT1369 quad is avail-

able in a plastic 16-lead SO package.

LT1186 DAC-Programmable

CCFL Switching Regulator

(Bits-to-Nits

)

The LT1186 is a fixed frequency,

current mode switching regulator that

provides the control function for cold-

cathode fluorescent lighting. The

LT1186 supports grounded-lamp and

floating-lamp configurations. The IC

includes an efficient, high-current

switch, an oscillator, output drive

logic, control circuitry, protection cir-

cuitry, and a micropower 8-bit, 50µA,

full-scale current output DAC.

Bits-to-Nits is a trademark of Linear Technology Corporation.

Pentium is a registered trademark of Intel Corporation.

Linear Technology Magazine • August 1995

For further information on the

above or any of the other devices

mentioned in this issue of Linear

Technology, use the reader service

card or call the LTC literature ser-

vice number: 1-800-4-LINEAR. Ask

for the pertinent data sheets.

NEW DEVICE CAMEOS

is short-circuit current limiting, which

is set at 2A. The short-circuit current

can be reduced to as low as 0.85A by

disconnecting portions of the power

device. The second level of protection

is thermal-overload protection, which

limits the die temperature to approxi-

mately 130°C. A built in charge pump

produces gate drive from the 2.7V-to-

5.5V power supply input for

controlled ramping of the internal

ultra-low R

DS(ON)

NMOS switch. No

higher gate voltage power supply is

required. Rise time is set internally at

1ms, to reduce inrush currents to

negligible levels; therefore, extremely

large load capacitors can be ramped

without glitching the system power

supply. The switch resistance is typi-

cally 0.07Ω at 5V and only rises to

0.08Ω at 3.3V. Output leakage cur-

rent drops to 0.01µA when the output

is switched off.

The NMOS switch has no parasitic

body diode; therefore, no current

flows through the switch when it is

turned off and the output is forced

above the input supply voltage. (DMOS

switches have parasitic body diodes

that become forward biased under

these conditions.)

All operating modes are micropower

and the quiescent current automati-

cally drops below 1µA when the

switch is turned off.

The combination of micropower

operation and full protection make

these devices ideal for battery pow-

ered applications such as palmtop

computers, notebook computers, per-

sonal digital assistants, instruments,

handi-terminals, and bar-code

readers.

LTC1550/LTC1551: Low-

Noise, Switched-Capacitor,

Regulated Voltage Inverters

The LTC1550 and LTC1551 are

switched-capacitor voltage inverters

with onboard linear post regulators,

designed to generate a low noise, regu-

lated negative supply for use as bias

voltage for GaAs transmitters FETs in

portable-RF and cellular-telephone

applications. They operate from a

single 4.5V to 7V supply and provide

a fixed −4.1V or adjustable output

voltage, with low output ripple (1mV

typical) and a typical quiescent cur-

rent of 5mA at V

= 5V. An on-chip

oscillator sets the charge pump fre-

quency at 900kHz, away from

sensitive 400kHz–600kHz IF bands.

The LTC1550-4.1 and the LTC1551-

4.1 provide fixed −4.1V outputs,

whereas the LTC1550 offers adjust-

able output voltage. Both devices

include a TTL-compatible shutdown

pin that drops supply current to 0.2µA

typical. The LTC1550 shutdown pin

is active low (SD), and the LTC1551

shutdown pin is active high (SD).

Only three external components

are required for the fixed-voltage

parts: two 0.1µF charge pump ca-

pacitors and a 10µF filter capacitor at

the linear regulator output. Each ver-

sion of the LTC1550/LTC1551 will

supply up to 20mA output current

with guaranteed output regulation of

±5%. All except the 8-pin versions of

the LTC1550/LTC1551 include an

open-drain REG output, which pulls

low to indicate that the output is

within 5% of the set value. This al-

lows external circuitry to monitor the

output without additional compo-

nents. The adjustable LTC1550

requires two additional resistors to

set the output voltage.

The LTC1550-4.1 and LTC1551-

4.1 are available in 8-pin SO, 14-pin

SO, and 16-pin SSOP packages. The

LTC1550 adjustable-output voltage

version is available in 14-pin SO and

16-pin SSOP packages.

Low-Cost, High-Accuracy, 12-

Bit Multiplying DAC Family

Linear Technology has introduced

the LTC8043, LTC8143, LTC7543,

and LTC7541A, four 12-bit, current

output, 4-quadrant multiplying digi-

tal-to-analog converters (DACs). They

are superior pin-compatible replace-

ments for the industry standard

DAC-8043, DAC-8143, AD7543, and

AD7541A. Low cost, tight accuracy

specs, low power, small size, and out-

standing flexibility make these DACs

excel in process control, remote or

isolated applications, and software-

programmable gain, attenuation, and

filtering. Linear Technology’s parts

have improved accuracy and stabil-

ity, tighter timing specs, reduced

sensitivity to external amplifier V

lower output capacitance, and re-

duced cost.

The LTC8043 comes in a small SO-

8 or PDIP package and has an

easy-to-use serial interface. The

LTC8143 and LTC7543 come in 16-

Pin SO or PDIP packages and feature

a more flexible serial interface that

includes an asynchronous Clear pin.

The LTC8143 also has a serial data

output so users can daisy-chain

multiple DACs on a 3-wire bus. The

LTC7541A has a 12-bit wide parallel

interface and comes in 18-pin SO and

PDIP packages.

These DACs boast unbeatable ac-

curacy and stability, with INL and

DNL of 1/2LSB MAX, 1/8LSB TYP

over temperature. Gain Error is 1LSB

MAX, eliminating adjustments

in most applications. Gain and

nonlinearity temperature coefficients

are typically better than 1 ppm/°C

and 0.1 ppm/°C respectively.

All four; parts are offered in the

extended industrial temperature

range and the LTC7541A is also avail-

able in commercial grades.

Burst Mode is a trademark of Linear

Technology Corporation. , LTC and LT

are registered trademarks used only to

identify products of Linear Technology Corp.

Other product names may be trademarks

of the companies that manufacture the

products.

Information furnished by Linear

Technology Corporation is believed to be

accurate and reliable. However, Linear

Technology makes no representation that

the circuits described herein will not infringe

on existing patent rights.

Linear Technology Magazine • August 1995

AppleTalk



is a registered trademark of Apple Computer, Inc.

LINEAR TECHNOLOGY CORPORATION

1630 McCarthy Boulevard

Milpitas, CA 95035-7487

(408) 432-1900

For Literature Only: 1-800-4-LINEAR

DESIGN TOOLS

Applications on Disk

NOISE DISK

This IBM-PC (or compatible) progam allows the user to calculate circuit noise

using LTC op amps, determine the best LTC op amp for a low noise application,

display the noise data for LTC op amps, calculate resistor noise, and calculate

noise using specs for any op amp. Available at no charge.

SPICE MACROMODEL DISK

This IBM-PC (or compatible) high density diskette contains the library of LTC

op amp SPICE macromodels. The models can be used with any version of

SPICE for general analog circuit simulations. The diskette also contains

working circuit examples using the models, and a demonstration copy of

PSPICE

by MicroSim. Available at no charge.

Technical Books

1990 Linear Databook, Volume I — This 1440 page collection of data sheets

covers op amps, voltage regulators, references, comparators, filters, PWMs,

data conversion and interface products (bipolar and CMOS), in both commer-

cial and military grades. The catalog features well over 300 devices. $10.00

1992 Linear Databook Supplement — This 1248 page supplement to the

1990 Linear Databook

is a collection of all products introduced since then.

The catalog contains full data sheets for over 140 devices. The

1992 Linear

Databook Supplement

is a companion to the

1990 Linear Databook

, which

should not be discarded. $10.00

1994 Linear Databook, Volume III — This 1826 page supplement to the

1990

Linear Databook

and

1992 Linear Databook Supplement

is a collection of

all products introduced since 1992. A total of 152 product data sheets are

included with updated selection guides. The

1994 Linear Databook Volume III

is a supplement to the 1990 and 1992 Databooks, which should not be

discarded. $10.00

Linear Applications Handbook • Volume I — 928 pages full of application

ideas covered in depth by 40 Application Notes and 33 Design Notes.

This catalog covers a broad range of “real world” linear circuitry. In addition to

detailed, systems-oriented circuits, this handbook contains broad tutorial

content together with liberal use of schematics and scope photography.

A special feature in this edition includes a 22 page section on SPICE

macromodels. $20.00

1993 Linear Applications Handbook • Volume II — Continues the stream

of “real world” linear circuitry initiated by the

1990 Handbook

. Similar in scope

to the 1990 edition, the new book covers Application Notes 41 through 54 and

Design Notes 33 through 69. Additionally, references and articles from non-

LTC publications that we have found useful are also included. $20.00

Interface Product Handbook

— This 424 page handbook features LTC’s

complete line of line driver and receiver products for RS232, RS485,

RS423, RS422, V.35 and AppleTalk



applications. Linear’s particular

expertise in this area involves low power consumption, high numbers of

drivers and receivers in one package, mixed RS232 and RS485 devices, 10kV

ESD protection of RS232 devices and surface mount packages.

Available at no charge.

SwitcherCAD Handbook — This 144 page manual, including disk, guides

the user through SwitcherCAD—a powerful PC software tool which aids in the

design and optimization of switching regulators. The program can cut days off

the design cycle by selecting topologies, calculating operating points and

specifying component values and manufacturer's part numbers. $20.00

1995 Power Solutions Brochure,

First Edition

— This 64 page collection

of circuits contains real-life solutions for common power supply design

problems. There are over 45 circuits, including descriptions, graphs and

performance specifications. Topics covered include PCMCIA power manage-

ment, microprocessor power supplies, portable equipment power supplies,

micropower DC/DC, step-up and step-down switching regulators, off-line

switching regulators, linear regulators and switched capacitor conversion.

Available at no charge.

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Linear Technology Corporation

1630 McCarthy Boulevard

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Phone: (408) 432-1900

FAX: (408) 434-0507

International

Sales Offices

World Headquarters

U.S. Area

Sales Offices

CENTRAL REGION

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