General Description
The MAX6715A–MAX6729A/MAX6797A are ultra-low-
voltage microprocessor (μP) supervisory circuits designed to
monitor two or three system power-supply voltages. These
devices assert a system reset if any monitored supply falls
below its factory-trimmed or adjustable threshold and main-
tain reset for a minimum timeout period after all supplies rise
above their thresholds. The integrated dual/triple superviso-
ry circuits significantly improve system reliability and reduce
size compared to separate ICs or discrete components.
These devices monitor primary supply voltages (VCC1)
from 1.8V to 5.0V and secondary supply voltages (VCC2)
from 0.9V to 3.3V with factory-trimmed reset threshold
voltage options (see the Reset Voltage Threshold Suffix
Guide). An externally adjustable RSTIN input option
allows customers to monitor a third supply voltage down
to 0.62V. These devices are guaranteed to be in the cor-
rect reset output logic state when either VCC1 or VCC2
remains greater than 0.8V.
A variety of push-pull or open-drain reset outputs along
with watchdog input, manual-reset input, and power-fail
input/output features are available (see the Selector
Guide). Select reset timeout periods from 1.1ms to
1120ms (min) (see the Reset Timeout Period Suffix
Guide). The MAX6715A–MAX6729A/MAX6797A are
available in small 5-, 6-, and 8-pin SOT23 packages and
operate over the -40°C to +125°C temperature range.
Applications
Multivoltage Systems
Telecom/Networking
Equipment
Computers/Servers
Portable/Battery-
Operated Equipment
Industrial Equipment
Printers/Fax Machines
Set-Top Boxes
Features
VCC1 (Primary Supply) Reset Threshold Voltages
from 1.58V to 4.63V
VCC2 (Secondary Supply) Reset Threshold Voltages
from 0.79V to 3.08V
Externally Adjustable RSTIN Threshold for Auxiliary/
Triple-Voltage Monitoring (0.62V Internal Reference)
Watchdog Timer Option
35s (min) Long Startup Period
1.12s (min) Normal Timeout Period
Manual-Reset Input Option
Power-Fail Input/Power-Fail Output Option
(Push-Pull and Open-Drain Active-Low)
Guaranteed Reset Valid Down to VCC1 or
VCC2 = 0.8V
Reset Output Logic Options
Immune to Short VCC Transients
Low Supply Current 14μA (typ) at 3.6V
Watchdog Disable Feature
Small 5-, 6-, and 8-Pin SOT23 Packages
Ordering Information continued at end of data sheet.
Pin Configurations and Selector Guide appear at end of
data sheet.
19-0536; Rev 4; 3/14
Note: The first “_ _” are placeholders for the threshold voltage
levels of the devices. Desired threshold levels are set by the part
number suffix found in the Reset Voltage Threshold Suffix Guide.
The “_” after the D is a placeholder for the reset timeout delay
time. Desired delay time is set using the timeout period suffix
found in the Reset Timeout Period Suffix Guide. For example,
the MAX6716AUTLTD3-T is a dual-voltage supervisor VTH1 =
4.625V, VTH2 = 3.075V, and 210ms (typ) timeout period.
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
/V denotes an automotive qualified part.
*Future product—contact factory for availability.
PART TEMP RANGE PIN-
PACKAGE
MAX6715AUT_ _D_+T -40°C to +125°C 6 SOT23
MAX6716AUT_ _D_+T -40°C to +125°C 6 SOT23
MAX6717AUK_ _D_+T -40°C to +125°C 5 SOT23
MAX6718AUK_ _D_+T -40°C to +125°C 5 SOT23
MAX6719AUT_ _D_+T -40°C to +125°C 6 SOT23
MAX6719AUT_ _D_/V+T* -40°C to +125°C 6 SOT23
IN
OUT2
OUT1
DC-DC
CONVERTER
UNREGULATED
DC
R1
R2
VCC1 VCC2
RSTIN/PFI
MR
RST
WDI
PFO
MAX67_ _
PUSHBUTTON
SWITCH
I/O
SUPPLY
CORE
SUPPLY
RESET
I/O
NMI
µP
1.8V 0.9V
MAX6715A-
MAX6729A/
MAX6797A
MAX6715A–MAX6729A/
MAX6797A
Dual/Triple, Ultra-Low-Voltage, SOT23 μP
Supervisory Circuits
Typical Operating Circuit
Ordering Information
Terminal Voltage (with respect to GND)
VCC1, VCC2 .........................................................-0.3V to +6V
Open-Drain RST, RST1, RST2, PFO, RST ............-0.3V to +6V
Push-Pull RST, RST1, PFO, RST .......... -0.3V to (VCC1 + 0.3V)
Push-Pull RST2 ...................................... -0.3V to (VCC2 + 0.3V)
RSTIN, PFI, MR, WDI .............................................-0.3V to +6V
Input Current/Output Current (all pins) ...............................20mA
Continuous Power Dissipation (TA = +70°C)
5-Pin SOT23-5 (derate 7.1mW/°C above +70°C) .......571mW
6-Pin SOT23-6 (derate 8.7mW/°C above +70°C) .......696mW
8-Pin SOT23-8 (derate 8.9mW/°C above +70°C) .......714mW
Operating Temperature Range ......................... -40°C to +125°C
Storage Temperature Range ............................ -65°C to +150°C
Junction Temperature ......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
(VCC1 = 0.8V to 5.5V, VCC2 = 0.8V to 5.5V, GND = 0V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA =
+25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Supply Voltage VCC 0.8 5.5 V
Supply Current
ICC1
VCC1 < 5.5V all I/O connections open,
outputs not asserted 15 39
µA
VCC1 < 3.6V all I/O connections open,
outputs not asserted 10 28
ICC2
VCC2 < 3.6V all I/O connections open,
outputs not asserted 411
VCC2 < 2.75V all I/O connections open,
outputs not asserted 39
VCC1 Reset Threshold VTH1
L (falling) 4.500 4.625 4.750
V
M (falling) 4.250 4.375 4.500
T (falling) 3.000 3.075 3.150
S (falling) 2.850 2.925 3.000
R (falling) 2.550 2.625 2.700
Z (falling) 2.250 2.313 2.375
Y (falling) 2.125 2.188 2.250
W (falling) 1.620 1.665 1.710
V (falling) 1.530 1.575 1.620
VCC2 Reset Threshold VTH2
T (falling) 3.000 3.075 3.150
V
S (falling) 2.850 2.925 3.000
R (falling) 2.550 2.625 2.700
Z (falling) 2.250 2.313 2.375
Y (falling) 2.125 2.188 2.250
W (falling) 1.620 1.665 1.710
V (falling) 1.530 1.575 1.620
I (falling) 1.350 1.388 1.425
H (falling) 1.275 1.313 1.350
G (falling) 1.080 1.110 1.140
F (falling) 1.020 1.050 1.080
E (falling) 0.810 0.833 0.855
D (falling) 0.765 0.788 0.810
MAX6715A–MAX6729A/
MAX6797A
Dual/Triple, Ultra-Low-Voltage, SOT23 μP
Supervisory Circuits
www.maximintegrated.com Maxim Integrated
2
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(VCC1 = 0.8V to 5.5V, VCC2 = 0.8V to 5.5V, GND = 0V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA =
+25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Reset Threshold Tempco ΔVTH/°C 20 ppm/°C
Reset Threshold Hysteresis VHYST Referenced to VTH typical 0.5 %
VCC to Reset Output Delay tRD VCC1 = (VTH1 + 100mV) to (VTH1 - 100mV) or
VCC2 = (VTH2 + 75mV) to (VTH2 - 75mV) 20 µs
Reset Timeout Period tRP
D1 1.1 1.65 2.2
ms
D2 8.8 13.2 17.6
D7 (MAX6797A only) 17.5 26.25 35
D8 (MAX6797A only) 35 52.5 70
D3 140 210 280
D5 280 420 560
D6 560 840 1120
D4 1120 1680 2240
ADJUSTABLE RESET COMPARATOR INPUT (MAX6719A/MAX6720A/MAX6723A–MAX6727A)
RSTIN Input Threshold VRSTIN 611 626.5 642 mV
RSTIN Input Current IRSTIN -100 +100 nA
RSTIN Hysteresis 3 mV
RSTIN to Reset Output Delay tRSTIND VRSTIN to (VRSTIN - 30mV) 22 µs
POWER-FAIL INPUT (MAX6728A/MAX6729A)
PFI Input Threshold VPFI 611 626.5 642 mV
PFI Input Current IPFI -100 +100 nA
PFI Hysteresis VPFH 3 mV
PFI to PFO Delay tDPF (VPFI + 30mV) to (VPFI - 30mV) 2 µs
MANUAL-RESET INPUT (MAX6715A–MAX6722A/MAX6725A–MAX6729A)
MR Input Voltage VIL 0.3 x VCC1 V
VIH 0.7 x VCC1
MR Minimum Pulse Width 1 µs
MR Glitch Rejection 100 ns
MR to Reset Delay tMR 200 ns
MR Pullup Resistance 25 50 80 kΩ
WATCHDOG INPUT (MAX6721A–MAX6729A)
Watchdog Timeout Period tWD
First watchdog period after reset timeout
period 35 54 72 s
Normal mode 1.12 1.68 2.24
WDI Pulse Width tWDI (Note 2) 50 ns
WDI Input Voltage VIL 0.3 x VCC1 V
VIH 0.7 x VCC1
WDI Input Current IWDI VWDI = 0V or VCC1 -1 +1 µA
MAX6715A–MAX6729A/
MAX6797A
Dual/Triple, Ultra-Low-Voltage, SOT23 μP
Supervisory Circuits
www.maximintegrated.com Maxim Integrated
3
Electrical Characteristics (continued)
(VCC1 = 0.8V to 5.5V, VCC2 = 0.8V to 5.5V, GND = 0V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA =
+25°C.) (Note 1)
Note 1: Devices tested at TA = +25°C. Overtemperature limits are guaranteed by design and not production tested.
Note 2: Parameter guaranteed by design.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
RESET/POWER-FAIL OUTPUTS
RST/RST1/RST2/PFO
Output Low
(Push-Pull or Open-Drain)
VOL
VCC1 or VCC2 ≥ 0.8V, ISINK = 1µA,
output asserted 0.3
V
VCC1 or VCC2 ≥ 1.0V, ISINK = 50µA,
output asserted 0.3
VCC1 or VCC2 ≥ 1.2V, ISINK = 100µA,
output asserted 0.3
VCC1 or VCC2 ≥ 2.7V, ISINK = 1.2mA,
output asserted 0.3
VCC1 or VCC2 ≥ 4.5V, ISINK = 3.2mA,
output asserted 0.4
RST/RST1/PFO
Output High
(Push-Pull Only)
VOH
VCC1 ≥ 1.8V, ISOURCE = 200µA, output not
asserted 0.8 x VCC1
V
VCC1 ≥ 2.7V, ISOURCE = 500µA, output not
asserted 0.8 x VCC1
VCC1 ≥ 4.5V, ISOURCE = 800µA, output not
asserted 0.8 x VCC1
RST2
Output High
(Push-Pull Only)
VOH
VCC1 ≥ 1.8V, ISOURCE = 200µA, output not
asserted 0.8 x VCC2
V
VCC1 ≥ 2.7V, ISOURCE = 500µA, output not
asserted 0.8 x VCC2
VCC1 ≥ 4.5V, ISOURCE = 800µA, output not
asserted 0.8 x VCC2
RST
Output High
(Push-Pull Only)
VOH
VCC1 ≥ 1.0V, ISOURCE = 1µA, reset asserted 0.8 x VCC1
V
VCC1 ≥ 1.8V, ISOURCE = 150µA,
reset asserted 0.8 x VCC1
VCC1 ≥ 2.7V, ISOURCE = 500µA,
reset asserted 0.8 x VCC1
VCC1 ≥ 4.5V, ISOURCE = 800µA,
reset asserted 0.8 x VCC1
RST
Output Low
(Push-Pull or Open Drain)
VOL
VCC1 or VCC2 ≥ 1.8V, ISINK = 500µA,
reset not asserted 0.3
V
VCC1 or VCC2 ≥ 2.7V, ISINK = 1.2mA,
reset not asserted 0.3
VCC1 or VCC2 ≥ 4.5V, ISINK = 3.2mA,
reset not asserted 0.4
RST/RST1/RST2/PFO Output
Open-Drain Leakage Current Output not asserted 0.5 µA
RST Output Open-Drain
Leakage Current Output asserted 0.5 µA
MAX6715A–MAX6729A/
MAX6797A
Dual/Triple, Ultra-Low-Voltage, SOT23 μP
Supervisory Circuits
www.maximintegrated.com Maxim Integrated
4
Electrical Characteristics (continued)
(VCC1 = 5V, VCC2 = 3.3V, TA = +25°C, unless otherwise noted.)
0
4
2
10
8
6
18
16
14
12
20
SUPPLY CURRENT vs. TEMPERATURE
(VCC1 = +3.3V, VCC2 = +2.5V)
MAX6715A-29A toc02
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
-40 20-10 50 805-25 35 65 11095 125
TOTAL
ICC1
ICC2
0
2
6
4
12
10
8
18
16
14
20
-40 20-10 50 805-25 35 65 11095 125
SUPPLY CURRENT vs. TEMPERATURE
(VCC1 = +2.5V, VCC2 = +1.8V)
MAX6715A-29A toc03
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
TOTAL
ICC1
ICC2
0
2
6
4
12
10
8
18
16
14
20
-40 20-10 50 805-25 35 65 11095 125
SUPPLY CURRENT vs. TEMPERATURE
(VCC1 = +1.8V, VCC2 = +1.2V)
MAX6715A-29A toc04
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
TOTAL
ICC1
ICC2
0.980
0.984
0.992
0.988
1.004
1.000
0.996
1.016
1.012
1.008
1.020
-40 20-10 50 805-25 35 65 11095 125
NORMALIZED/RESET WATCHDOG
TIMEOUT PERIOD vs. TEMPERATURE
MAX6715A-29A toc05
TEMPERATURE (°C)
RESET/WATCHDOG TIMEOUT PERIOD
10,000
1000
100
10
1 10010
1000
MAXIMUM VCC TRANSIENT DURATION
vs. RESET THRESHOLD OVERDRIVE
MAX6715A-29A toc06
RESET THRESHOLD OVERDRIVE (mV)
MAXIMUM V
CC
TRANSIENT DURATION (µs)
RESET OCCURS ABOVE
THIS LINE
0.998
0.999
1.001
1.000
1.004
1.003
1.002
1.007
1.006
1.005
1.008
-40 20-10 50 805-25 35 65 11095 125
NORMALIZED VCC RESET THRESHOLD
vs. TEMPERATURE
MAX6715A-29A toc07
TEMPERATURE (°C)
RESET THRESHOLD
0
2
6
4
12
10
8
18
16
14
20
-40 20-10 50 805-25 35 65 11095 125
SUPPLY CURRENT vs. TEMPERATURE
(VCC1 = +5V, VCC2 = +3.3V)
MAX6715A-29A toc01
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
TOTAL
ICC1
ICC2
628
630
629
633
632
631
637
636
634
635
638
-40 20-10 50 805-25 35 65 11095 125
RESET INPUT AND POWER-FAIL INPUT
THRESHOLD vs. TEMPERATURE
MAX6715A-29A toc08
TEMPERATURE (°C)
RESET THRESHOLD
10
11
13
12
16
15
14
19
18
17
20
-40 20-10 50 805-25 35 65 11095 125
VCC TO RESET DELAY
vs. TEMPERATURE
MAX6715A-29A toc09
TEMPERATURE (°C)
VCC TO RESET DELAY (µs)
75mV OVERDRIVE
MAX6715A–MAX6729A/
MAX6797A
Dual/Triple, Ultra-Low-Voltage, SOT23 μP
Supervisory Circuits
Maxim Integrated
5
www.maximintegrated.com
Typical Operating Characteristics
(VCC1 = 5V, VCC2 = 3.3V, TA = +25°C, unless otherwise noted.)
PIN
NAME FUNCTION
MAX6715A/
MAX6716A
MAX6717A/
MAX6718A
MAX6719A/
MAX6720A
MAX6721A/
MAX6722A
MAX6723A/
MAX6724A
MAX6725A/
MAX6726A MAX6727A
MAX6728A/
MAX6729A/
MAX6797A
1 1 1 1 1 1 1, 4 1RST/
RST1
Active-Low Reset Output,
Open-Drain or Push-Pull.
RST/RST1 changes from
high to low when VCC1
or VCC2 drops below the
selected reset thresholds,
RSTIN is below threshold,
MR is pulled low, or the
watchdog triggers a reset.
RST/RST1 remains low for
the reset timeout period
after VCC1/VCC2/RSTIN
exceed the device reset
thresholds, MR goes low
to high, or the watchdog
triggers a reset. Open-
drain outputs require an
external pullup resistor.
Push-pull outputs are
referenced to VCC1.
12
16
14
22
20
18
24
-40 20-10 50 805-25 35 65 11095 125
RSTIN INPUT TO RESET OUTPUT DELAY
vs. TEMPERATURE
MAX6715A-29A toc10
TEMPERATURE (°C)
RSTIN TO RESET DELAY (µs)
30mV OVERDRIVE
1.0
1.2
1.8
1.6
1.4
1.3
1.1
1.9
1.7
1.5
2.0
-40 20-10 50 805-25 35 65 11095 125
POWER-FAIL INPUT TO POWER-FAIL
OUTPUT DELAY vs. TEMPERATURE
MAX6715A-29A toc11
TEMPERATURE (°C)
POWER-FAIL DELAY (µs)
30mV OVERDRIVE
0V
0V
VRST
2V/div
MAX6715A-29A toc12
50ns/div
MR TO RESET OUTPUT DELAY
VMR
2V/div
MAX6715A–MAX6729A/
MAX6797A
Dual/Triple, Ultra-Low-Voltage, SOT23 μP
Supervisory Circuits
www.maximintegrated.com Maxim Integrated
6
Pin Description
Typical Operating Characteristics (continued)
PIN
NAME FUNCTION
MAX6715A/
MAX6716A
MAX6717A/
MAX6718A
MAX6719A/
MAX6720A
MAX6721A/
MAX6722A
MAX6723A/
MAX6724A
MAX6725A/
MAX6726A MAX6727A
MAX6728A/
MAX6729A/
MAX6797A
5 RST2
Active-Low Reset Output,
Open-Drain or Push-Pull.
RST2 changes from high
to low when VCC1 or VCC2
drops below the selected
reset thresholds or MR is
pulled low. RST2 remains
low for the reset timeout
period after VCC1/VCC2
exceed the device reset
thresholds or MR goes
low to high. Open-drain
outputs require an external
pullup resistor. Push-pull
outputs are referenced to
VCC2.
2 2 2 2 2 2 2 2 GND Ground
3 3 3 3 5 5 5 MR
Active-Low Manual-Reset
Input. Internal 50kΩ
pullup to VCC1. Pull low
to force a reset. Reset
remains active as long
as MR is low and for the
reset timeout period after
MR goes high. Leave
unconnected or connect to
VCC1 if unused.
4 4 4 4 4 6 6 6 VCC2
Secondary Supply Voltage
Input. Powers the device
when it is above VCC1 and
input for secondary reset
threshold monitor.
6 5 6 6 6 8 8 8 VCC1
Primary Supply Voltage
Input. Powers the device
when it is above VCC2
and input for primary reset
threshold monitor.
MAX6715A–MAX6729A/
MAX6797A
Dual/Triple, Ultra-Low-Voltage, SOT23 μP
Supervisory Circuits
www.maximintegrated.com Maxim Integrated
7
Pin Description (continued)
PIN
NAME FUNCTION
MAX6715A/
MAX6716A
MAX6717A/
MAX6718A
MAX6719A/
MAX6720A
MAX6721A/
MAX6722A
MAX6723A/
MAX6724A
MAX6725A/
MAX6726A MAX6727A
MAX6728A/
MAX6729A/
MAX6797A
5 3 3 3 3 WDI
Watchdog Input. If WDI
remains high or low for
longer than the watchdog
timeout period, the
internal watchdog timer
runs out and the reset
output asserts for the
reset timeout period. The
internal watchdog timer
clears whenever a reset
is asserted or WDI sees
a rising or falling edge.
The watchdog has a long
startup period (35s min)
after each reset event
and a short watchdog
timeout period (1.12s min)
after the rst valid WDI
transition. Leave WDI
unconnected to disable
the watchdog timer. The
WDI unconnected-state
detector uses a small
200nA current source.
Therefore, do not connect
WDI to anything that will
source more than 50nA.
5 5 7 7 RSTIN
Undervoltage Reset
Comparator Input. High-
impedance input for
adjustable reset monitor.
The reset output is
asserted when RSTIN falls
below the 0.626V internal
reference voltage. Set the
monitored voltage reset
threshold with an external
resistor-divider network.
Connect RSTIN to VCC1
or VCC2 if not used.
MAX6715A–MAX6729A/
MAX6797A
Dual/Triple, Ultra-Low-Voltage, SOT23 μP
Supervisory Circuits
www.maximintegrated.com Maxim Integrated
8
Pin Description (continued)
PIN
NAME FUNCTION
MAX6715A/
MAX6716A
MAX6717A/
MAX6718A
MAX6719A/
MAX6720A
MAX6721A/
MAX6722A
MAX6723A/
MAX6724A
MAX6725A/
MAX6726A MAX6727A
MAX6728A/
MAX6729A/
MAX6797A
7 PFI
Power-Fail Voltage
Monitor Input. High-
impedance input for
internal power-fail monitor
comparator. Connect PFI
to an external resistor-
divider network to set
the power-fail threshold
voltage (0.626V typical
internal reference voltage).
Connect to GND, VCC1, or
VCC2 if not used.
4 PFO
Active-Low Power-Fail
Monitor Output, Open-
Drain or Push-Pull. PFO
is asserted low when PFI
is less than 0.626V. PFO
deasserts without a reset
timeout period. Open-drain
outputs require an external
pullup resistor. Push-pull
outputs are referenced to
VCC1.
4 RST
Active-High Reset Output,
Open-Drain or Push-Pull.
RST changes from low to
high when VCC1 or VCC2
drops below selected
reset thresholds, RSTIN
is below threshold, MR
is pulled low, or the
watchdog triggers a reset.
RST remains HIGH for
the reset timeout period
after VCC1/VCC2/RSTIN
exceed the device reset
thresholds, MR goes low
to high, or the watchdog
triggers a reset. Open-
drain outputs require an
external pullup resistor.
Push-pull outputs are
referenced to VCC1.
MAX6715A–MAX6729A/
MAX6797A
Dual/Triple, Ultra-Low-Voltage, SOT23 μP
Supervisory Circuits
www.maximintegrated.com Maxim Integrated
9
Pin Description (continued)
Detailed Description
Supply Voltages
The MAX6715A–MAX6729A/MAX6797A μP supervisory
circuits maintain system integrity by alerting the μP to
fault conditions. These ICs are optimized for systems that
monitor two or three supply voltages. The output reset
state is guaranteed to remain valid while either VCC1 or
VCC2 is above 0.8V.
Threshold Levels
Input-voltage threshold level combinations are indicated
by a two-letter code in the Reset Voltage Threshold Suffix
Guide (Table 1). Contact factory for availability of other
voltage threshold combinations.
Reset Outputs
The MAX6715A–MAX6729A/MAX6797A provide an
active-low reset output (RST) and the MAX6725A/
MAX6726A also provide an active-high (RST) output.
RST, RST, RST1, and RST2 are asserted when the
voltage at either VCC1 or VCC2 falls below the voltage
threshold level, RSTIN drops below threshold, or MR is
pulled low. Once reset is asserted, it stays low for the
reset timeout period (see Table 2). If VCC1, VCC2, or
RSTIN goes below the reset threshold before the reset
timeout period is completed, the internal timer restarts.
The MAX6715A/MAX6717A/MAX6719A/MAX6721A/
MAX6723A/MAX6725A/MAX6727A/MAX6728A con-
tain open-drain reset outputs, while the MAX6716A/
MAX6718A/MAX6720A/MAX6722A/MAX6724A/
MAX6726A/MAX6729A/MAX6797A contain push-pull
reset outputs. The MAX6727A provides two separate
open-drain RST outputs driven by the same internal logic.
Manual-Reset Input
Many μP-based products require manual-reset capability,
allowing the operator, a test technician, or external logic
circuitry to initiate a reset. A logic-low on MR asserts the
reset output. Reset remains asserted while MR is low for
the reset timeout period (tRP) after MR returns high. This
input has an internal 50kΩ pullup resistor to VCC1 and
can be left unconnected if not used. MR can be driven
with CMOS logic levels, or with open-drain/collector out-
puts. Connect a normally open momentary switch from
MR to GND to create a manual-reset function; external
debounce circuitry is not required. If MR is driven from
long cables or if the device is used in a noisy environment,
connect a 0.1μF capacitor from MR to GND to provide
additional noise immunity.
Adjustable Input Voltage
The MAX6719A/MAX6720A and MAX6723A–MAX6727A
provide an additional input to monitor a third system volt-
age. The threshold voltage at RSTIN is typically 626mV.
Connect a resistor-divider network to the circuit as shown
in Figure 1 to establish an externally controlled threshold
voltage, VEXT_TH.
VEXT_TH = 626mV((R1 + R2)/R2)
Low-leakage current at RSTIN allows the use of large-
valued resistors resulting in reduced power consumption
of the system.
Watchdog Input
The watchdog monitors μP activity through the watchdog
input (WDI). To use the watchdog function, connect WDI
to a bus line or μP I/O line. When WDI remains high or
low for longer than the watchdog timeout period, the reset
output asserts.
The MAX6721A–MAX6729A/MAX6797A include a dual-
mode watchdog timer to monitor μP activity. The flexible
timeout architecture provides a long period initial watch-
dog mode, allowing complicated systems to complete
lengthy boots, and a short period normal watchdog mode,
allowing the supervisor to provide quick alerts when pro-
cessor activity fails. After each reset event (VCC power-
up/brownout, manual reset, or watchdog reset), there is
a long initial watchdog period of 35s minimum. The long
watchdog period mode provides an extended time for the
system to power-up and fully initialize all μP and system
components before assuming responsibility for routine
watchdog updates.
Figure 1. Monitoring a Third Voltage
VEXT_TH
R1
R2
RSTIN
GND
MAX6719A/
MAX6720A/
MAX6723A–
MAX6727A
MAX6715A–MAX6729A/
MAX6797A
Dual/Triple, Ultra-Low-Voltage, SOT23 μP
Supervisory Circuits
www.maximintegrated.com Maxim Integrated
10
The normal watchdog timeout period (1.12s min) begins
after the first transition on WDI before the conclusion of
the long initial watchdog period (Figure 2). During the
normal operating mode, the supervisor will issue a reset
pulse for the reset timeout period if the μP does not
update the WDI with a valid transition (high-to-low or low-
to-high) within the standard timeout period (1.12s min).
Leave WDI unconnected to disable the watchdog timer.
The WDI unconnected-state detector uses a small (200nA
typ) current source. Therefore, do not connect WDI to
anything that will source more than 50nA.
Power-Fail Comparator
PFI is the noninverting input to a comparator. If PFI is less
than VPFI (626.5mV), PFO goes low. Common uses for
the power-fail comparator include monitoring preregulated
input of the power supply (such as a battery) or providing
an early power-fail warning so software can conduct an
orderly system shutdown. It can also be used to monitor
supplies other than VCC1 or VCC2 by setting the power-
fail threshold with a resistor-divider, as shown in Figure 3.
PFI is the input to the power-fail comparator. The typical
comparator delay is 2μs from PFI to PFO. Connect PFI to
ground of VCC1 if unused.
Ensuring a Valid Reset Output
Down to VCC = 0V
The MAX6715A–MAX6729A/MAX6797A are guaranteed
to operate properly down to VCC = 0.8V. In applica-
tions that require valid reset levels down to VCC = 0V,
use a pulldown resistor at RST to ground. The resistor
value used is not critical, but it must be large enough
not to load the reset output when VCC is above the reset
threshold. For most applications, 100kΩ is adequate. This
configuration does not work for the open-drain outputs
of the MAX6715A/MAX6717A/MAX6719A/MAX6721A/
MAX6723A/MAX6725A/MAX6727A/MAX6728A. For
push-pull, active-high RST output connect the external
resistor as a pullup from RST to VCC1.
Figure 2. Normal Watchdog Startup Sequence Figure 3. Using Power-Fail Input to Monitor an Additional
Power-Supply a) VIN is Positive b) VIN is Negative
1.12s MAX
tWDI-NORMAL
1.12s MAX
tWDI-STARTUP
35s MAX
VTH
VCC
WDI
RST tRP
R1
R2
PFI
GND
VIN
PFO
VTRIP = VPFI R1 + R2
R2
( )
R1
R2
PFI
GND
VCC
VIN
PFO VTRIP = R2 (VPFI) 1
R1
1
R2
+ - VCC
R1
[ ]
( )
VPFI = 626.5mV
A)
B)
MAX6728A/
MAX6729A/
MAX6797A
MAX6728A/
MAX6729A/
MAX6797A
MAX6715A–MAX6729A/
MAX6797A
Dual/Triple, Ultra-Low-Voltage, SOT23 μP
Supervisory Circuits
www.maximintegrated.com Maxim Integrated
11
Applications Information
Interfacing to μPs with Bidirectional
Reset Pins
Most μPs with bidirectional reset pins can interface directly
to open-drain RST output options. Systems simultane-
ously requiring a push-pull RST output and a bidirectional
reset interface can be in logic contention. To prevent con-
tention, connect a 4.7kΩ resistor between RST and the
μP’s reset I/O port, as shown in Figure 4.
Adding Hysteresis to the Power-Fail
Comparator
The power-fail comparator has a typical input hysteresis
of 3mV. This is sufficient for most applications where a
power-supply line is being monitored through an external
voltage-divider (see the Power-Fail Comparator section).
If additional noise margin is desired, connect a resistor
between PFO and PFI as shown in Figure 5. Select the
values of R1, R2, and R3 so PFI sees VPFI (626mV)
when VEXT falls to its power-fail trip point (VFAIL) and
when VIN rises to its power-good trip point (VGOOD). The
hysteresis window extends between the specified VFAIL
and VGOOD thresholds. R3 adds the additional hysteresis
by sinking current from the R1/R2 divider network when
PFO is logic-low and sourcing current into the network
when PFO is logic-high. R3 is typically an order of magni-
tude greater than R1 or R2.
The current through R2 should be at least 2.5μA to ensure
that the 100nA (max) PFI input current does not signifi-
cantly shift the trip points. Therefore, R2 < VPFI/10μA <
62kΩ for most applications. R3 will provide additional
hysteresis for PFO push-pull (VOH = VCC1) or open-drain
(VOH = VPULLUP) applications.
Monitoring an Additional Power Supply
These μP supervisors can monitor either positive or nega-
tive supplies using a resistor voltage-divider to PFI. PFO
can be used to generate an interrupt to the μP or cause
reset to assert (Figure 3).
Monitoring a Negative Voltage
The power-fail comparator can be used to monitor a neg-
ative supply voltage using the circuit shown in Figure 3.
When the negative supply is valid, PFO is low. When the
negative supply voltage drops, PFO goes high. The cir-
cuit’s accuracy is affected by the PFI threshold tolerance,
VCC, R1, and R2.
Negative-Going VCC Transients
The MAX6715A–MAX6729A/MAX6797A supervisors are
relatively immune to short-duration negative-going VCC
transients (glitches). It is usually undesirable to reset
the μP when VCC experiences only small glitches.
The Typical Operating Characteristics show Maximum
Transient Duration vs. Reset Threshold Overdrive, for
which reset pulses are not generated. The graph was
produced using negative-going VCC pulses, starting
above VTH and ending below the reset threshold by the
Figure 4. Interfacing to μPs with Bidirectional Reset I/O Figure 5. Adding Hysteresis to Power-Fail for Push-Pull PFO
GND GND
VCC1 VCC2
VCC2
VCC1
RST
RESET TO OTHER SYSTEM COMPONENTS
RESET
µP
4.7k
MAX6715A–
MAX6729A/
MAX6797A
VEXT
R1
R3
R2
PFI
GND
PFO
A
VGOOD = DESIRED VEXT GOOD VOLTAGE THRESHOLD
VFAIL = DESIRED VEXT FAIL VOLTAGE THRESHOLD
VOH = VCC1 (FOR PUSH-PULL PFO)
R2 = 50k (FOR > 10µA R2 CURRENT)
R1 = R2 ((VGOOD - VPFI) - (VPFI)(VGOOD - VFAIL)/VOH)/VPFI
R3 = (R1 x VOH)/(VGOOD - VFAIL)
VGOOD
VFAIL
VIN
PFO
MAX6729A
MAX6715A–MAX6729A/
MAX6797A
Dual/Triple, Ultra-Low-Voltage, SOT23 μP
Supervisory Circuits
www.maximintegrated.com Maxim Integrated
12
magnitude indicated (reset threshold overdrive). The
graph shows the maximum pulse width that a negative-
going VCC transient may typically have without causing a
reset pulse to be issued. As the amplitude of the transient
increases (i.e., goes farther below the reset threshold),
the maximum allowable pulse width decreases. A 0.1μF
bypass capacitor mounted close to the VCC pin provides
additional transient immunity.
Watchdog Software Considerations
Setting and resetting the watchdog input at different points
in the program, rather than “pulsing” the watchdog input
high-low-high or low-high-low, helps the watchdog timer to
closely monitor software execution. This technique avoids
a “stuck” loop where the watchdog timer continues to be
reset within the loop, keeping the watchdog from timing
out. Figure 6 shows an example flow diagram where the
I/O driving the watchdog input is set high at the begin-
ning of the program, set low at the beginning of every
subroutine or loop, then set high again when the program
returns to the beginning. If the program should “hang”
in any subroutine, the I/O is continually set low and the
watchdog timer is allowed to time out, causing a reset or
interrupt to be issued. Figure 6. Watchdog Flow Diagram
START
SET WDI
HIGH
PROGRAM
CODE
SUBROUTINE OR
PROGRAM LOOP
SET WDI LOW
RETURN
SUBROUTINE
COMPLETED
HANG IN
SUBROUTINE
MAX6715A–MAX6729A/
MAX6797A
Dual/Triple, Ultra-Low-Voltage, SOT23 μP
Supervisory Circuits
www.maximintegrated.com Maxim Integrated
13
VCC1
VREF
VCC2
RSTIN/PFI
VREF VCC1
MR
VCC1
VCC1
VCC1
RESET
TIMEOUT
PERIOD
VCC2
RST
RST
PFO
WATCHDOG
TIMER WDI
VCC1
MR
PULLUP
RESET
OUTPUT
DRIVER
VREF/2
MAX6715A–MAX6729A/
MAX6797A
Dual/Triple, Ultra-Low-Voltage, SOT23 μP
Supervisory Circuits
www.maximintegrated.com Maxim Integrated
14
Functional Diagram
Note: The first “_ _” are placeholders for the threshold voltage
levels of the devices. Desired threshold levels are set by the part
number suffix found in the Reset Voltage Threshold Suffix Guide.
The “_” after the D is a placeholder for the reset timeout delay
time. Desired delay time is set using the timeout period suffix
found in the Reset Timeout Period Suffix Guide. For example,
the MAX6716AUTLTD3-T is a dual-voltage supervisor VTH1 =
4.625V, VTH2 = 3.075V, and 210ms (typ) timeout period.
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
PART
NUMBER
NUMBER OF
VOLTAGE
MONITORS
OPEN-
DRAIN
RESET
OPEN-
DRAIN
RESET
PUSH-
PULL
RESET
PUSH-
PULL
RESET
MANUAL
RESET
WATCH-
DOG
INPUT
POWER-FAIL
INPUT/
OUTPUT
MAX6715A 2 2
MAX6716A 2 2
MAX6717A 2 1
MAX6718A 2 1
MAX6719A 31
MAX6720A 3 1
MAX6721A 2 1
MAX6722A 2 1
MAX6723A 3 1 ————
MAX6724A 3 1
MAX6725A 31 1
MAX6726A 3 1 1
MAX6727A 32
MAX6728A 2 1 √ (open drain)
MAX6729A 2 1 √ (push-pull)
MAX6797A 2 1 √ (open drain)
PART TEMP RANGE PIN-
PACKAGE
MAX6720AUT_ _D_+T -40°C to +125°C 6 SOT23
MAX6721AUT_ _D_+T -40°C to +125°C 6 SOT23
MAX6722AUT_ _D_+T -40°C to +125°C 6 SOT23
MAX6723AUT_ _D_+T -40°C to +125°C 6 SOT23
MAX6724AUT_ _D_+T -40°C to +125°C 6 SOT23
MAX6725AKA_ _D_+T -40°C to +125°C 8 SOT23
MAX6726AKA_ _D_+T -40°C to +125°C 8 SOT23
MAX6727AKA_ _D_+T -40°C to +125°C 8 SOT23
MAX6728AKA_ _D_+T -40°C to +125°C 8 SOT23
MAX6729AKA_ _D_+T -40°C to +125°C 8 SOT23
MAX6797AKA_ _D_+T -40°C to +125°C 8 SOT23
MAX6715A–MAX6729A/
MAX6797A
Dual/Triple, Ultra-Low-Voltage, SOT23 μP
Supervisory Circuits
www.maximintegrated.com Maxim Integrated
15
Selector Guide
Ordering Information (continued)
Table 1. Reset Voltage Threshold Suffix
Guide**
Table 2. Reset Timeout Period Suffix
Guide
D7 and D8 timeout periods are only available for the MAX6797A.
Note: Standard versions are shown in bold and are available in
a D3 timeout option only. Standard versions require 2500-piece-
order increments and are typically held in sample stock. There is a
10,000 order increment on nonstandard versions. Other thresh-
old voltages may be available; contact factory for availability.
PART NUMBER
SUFFIX
(_ _)
VCC1 NOMINAL
VOLTAGE
THRESHOLD (V)
VCC2 NOMINAL
VOLTAGE
THRESHOLD (V)
LT 4.625 3.075
MS 4.375 2.925
MR 4.375 2.625
TZ 3.075 2.313
SY 2.925 2.188
RY 2.625 2.188
TW 3.075 1.665
SV 2.925 1.575
RV 2.625 1.575
TI 3.075 1.388
SH 2.925 1.313
RH 2.625 1.313
TG 3.075 1.110
SF 2.925 1.050
RF 2.625 1.050
TE 3.075 0.833
SD 2.925 0.788
RD 2.625 0.788
ZW 2.313 1.665
YV 2.188 1.575
ZI 2.313 1.388
YH 2.188 1.313
ZG 2.313 1.110
YF 2.188 1.050
ZE 2.313 0.833
YD 2.188 0.788
WI 1.665 1.388
VH 1.575 1.313
WG 1.665 1.110
VF 1.575 1.050
WE 1.665 0.833
VD 1.575 0.788
TIMEOUT
PERIOD SUFFIX
ACTIVE TIMEOUT PERIOD
MIN (ms) MAX (ms)
D1 1.1 2.2
D2 8.8 17.6
D717.5 35.0
D835.0 70.0
D3 140 280
D5 280 560
D6 560 1120
D4 1120 2240
MAX6715A–MAX6729A/
MAX6797A
Dual/Triple, Ultra-Low-Voltage, SOT23 μP
Supervisory Circuits
www.maximintegrated.com Maxim Integrated
16
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
5 SOT23 U5+1 21-0057 90-0174
6 SOT23 U6+1 21-0058 90-0175
8 SOT23 K8SN+1 21-0078 90-0176
GND
VCC2
1
+
6 VCC1
5
SOT23
TOP VIEW
2
3 4
RST1
MR
RST2
GND
VCC2
1 6 VCC1
5
SOT23
2
3 4
RST
MR
WDI GND
VCC2
1 6 VCC1
5
SOT23
2
3 4
RST
WDI
RSTIN
5 RSTINGND
VCC2
1 5 VCC1
SOT23
2
3 4
RST
MR
GND
VCC2
1 6 VCC1
SOT23
2
3 4
RST
MR
VCC2
MRRST
1
2
8
7
VCC1
RSTINGND
WDI
RST
SOT23
3
4
6
5
VCC2
MR
1
2
8
7
VCC1
RSTINGND
WDI
RST
SOT23
3
4
6
5
RST
VCC2
MR
1
2
8
7
VCC1
PFIGND
WDI
RST
SOT23
3
4
6
5
PFO
MAX6715A/
MAX6716A
MAX6721A/
MAX6722A
MAX6723A/
MAX6724A
MAX6717A/
MAX6718A
MAX6719A/
MAX6720A
MAX6725A/
MAX6726A
MAX6727A MAX6728A/
MAX6729A/
MAX6797A
+
+ +
+
+
+
+
MAX6715A–MAX6729A/
MAX6797A
Dual/Triple, Ultra-Low-Voltage, SOT23 μP
Supervisory Circuits
www.maximintegrated.com Maxim Integrated
17
Pin Congurations
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 4/06 Initial release
17/06 Updated Ordering Information 1, 15
26/08
Added the MAX6797A to Ordering Information, Electrical Characteristics, Pin
Description, Detailed Description, Figures 4 and 5, Selector Guide, Table 2,
Pin Congurations
1, 2, 6–11, 12, 15–17
3 9/08 Updated Selector Guide 15
43/14 Added automotive part to the Ordering Information table 1
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
MAX6715A–MAX6729A/
MAX6797A
Dual/Triple, Ultra-Low-Voltage, SOT23 μP
Supervisory Circuits
© 2014 Maxim Integrated Products, Inc.
18
Revision History
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Mouser Electronics
Authorized Distributor
Click to View Pricing, Inventory, Delivery & Lifecycle Information:
Maxim Integrated:
MAX6726AKAZWD2+T MAX6726AKAZWD3+T MAX6726AKAZWD5+T MAX6726AKAZWD6+T
MAX6727AKALTD1+T MAX6727AKALTD2+T MAX6727AKALTD3+T MAX6727AKALTD5+T MAX6727AKALTD6+T
MAX6727AKAMRD1+T MAX6727AKAMRD2+T MAX6727AKAMRD3+T MAX6727AKAMRD5+T
MAX6727AKAMRD6+T MAX6727AKAMSD1+T MAX6727AKAMSD2+T MAX6727AKAMSD3+T
MAX6727AKAMSD5+T MAX6727AKAMSD6+T MAX6727AKARDD1+T MAX6727AKARDD2+T
MAX6727AKARDD3+T MAX6727AKARDD5+T MAX6727AKARDD6+T MAX6727AKARFD1+T MAX6727AKARFD2+T
MAX6727AKARFD3+T MAX6727AKARFD5+T MAX6727AKARFD6+T MAX6727AKARHD1+T
MAX6727AKARHD2+T MAX6727AKARHD3+T MAX6727AKARHD5+T MAX6727AKARHD6+T
MAX6727AKARVD1+T MAX6727AKARVD2+T MAX6727AKARVD3+T MAX6727AKARVD5+T MAX6727AKARVD6+T
MAX6727AKARYD1+T MAX6727AKARYD2+T MAX6727AKARYD3+T MAX6727AKARYD5+T
MAX6727AKARYD6+T MAX6727AKASDD1+T MAX6727AKASDD2+T MAX6727AKASDD3+T MAX6727AKASDD5+T
MAX6727AKASDD6+T MAX6727AKASFD1+T MAX6727AKASFD2+T MAX6727AKASFD3+T
MAX6727AKASFD5+T MAX6727AKASFD6+T MAX6727AKASHD1+T MAX6727AKASHD2+T MAX6727AKASHD3+T
MAX6727AKASHD5+T MAX6727AKASHD6+T MAX6727AKASVD1+T MAX6727AKASVD2+T
MAX6727AKASVD3+T MAX6727AKASVD5+T MAX6727AKASVD6+T MAX6727AKASYD1+T MAX6727AKASYD2+T
MAX6727AKASYD3+T MAX6727AKASYD5+T MAX6727AKASYD6+T MAX6727AKATED1+T
MAX6727AKATED2+T MAX6727AKATED3+T MAX6727AKATED5+T MAX6727AKATED6+T MAX6727AKATGD1+T
MAX6727AKATGD2+T MAX6727AKATGD3+T MAX6727AKATGD5+T MAX6727AKATGD6+T
MAX6727AKATID1+T MAX6727AKATID2+T MAX6727AKATID3+T MAX6727AKATID5+T MAX6727AKATID6+T
MAX6727AKATWD1+T MAX6727AKATWD2+T MAX6727AKATWD3+T MAX6727AKATWD5+T
MAX6727AKATWD6+T MAX6727AKATZD1+T MAX6727AKATZD2+T MAX6727AKATZD3+T MAX6727AKATZD5+T
MAX6727AKATZD6+T MAX6727AKAVDD1+T MAX6727AKAVDD2+T MAX6727AKAVDD3+T
MAX6727AKAVDD5+T MAX6727AKAVDD6+T MAX6727AKAVFD1+T