IRLI3705N
HEXFET® Power MOSFET
PD - 9.1369B
S
D
G
VDSS = 55V
RDS(on) = 0.01Ω
ID = 52A
lLogic-Level Gate Drive
lAdvanced Process Technology
lIsolated Package
lHigh Voltage Isolation = 2.5KVRMS
lSink to Lead Creepage Dist. = 4.8mm
lFully Avalanche Rated
TO-220 FULLPAK
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The TO-220 Fullpak eliminates the need for additional
insulating hardware in commercial-industrial applications.
The moulding compound used provides a high isolation
capability and a low thermal resistance between the tab
and external heatsink. This isolation is equivalent to using
a 100 micron mica barrier with standard TO-220 product.
The Fullpak is mounted to a heatsink using a single clip or
by a single screw fixing.
8/25/97
Description
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 2.6
RθJA Junction-to-Ambient ––– 65
Thermal Resistance
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 52
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 37 A
IDM Pulsed Drain Current 310
PD @TC = 25°C Power Dissipation 58 W
Linear Derating Factor 0.39 W/°C
VGS Gate-to-Source Voltage ± 16 V
EAS Single Pulse Avalanche Energy 340 mJ
IAR Avalanche Current 46 A
EAR Repetitive Avalanche Energy5.8 mJ
dv /d t Peak Diode Recovery dv/dt 5.0 V/ns
TJOperating Junction and -55 to + 175
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case ) °C
Mounting torque, 6-32 or M3 srew 10 lbf•in (1.1N•m)
Absolute Maximum Ratings
°C/W
IRLI3705N
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 55 – – – –– – V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJBreakdown Voltage Temp. Coefficient ––– 0.056 ––– V/°C Reference to 25°C, ID = 1mA
––– ––– 0.010 VGS = 10V, ID = 28A
––– ––– 0.012 ΩVGS = 5.0V, ID = 28A
––– ––– 0.018 VGS = 4.0V, I D = 24A
VGS(th) Gate Threshold Voltage 1.0 ––– 2.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 50 ––– ––– S VDS = 25V, ID = 46A
––– ––– 25 µA VDS = 55V, VGS = 0V
––– ––– 250 VDS = 44V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– – –– 100 nA VGS = 16V
Gate-to-Source Reverse Leakage ––– – –– -100 VGS = -16V
QgTotal Gate Charge –– – ––– 98 ID = 46A
Qgs Gate-to-Source Charge ––– – –– 19 nC VDS = 44V
Qgd Gate-to-Drain ("Miller") Charge ––– – –– 4 9 VGS = 5.0V, See Fig. 6 and 13
td(on) Turn-On Delay Time ––– 12 – –– VDD = 28V
trRise Time ––– 140 ––– ns ID = 46A
td(off) Turn-Off Delay Time ––– 37 – –– RG = 1.8Ω, VGS = 5.0V
tfFall Time ––– 78 ––– RD = 0.59Ω, See Fig. 10
Between lead,
6mm (0.25in.)
from package
and center of die contact
Ciss Input Capacitance ––– 3600 ––– VGS = 0V
Coss Output Capacitance ––– 870 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 320 ––– ƒ = 1.0MHz, See Fig. 5
C Drain to Sink Capacitance ––– 12 – –– ƒ = 1.0MHz
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
IGSS
IDSS Drain-to-Source Leakage Current
LDInternal Drain Inductance ––– 4.5 –––
LSInternal Source Inductance ––– 7.5 –––
RDS(on) Static Drain-to-Source On-Resistance
nH
pF
S
D
G
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode) ––– ––– showing the
ISM Pulsed Source Current integral reverse
(Body Diode)
––– ––– p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 28A, VGS = 0V
trr Reverse Recovery Time ––– 94 1 4 0 ns TJ = 25°C, IF = 46A
Qrr Reverse RecoveryCharge ––– 290 44 0 nC di/dt = 100A/µs
S
D
G
A
52
310
Source-Drain Ratings and Characteristics
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
VDD = 25V, starting TJ = 25°C, L = 320µH
RG = 25Ω, IAS = 46A. (See Figure 12)
Notes:
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Uses IRL3705N data and test conditions
ISD ≤ 46A, di/dt ≤ 250A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
t=60s, ƒ=60Hz
IRLI3705N
Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
1
10
100
1000
0.1 1 10 100
I , Drain-to-Source Current (A)
D
V , D ra in-to-So urc e V olta ge (V)
DS
A
20µs PULSE WIDTH
T = 25°C
J
V GS
TO P 15 V
1 2V
1 0V
8 .0 V
6 .0 V
4 .0 V
3 .0 V
BO TTOM 2.5 V
2.5V
1
10
100
1000
0.1 1 10 100
I , D rain-to-So urce C urrent (A )
D
V , D ra in-to-So urc e V olta ge (V)
DS
A
20µs PULSE WIDTH
T = 175°C
V GS
TO P 15 V
1 2V
1 0V
8 .0 V
6 .0 V
4 .0 V
3 .0 V
BO TTOM 2.5 V
2.5V
J
1
10
100
1000
2.0 3.0 4.0 5.0 6.0 7.0 8.0
T = 25°C
J
GS
V , Ga te-to -So u r ce Vo lta g e ( V )
D
I , Dr a in-to - Sourc e Cu rre nt (A )
T = 175°C
J
A
V = 25 V
20µs PULSE W IDTH
DS
0.0
0.5
1.0
1.5
2.0
2.5
3.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
J
T , Ju nc t io n T em per atu re ( °C )
R , D rain -to -Sourc e On R e sistan ce
DS(on)
(Normalized)
V = 1 0V
GS
A
I = 7 7A
D
IRLI3705N
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 8. Maximum Safe Operating Area
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
0
1000
2000
3000
4000
5000
6000
1 10 100
C, Ca pacitance (pF)
DS
V , Dr ain-to-S ou rc e Voltage ( V )
A
V = 0 V, f = 1MHz
C = C + C , C SHORTED
C = C
C = C + C
GS
iss gs gd ds
rs s g d
oss ds gd
C
iss
C
oss
C
rss
0
3
6
9
12
15
0 20 40 60 80 100 120 140
Q , T ota l Gate C h arge (n C )
G
V , Gate-to -S ou rc e Voltage (V)
GS
A
FO R TEST CIRCUIT
SEE FIG URE 13
I = 46A V = 4 4V
V = 2 8V
DDS
DS
10
100
1000
0.4 0.8 1.2 1.6 2.0 2.4 2.8
T = 25°C
J
V = 0V
GS
V , Source-to-Drain Voltage (V)
I , R ev erse D rain C u rren t (A )
SD
SD
A
T = 175°C
J
1
10
100
1000
1 10 100
V , D ra in-to-S o urc e Vo ltag e (V)
DS
I , Drain Cu rrent (A)
OPERAT ION IN THIS AREA L IMITED
BY R
D
DS(on)
10µs
100µs
1ms
10ms
A
T = 2 5° C
T = 1 75 ° C
Single Pulse
C
J
IRLI3705N
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RGD.U.T.
5.0V
+
-
VDD
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
25 50 75 100 125 150 175
0
10
20
30
40
50
60
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1 10
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
IRLI3705N
Q
G
Q
GS
Q
GD
V
G
Charge
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
5.0 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
0
200
400
600
800
25 50 75 100 125 150 175
J
E , S ingle Pu lse Ava lanche E nerg y (m J)
AS
A
Starting T , Junction Temperature (°C)
V = 25 V
I
T OP 19A
3 3 A
BOTTOM 46A
DD
D
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
RG
IAS
0.01
Ω
t
p
D.U.T
L
VDS
+
-VDD
DRIVER
A
15V
20V
IRLI3705N
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current Body Diode Forward
Current
VGS=10V
VDD
ISD
Driver Gate Drive
D.U.T. ISD Waveform
D.U.T. VDS Waveform
Inductor Curent
D = P.W.
Period
+
-
+
+
+
-
-
-
Fig 14. For N-Channel HEXFETS
* VGS = 5V for Logic Level Devices
Peak Diode Recovery dv/dt Test Circuit
RGVDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
*
IRLI3705N
PART NUM BER
INTERNATIONAL
RE C T IFIE R
L OG O
EX AM PLE : THIS IS AN IRF1010
WITH ASSEMBLY
L OT C OD E 9 B1 M
ASSEM BLY
L OT C OD E
DATE CODE
(YYWW)
YY = YEAR
WW = WEEK
9246
IRF1010
9 B 1 M
A
Part Marking Information
TO-220 Fullpak
Package Outline
TO-220 Fullpak Outline
Dimensions are shown in millimeters (inches)
LEAD ASSIGNM EN T S
1 - G ATE
2 - DRA IN
3 - SO URCE
NOTES:
1 DIME NSION ING & TOLERANCING
PER AN SI Y1 4.5M, 1982
2 CO NTROLL ING DIMEN SION: INCH.
D
C
AB
MINIMUM CRE EPAGE
DISTA NCE BETW E EN
A-B-C -D = 4.80 (.189)
3X
2.85 (.112)
2.65 (.104)
2.80 (.110)
2.60 (.102)
4.80 (.189 )
4.60 (.181 )
7.10 (.280 )
6.70 (.263 )
3.40 (.133)
3.10 (.123)
ø
- A -
3.70 (.145)
3.20 (.126)
1.15 (.045)
MIN.
3.30 (.130)
3.10 (.122)
- B -
0. 90 (. 035)
0. 70 (. 028)
3X
0.25 (.010) MA M B
2.54 (.100)
2 X
3X
13.70 (.540)
13.50 (.530)
16.00 (.630)
15.80 (.622)
1 2 3
10.60 (.417 )
10.40 (.409 )
1.40 (.05 5)
1.05 (.04 2)
0.48 (.019 )
0.44 (.017 )
PA RT NU M BE R
INTERNATIONAL
RECTIFIE R
L O GO
D ATE CODE
(YYWW )
YY = YEAR
WW = WEEK
ASS E M BL Y
L O T CO D E
E401 9245
IRFI840G
EXAM PLE : T HIS IS AN IRFI840G
WITH ASS E M BL Y
LOT C OD E E4 01
A
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ki, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/ Data and specifications subject to change without notice. 8/97
