TDA2030V - STMicroelectronics

June 2011 Doc ID 1458 Rev 3 1/17

TDA2030

14 W hi-fi audio amplifier

Features

■Wide-range supply voltage, up to 36 V

■Single or split power supply

■Short-circuit protection to ground

■Thermal shutdown

Description

The TDA2030 is a monolithic integrated circuit in

the Pentawatt® package, intended for use as a

low frequency class-AB amplifier. Typically it

provides 14 W output power (d = 0.5%) at

14 V/4 Ω. At ±14 V or 28 V, the guaranteed output

power is 12 W on a 4 Ω load and 8 W on an 8 Ω

(DIN45500).

The TDA2030 provides high output current and

has very low harmonic and crossover distortion.

Furthermore, the device incorporates an original

(and patented) short-circuit protection system

comprising an arrangement for automatically

limiting the dissipated power so as to keep the

operating point of the output transistors within

their safe operating range. A conventional thermal

shutdown system is also included.

Figure 1. Ex: Functional block diagram

Table 1. Device summary

Order code Package

TDA2030H Pentawatt horizontal

Pentawatt (horizontal)

www.st.com

Device overview TDA2030

2/17 Doc ID 1458 Rev 3

1 Device overview

Figure 2. Pin connections (top view)

Figure 3. Test circuit

TDA2030 Electrical specifications

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2 Electrical specifications

2.1 Absolute maximum ratings

2.2 Thermal data

2.3 Electrical characteristics

Refer to the test circuit in Figure 3; VS = ±14 V, Tamb = 25°C unless otherwise specified.

Table 2. Absolute maximum ratings

Symbol Parameter Value Unit

VsSupply voltage ±18 (36) V

ViInput voltage Vs

ViDifferential input voltage ±15 V

IoOutput peak current internally limited) 3.5 A

Ptot Power dissipation at Tcase = 90 °C 20 W

Tstg, TjStorage and junction temperature -40 to 150 °C

Table 3. Thermal data

Symbol Parameter Value Unit

Rth j-case Thermal resistance junction-case max 3 C

Table 4. Electrical characteristics

Symbol Parameter Test conditions Min. Typ. Max. Unit

Vs Supply voltage ± 6

± 18

36 V

IdQuiescent drain current

Vs = ± 18 (Vs = 36)

40 60 mA

IbInput bias current 0.2 2 μA

VOS Input offset voltage ± 2 ± 20 mV

IOS Input offset current ± 20 ± 200 nA

Po Output power

d = 0.5%, f = 40 to 15,000 Hz;

GV = 30 dB

RL = 4 Ω

RL = 8 Ω

d = 10%, f =1 kHz; GV = 30 dB

RL = 4 Ω

RL = 8 Ω

Electrical specifications TDA2030

4/17 Doc ID 1458 Rev 3

d Distortion

Po = 0.1 to 12 W, RL = 4 Ω,

GV = 30 dB

f = 40 to 15.000 Hz

0.2 0.5 %

Po = 0.1 to 8 W, RL = 8 Ω,

GV = 30 dB

f = 40 to 15.000 Hz

0.1 0.5 %

BFrequency response

(–3 dB)

Po = 12 W, RL = 4 Ω;

GV = 30 dB 10 Hz to 140 Hz

RiInput resistance (pin 1) 0.5 5 MΩ

Gv Voltage gain (open loop) 90 dB

Gv Voltage gain (closed loop) f = 1 kHz 29.5 30 30.5 dB

eNInput noise voltage B = 22 Hz to 22 kHz 310µV

iNInput noise current 80 200 pA

SVR Supply voltage rejection

GV = 30 dB; RL = 4 Ω,

Rg = 22 kΩ, fripple = 100 Hz;

Vripple = 0.5 Veff

40 50 dB

Id Drain current Po = 14 W, RL = 4 Ω

Po = 9 W, RL = 8 Ω

900

500 mA

TjThermal shutdown junction

temperature 145 °C

Table 4. Electrical characteristics (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

TDA2030 Electrical specifications

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2.4 Characterizations

Figure 4. Output power vs. supply voltage Figure 5. Output power vs. supply voltage

Figure 6. Distortion vs. output power Figure 7. Distortion vs. output power

Electrical specifications TDA2030

6/17 Doc ID 1458 Rev 3

Figure 8. Distortion vs. output power Figure 9. Distortion vs. frequency

Figure 10. Distortion vs. frequency Figure 11. Frequency response with different

values of the rolloff capacitor C8

(see typical amplifier with split

power supply)

TDA2030 Electrical specifications

Doc ID 1458 Rev 3 7/17

Figure 12. Quiescent current vs. supply

voltage

Figure 13. Supply voltage rejection vs. voltage

gain

Figure 14. Power dissipation and efficiency

vs. output power

Figure 15. Maximum power dissipation vs.

supply voltage (sine wave

operation)

Applications TDA2030

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3 Applications

Figure 16. Typical amplifier with split power

supply

Figure 17. Typical amplifier with single power

supply

Figure 18. PC board and component layout for

a typical amplifier with split power

supply

Figure 19. PC board and component layout for

a typical amplifier with single power

supply

TDA2030 Applications

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Figure 20. Bridge amplifier configuration with split power supply (Po = 28 W, Vs = ±14 V)

Practical considerations TDA2030

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4 Practical considerations

4.1 Printed circuit board

The layout shown in Figure 19 should be adopted by the designers. If different layouts are

used, the ground points of input 1 and input 2 must be well decoupled from the ground

return of the output in which a high current flows.

4.2 Assembly suggestion

No electrical isolation is needed between the package and the heatsink with single supply

voltage configuration.

4.3 Application suggestions

The recommended values of the components are those shown on application circuit of

Figure 16. However, if different values are chosen, then the following table can be helpful.

Table 5. Variations from recommended values

Component Recommanded

value Purpose Larger than

recommanded value

Smaller than

recommanded value

R122 kΩClosed loop gain setting Increase of gain Decrease in gain(1)

R2680 ΩClosed loop gain setting Decrease of gain(1) Increase in gain

R322 kΩNon-inverting input biasing Increase of input

impedance

Decrease in input

impedance

R41 ΩFrequency stability

Danger of oscillation at

high frequencies with

inductive loads

R53 R2Upper frequency cutoff Poor high-frequency

attenuation Danger of oscillation

C11 µF Input DC decoupling Increase in low-

frequency cutoff

C222 µF Inverting input DC

decoupling

Increase in low-

frequency cutoff

C3C40.1 µF Supply voltage bypass Danger of oscillation

C5C6100 µF Supply voltage bypass Danger of oscillation

C70.22 µF Frequency stability Danger of oscillation

C8Upper frequency cutoff Smaller bandwidth Larger bandwidth

D1D21N4001 To protect the device against output voltage spikes

1. Closed loop gain must be higher than 24 dB

2πBR1

------------------

TDA2030 Practical considerations

Doc ID 1458 Rev 3 11/17

Table 6. Single supply application

Component Recommanded

value Purpose Larger than

recommanded value

Smaller than

recommanded value

R1150 kΩClosed loop gain setting Increase in gain Decrease in gain(1)

R24.7 kΩClosed loop gain setting Decrease in gain(1) Increase in gain

R3100 kΩNon-inverting input biasing Increase of input

impedance

Decrease in input

Impedance

R41 ΩFrequency stability

Danger of oscillation at

high frequencies with

inductive loads

RA/RB100 kΩNon-inverting input biasing Poor high-frequency

attenuation Danger of oscillation

C11 µF Input DC decoupling Increase in low-

frequency cutoff

C222 µF Inverting DC decoupling Increase in low-

frequency cutoff

C30.1 µF Supply voltage bypass Danger of oscillation

C5100 µF Supply voltage bypass Danger of oscillation

C70.22 µF Frequency stability Danger of oscillation

C8Upper frequency cutoff Smaller bandwidth Larger bandwidth

D1D21N4001 To protect the device against output voltage spikes.

1. Closed loop gain must be higher than 24 dB

2πBR1

------------------

Short-circuit protection TDA2030

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5 Short-circuit protection

The TDA2030 has an original circuit which limits the current of the output transistors.

Figure 21 shows that the maximum output current is a function of the collector emitter

voltage; hence the output transistors work within their safe operating area (Figure 5).

This function can therefore be considered as being peak power limiting rather than simple

current limiting.

It reduces the possibility that the device gets damaged during an accidental short-circuit

from AC output to ground.

Figure 21. Maximum output current vs.

voltage [VCEsat] across each output

transistor

Figure 22. Safe operating area and collector

characteristics of the protected

power transistor

TDA2030 Thermal shutdown

Doc ID 1458 Rev 3 13/17

6 Thermal shutdown

The presence of a thermal limiting circuit offers the following advantages:

1. An overload on the output (even if it is permanent), or an above limit ambient

temperature can be easily supported since Tj cannot be higher than 150°C.

2. The heatsink can have a smaller factor of safety compared with that of a conventional

circuit. There is no possibility of device damage due to high junction temperature. If for

any reason, the junction temperature increases to 150°C, the thermal shutdown simply

reduces the power dissipation at the current consumption.

The maximum allowable power dissipation depends upon the size of the external heatsink

(i.e. its thermal resistance); Figure 25 shows this power dissipation as a function of ambient

temperature for different thermal resistances.

Figure 23. Output power and drain current vs.

case temperature (RL = 4 Ω)

Figure 24. Output power and drain current vs.

case temperature (RL = 8 Ω)

Thermal shutdown TDA2030

14/17 Doc ID 1458 Rev 3

The following table shows the length that the heatsink in Figure 26 must have for several

values of Ptot and Rth.

Figure 25. Maximum allowable power

dissipation vs. ambient

temperature

Figure 26. Example of heatsink

Table 7. Recommended values of heatsink

Dimension Recommended values Unit

Ptot 12 8 6 W

Length of heatsink 60 40 30 mm

Rth of heatsink 4.2 6.2 8.3 °C/W

TDA2030 Package mechanical data

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7 Package mechanical data

Figure 27. Pentawatt (horizontal) package outline and dimensions

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®

specifications, grade definitions and product status are available at: www.st.com.

ECOPACK® is an ST trademark.

OUTLINE AND

MECHANICAL DATA

L3 L2

L4 L5

Resin between

leads L6

L10

Dia.

PENTHME.EPS

DIM. mm inch

MIN. TYP. MAX. MIN. TYP. MAX.

A 4.80 0.188

C 1.37 0.054

D 2.40 2.80 0.094 0.11

D1 1.20 1.35 0.047 0.053

E 0.35 0.55 0.014 0.022

F 0.80 1.05 0.031 0.041

F1 1.00 1.40 0.039 0.055

G 3.20 3.40 3.60 0.126 0.134 0.142

G1 6.60 6.80 7.00 0.260 0.267 0.275

H2 10.40 0.41

H3 10.05 10.40 0.395 0.409

L 14.20 15.00 0.56 0.59

L1 5.70 6.20 0.224 0.244

L2 14.60 15.20 0.574 0.598

L3 3.50 4.10 0.137 .161

L4 1.29 0.05

L5 2.60 3.00 0.102 0.118

L6 15.10 15.80 0.594 0.622

L7 6.00 6.60 0.236 0.260

L9 2.10 2.70 0.083 0.106

L10 4.30 4.80 0.170 0.189

DIA 3.65 3.85 0.143 0.151

Pentawatt H

0015982

Revision history TDA2030

16/17 Doc ID 1458 Rev 3

8 Revision history

Table 8. Document revision history

Date Revision Changes

June 1998 2 Second issue

21-Jun-2011 3

Added Features on page 1

Removed Pentawatt (vertical) package option

Replaced Figure 27 with Pentawatt (horizontal) package data

Updated presentation of document, minor textual changes

TDA2030

Doc ID 1458 Rev 3 17/17

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