EDI88257CA
March 2011 © 2011 Microsemi Corporation. All rights reserved. 1 Microsemi Corporation • (602) 437-1520 • www.whiteedc.com
Rev. 4 www.microsemi.com
Microsemi Corporation reserves the right to change products or specifi cations without notice.
32
31
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17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
VCC
A15
A17
WE#
A13
A8
A9
A11#
OE
A10
CS#
I/O7
I/O6
I/O5
I/O4
I/O3
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
VSS
256Kx8 Monolithic SRAM
FEATURES
Access Times of 20, 25, 35, 45, 55ns
Data Retention Function (LPA Versions)
TTL Compatible Inputs and Outputs
Fully Static, No Clocks
Organized as 256Kx8
Commercial, Industrial and Military Temperature Ranges
JEDEC Approved Evolutionary Pinout
• 32 pin Ceramic DIP, 0.6 mils wide (Package 9)
Single +5V (±10%) Supply Operation
The EDI88257CA is a 2 Megabit 256Kx8 bit Monolithic CMOS
Static RAM.
The 32 pin DIP pinout adheres to the JEDEC evolutionary standard
for the two megabit device. The device is upgradeable to the
512Kx8 SRAM, the EDI88512CA. Pin 1 becomes the higher order
address.
A Low Power version, EDI88257LPA, offers a data retention
function for battery back-up opperation. Military product is available
compliant to Appendix A of MIL-PRF-38535.
This product is subject to change without notice.
FIGURE 1 – PIN CONFIGURATION
32 DIP
TOP VIEW
BLOCK DIAGRAM
Memory Array
Address
Buffer
Address
Decoder
I/O
Circuits
A0-17 I/O0-7
WE#
CS
OE#
PIN DESCRIPTION
I/O0-7 Data Inputs/Outputs
A0-17 Address Inputs
WE# Write Enable
CS# Chip Selects
OE# Output Enable
VCC Power (+5V ±10%)
VSS Ground
NC Not Connected
EDI88257CA
March 2011 © 2011 Microsemi Corporation. All rights reserved. 2 Microsemi Corporation • (602) 437-1520 • www.whiteedc.com
Rev. 4 www.microsemi.com
Microsemi Corporation reserves the right to change products or specifi cations without notice.
ABSOLUTE MAXIMUM RATINGS
Parameter Value Unit
Voltage on any pin relative to Vss -0.5 to 7.0 V
Operating Temperature TA (Ambient)
Industrial -40 to +85 °C
Military -55 to +125 °C
Storage Temperature, Ceramic -65 to +150 °C
Power Dissipation 1.5 W
Output Current 20 mA
Junction Temperature, TJ175 °C
NOTE:
Stress greater than those listed under “Absolute Maximum Ratings” may cause permanent damage
to the device. This is a stress rating only and func tion al operation of the device at these or any other
conditions greater than those in di cat ed in the operational sections of this spec i fi ca tion is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect reliability.
TRUTH TABLE
OE# CS# WE# Mode Output Power
X H X Standby High Z ICC2, ICC3
H L H Output Deselect High Z ICC1
L L H Read Data Out ICC1
X L L Write Data In ICC1
RECOMMENDED OPERATING CONDITIONS
Parameter Symbol Min Typ Max Unit
Supply Voltage VCC 4.5 5.0 5.5 V
Supply Voltage VSS 000V
Input High Voltage VIH 2.2 — VCC +0.5 V
Input Low Voltage VIL -0.3 — +0.8 V
CAPACITANCE
Parameter Symbol Condition Max Unit
Address Lines CIVIN = Vcc or Vss, f = 1.0MHz 12 pF
Data Lines COVOUT = Vcc or Vss, f = 1.0MHz 14 pF
These parameters are sampled, not 100% tested.
Input Pulse Levels VSS to 3.0V
Input Rise and Fall Times 5ns
Input and Output Timing Levels 1.5V
Output Load Figure 1
NOTE: For tEHQZ, tGHQZ and tWLQZ, CL = 5pF Figure 2
30pF
480Ω
Vcc
Q
Figure
1
Figure
2
255Ω 5pF
480Ω
Vcc
Q
255Ω
AC TEST CONDITIONS
DC CHARACTERISTICS
VCC = 5V, TA = +25°C
Parameter Symbol Conditions Min Typ Max Units
Input Leakage Current ILI VIN = 0V to VCC -10 — +10 μA
Output Leakage Current ILO VI/O = 0V to VCC -10 — +10 μA
Operating Power Supply Current ICC1 WE#, CS# = VIL, II/O = 0mA, Min Cycle (20-25ns) — 225 mA
(35-55ns) — 200 mA
Standby (TTL) Power Supply Current ICC2 CS# ≥ VIH, VIN ≤ VIL, VIN ≥ VIH —60mA
Full Standby Power Supply Current ICC3 CS# ≥ VCC -0.2V
VIN ≥ Vcc -0.2V or VIN ≤ 0.2V
C——25mA
LP — — 20 mA
Output Low Voltage VOL IOL = 8.0mA — — 0.4 V
Output High Voltage VOH IOH = -4.0mA 2.4 — — V
EDI88257CA
March 2011 © 2011 Microsemi Corporation. All rights reserved. 3 Microsemi Corporation • (602) 437-1520 • www.whiteedc.com
Rev. 4 www.microsemi.com
Microsemi Corporation reserves the right to change products or specifi cations without notice.
AC CHARACTERISTICS – READ CYCLE
VCC = 5.0V, Vss = 0V, -55°C ≤ TA ≤ +125°C
Parameter
Symbol 20ns 25ns 35ns 45ns 55ns
UnitsJEDEC Alt. Min Max Min Max Min Max Min Max Min Max
Read Cycle Time tAVAV tRC 20 25 35 45 55 ns
Address Access Time tAVQV tAA 20 25 35 45 55 ns
Chip Enable Access Time tELQV tACS 20 25 35 45 55 ns
Chip Enable to Output in Low Z (1) tELQX tCLZ 33333ns
Chip Disable to Output in High Z (1) tEHQZ tCHZ 0 8 010015020020ns
Output Hold from Address Change tAVQX tOH 00000ns
Output Enable to Output Valid tGLQV tOE 10 12 15 25 25 ns
Output Enable to Output in Low Z (1) tGLQX tOLZ 00000ns
Output Disable to Output in High Z(1) tGHQZ tOHZ 0 8 010015020020ns
1. This parameter is guaranteed by design but not tested.
AC CHARACTERISTICS – WRITE CYCLE
VCC = 5.0V, VSS = 0V, -55°C ≤ TA ≤ +125°C
Parameter
Symbol 20ns 25ns 35ns 45ns 55ns
UnitsJEDEC Alt. Min Max Min Max Min Max Min Max Min Max
Write Cycle Time tAVAV tWC 20 25 35 45 55 ns
Chip Enable to End of Write tELWH
tELEH
tCW
tCW
15
15
17
17
25
25
30
30
30
30
ns
ns
Address Setup Time tAVWL
tAVEL
tAS
tAS
0
0
0
0
0
0
0
0
0
0
ns
ns
Address Valid to End of Write tAVWH
tAVEH
tAW
tAW
15
15
17
17
25
25
30
30
30
30
ns
ns
Write Pulse Width tWLWH
tWLEH
tWP
tWP
15
15
17
17
25
25
30
30
30
30
ns
ns
Write Recovery Time tWHAX
tEHAX
tWR
tWR
0
0
0
0
0
0
0
0
0
0
ns
ns
Data Hold Time tWHDX
tEHDX
tDH
tDH
0
0
0
0
0
0
0
0
0
0
ns
ns
Write to Output in High Z (1) tWLQZ tWHZ 030030025030030ns
Data to Write Time tDVWH
tDVEH
tDW
tDW
10
10
12
12
20
20
25
25
25
25
ns
ns
Output Active from End of Write (1) tWHQX tWLZ 00000ns
1. This parameter is guaranteed by design but not tested.
EDI88257CA
March 2011 © 2011 Microsemi Corporation. All rights reserved. 4 Microsemi Corporation • (602) 437-1520 • www.whiteedc.com
Rev. 4 www.microsemi.com
Microsemi Corporation reserves the right to change products or specifi cations without notice.
A
DDRESS
DATA I/O
READ CYCLE 1 (WE# HIGH; OE#, CS# LOW)
tAVQX
tAVQV
tAVAV
DATA 2
ADDRESS 1 ADDRESS 2
DATA 1
ADDRESS
DATA OUT
READ CYCLE 2 (WE# HIGH)
tAVQV
tELQV
tGLQV
tELQX
tGLQX
tAVAV
tEHQZ
tGHQZ
OE#
CS#
FIGURE 2 – TIMING WAVEFORM – READ CYCLE
WRITE CYCLE 2, CS# CONTROLLED
tAVEH
tELEH
tEHAX
tWLEH
tDVEH tEHDX
tAVAV
DATA VALID
HIGH Z
DATA OUT
tAVEL
ADDRESS
DATA IN
WE#
CS#
FIGURE 4 – WRITE CYCLE – CS# CONTROLLED
FIGURE 3 – WRITE CYCLE – WE# CONTROLLED
ADDRESS
DATA IN
WRITE CYCLE 1, WE# CONTROLLED
tAVWH
tELWH
tWHAX
tWLWH
tDVWH
tWLQZ tWHQX
tAVWL
tWHDX
tAVAV
DATA VALID
HIGH Z
WE#
CS#
DATA OUT
EDI88257CA
March 2011 © 2011 Microsemi Corporation. All rights reserved. 5 Microsemi Corporation • (602) 437-1520 • www.whiteedc.com
Rev. 4 www.microsemi.com
Microsemi Corporation reserves the right to change products or specifi cations without notice.
FIGURE 5 – DATA RETENTION – CS# CONTROLLED
DATA RETENTION MODE
CS# = VCC -0.2V
VCC
CS#
tCDR
VCC
4.5V 4.5V
tR
DATA RETENTION, CS# CONTROLLED
DATA RETENTION CHARACTERISTICS (EDI88512LP ONLY)
-55°C ≤ TA ≤ +125°
Characteristic
Low Power Version only Sym Conditions Min Typ Max Units
Data Retention Voltage
Data Retention Quiescent Current
VCC
ICCDR
VCC = 2.0V
CS# VCC - 0.2V
20
—
—
—
—
2
V
mA
Chip Disable to Data Retention Time
Operation Recovery Time
tCDR
TR
VIN VCC - = 2.0V
or VIN 0.2V
0
tAVAV
—
—
—
—
ns
ns
EDI88257CA
March 2011 © 2011 Microsemi Corporation. All rights reserved. 6 Microsemi Corporation • (602) 437-1520 • www.whiteedc.com
Rev. 4 www.microsemi.com
Microsemi Corporation reserves the right to change products or specifi cations without notice.
Pin 1 Indicator
0.020
0.016
0.200
0.125
0.100
TYP
15 x 0.100 = 1.500
0.155
0.115
1.616
1.584
0.061
0.017
0.600
NOM
0.060
0.040
0.620
0.600
PACKAGE 9: 32 PIN SIDEBRAZED CERAMIC DIP (600mils wide)
ALL DIMENSIONS ARE IN INCHES
EDI88257CA
March 2011 © 2011 Microsemi Corporation. All rights reserved. 7 Microsemi Corporation • (602) 437-1520 • www.whiteedc.com
Rev. 4 www.microsemi.com
Microsemi Corporation reserves the right to change products or specifi cations without notice.
ORDERING INFORMATION
MICROSEMI CORPORATION
SRAM
ORGANIZATION, 256Kx8
TECHNOLOGY:
CA = CMOS Standard Power
LPA = Low Power
ACCESS TIME (ns)
PACKAGE TYPE:
C = 32 lead Sidebrazed DIP, 600 mil (Package 9)
DEVICE GRADE:
B = MIL-STD-883 Compliant
M = Military Screened -55°C to +125°C
I = Industrial -40°C to +85°C
C = Commercial 0°C to +70°C
EDI 8 8 257 CA X X X
EDI88257CA
March 2011 © 2011 Microsemi Corporation. All rights reserved. 8 Microsemi Corporation • (602) 437-1520 • www.whiteedc.com
Rev. 4 www.microsemi.com
Microsemi Corporation reserves the right to change products or specifi cations without notice.
Document Title
256M x 8 Monolithic SRAM
Revision History
Rev # History Release Date Status
Rev 3 Changes (Pg. 5)
3.1 In data retention characteristics (EDI88512LP only), change data retention
quiescent current from μA to mA
March 2009 Final
Rev 4 Changes (Pg. 1-8)
4.1 Change document layout from White Electronic Designs to Microsemi
March 2011 Final
