Semiconductor Components Industries, LLC, 2001
February, 2001 – Rev. 2 1Publication Order Number:
NTMS4N01R2/D
NTMS4N01R2
Power MOSFET
4.2 Amps, 20 Volts
N–Channel Enhancement–Mode
Single SO–8 Package
Features
•High Density Power MOSFET with Ultra Low RDS(on) Providing
Higher Efficiency
•Miniature SO–8 Surface Mount Package Saving Board Space;
Mounting Information for the SO–8 Package is Provided
•IDSS Specified at Elevated Temperature
•Drain–to–Source Avalanche Energy Specified
•Diode Exhibits High Speed, Soft Recovery
Applications
•Power Management in Portable and Battery–Powered Products, i.e.:
Computers, Printers, PCMCIA Cards, Cellular & Cordless Telephones
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating Symbol Value Unit
Drain–to–Source Voltage VDSS 20 V
Drain–to–Gate Voltage (RGS = 1.0 m) VDGR 20 V
Gate–to–Source Voltage – Continuous VGS ±10 V
Thermal Resistance –
Junction–to–Ambient (Note 1.)
Total Power Dissipation @ TA = 25°C
Continuous Drain Current @ 25°C
Continuous Drain Current @ 70°C
Pulsed Drain Current (Note 4.)
RθJA
PD
ID
ID
IDM
50
2.5
5.9
4.7
25
°C/W
W
A
A
A
Thermal Resistance –
Junction–to–Ambient (Note 2.)
Total Power Dissipation @ TA = 25°C
Continuous Drain Current @ 25°C
Continuous Drain Current @ 70°C
Pulsed Drain Current (Note 4.)
RθJA
PD
ID
ID
IDM
100
1.25
4.2
3.3
20
°C/W
W
A
A
A
Thermal Resistance –
Junction–to–Ambient (Note 3.)
Total Power Dissipation @ TA = 25°C
Continuous Drain Current @ 25°C
Continuous Drain Current @ 70°C
Pulsed Drain Current (Note 4.)
RθJA
PD
ID
ID
IDM
162
0.77
3.3
2.6
15
°C/W
W
A
A
A
Operating and Storage
Temperature Range TJ, Tstg –55 to
+150 °C
Single Pulse Drain–to–Source Avalanche
Energy – Starting TJ = 25°C
(VDD = 20 Vdc, VGS = 5.0 Vdc, Peak IL
= 7.5 Apk, L = 6 mH, RG = 25 Ω)
EAS 169 mJ
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 seconds TL260 °C
1. Mounted onto a 2″ square FR–4 Board (1″ sq. 2 oz Cu 0.06″ thick single
sided), t ≤ 10 seconds.
2. Mounted onto a 2″ square FR–4 Board (1″ sq. 2 oz Cu 0.06″ thick single
sided), t = steady state.
3. Minimum FR–4 or G–10 PCB, t = Steady State.
4. Pulse Test: Pulse Width = 300 s, Duty Cycle = 2%. Device Package Shipping
ORDERING INFORMATION
NTMS4N01R2 SO–8 2500/Tape & Reel
SO–8
CASE 751
STYLE 13
1
http://onsemi.com
Single N–Channel
D
S
G
8
2
N.C.
Source
Source
Gate
3
4
1
7
6
5
8Drain
Drain
Drain
Drain
Top View
MARKING DIAGRAM
& PIN ASSIGNMENT
E4N01
LYWW
E4N01 = Device Code
L = Assembly Location
Y = Year
WW = Work Week
4.2 AMPERES
20 VOLTS
0.045 @ VGS = 4.5 V
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2
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) *
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain–to–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 250 µAdc)
Temperature Coefficient (Positive)
V(BR)DSS 20
––
20 –
–
Vdc
mV/°C
Zero Gate Voltage Drain Current
(VDS = 12 Vdc, VGS = 0 Vdc, TJ = 25°C)
(VDS = 12 Vdc, VGS = 0 Vdc, TJ = 125°C)
(VDS = 20 Vdc, VGS = 0 Vdc, TJ = 25°C)
IDSS –
–
–
–
–
0.2
1.0
10
–
µAdc
Gate–Body Leakage Current
(VGS = +10 Vdc, VDS = 0 Vdc) IGSS – – 100 nAdc
Gate–Body Leakage Current
(VGS = –10 Vdc, VDS = 0 Vdc) IGSS – – –100 nAdc
ON CHARACTERISTICS
Gate Threshold Voltage
(VDS = VGS, ID = 250 µAdc)
Temperature Coefficient (Negative)
VGS(th) 0.6
–0.95
–3.0 1.2
–
Vdc
mV/°C
Static Drain–to–Source On–State Resistance
(VGS = 4.5 Vdc, ID = 4.2 Adc)
(VGS = 2.7 Vdc, ID = 2.1 Adc)
(VGS = 2.5 Vdc, ID = 2.0 Adc)
RDS(on) –
–
–
0.030
0.035
0.037
0.04
0.05
–
Ω
Forward Transconductance (VDS = 2.5 Vdc, ID = 2.0 Adc) gFS – 10 – Mhos
DYNAMIC CHARACTERISTICS
Input Capacitance
(V 10 Vd V 0Vd
Ciss – 870 1200 pF
Output Capacitance (VDS = 10 Vdc, VGS = 0 Vdc,
f = 1.0 MHz
)
Coss – 260 400
Reverse Transfer Capacitance
f
=
1
.
0
MHz)
Crss – 60 100
SWITCHING CHARACTERISTICS (Notes 5. and 6.)
Turn–On Delay Time td(on) – 13 25 ns
Rise Time (VDD = 12 Vdc, ID = 4.2 Adc,
VGS =45Vdc
tr– 35 65
Turn–Off Delay Time VGS = 4.5 Vdc,
RG = 2.3 Ω)td(off) – 45 75
Fall Time
RG
2.3
Ω)
tf– 50 90
Total Gate Charge
(VDS
=
12 Vdc,
Qtot –11 16 nC
Gate–Source Charge
(V
DS =
12
Vdc
,
VGS = 4.5 Vdc,
I42Ad )
Qgs – 2.0 –
Gate–Drain Charge
GS
ID = 4.2 Adc) Qgd – 3.0 –
BODY–DRAIN DIODE RATINGS (Note 5.)
Diode Forward On–Voltage (IS = 4.2 Adc, VGS = 0 Vdc)
(IS = 4.2 Adc, VGS = 0 Vdc, TJ = 125°C) VSD –
–0.85
0.70 1.1
–Vdc
Reverse Recovery Time
(I 42Ad V 0Vd
trr – 20 – ns
(IS = 4.2 Adc, VGS = 0 Vdc,
dI
S
/dt = 100 A/
µ
s
)
ta– 12 –
dI
S
/dt
=
100
A/µs)
tb– 8.0 –
Reverse Recovery Stored Charge QRR – 0.01 – µC
5. Indicates Pulse Test: Pulse Width = 300 µs max, Duty Cycle = 2%.
6. Switching characteristics are independent of operating junction temperature.
* Handling precautions to protect against electrostatic discharge is mandatory.
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3
2.1 V
Figure 1. On–Region Characteristics
VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
7
3
2
1
21.751.51.2510.750.50.250
Figure 2. Transfer Characteristics
VGS, GATE–TO–SOURCE VOLTAGE (VOLTS) 2.521.510.5
8
6
4
2
0
0
Figure 3. On–Resistance versus
Gate–To–Source Voltage
VGS, GATE–TO–SOURCE VOLTAGE (VOLTS)
0.08
0.05
0.04
0.03
86420
Figure 4. On-Resistance versus Drain Current
and Gate Voltage
ID, DRAIN CURRENT (AMPS)
6420
0.03
0.02
0.01
0.02
0.05
Figure 5. On–Resistance Variation with
Temperature
TJ, JUNCTION TEMPERATURE (°C)
1.6
1.4
1.2
1
0.8
1501251007550250–25–50
Figure 6. Drain–To–Source Leakage Current
versus Voltage
VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
121062
1000
100
0.6
10,000
VDS ≥ 10 V
TJ = –55°C
25°C
100°C
ID = 4.2 A
TJ = 25°CTJ = 25°C
VGS = 2.5 V
VGS = 4.5 V
ID = 4.2 A
VGS = 4.5 V
TJ = 125°C
VGS = 0 V
TJ = 150°C
TJ = 25°C
VGS = 1.3 V
1.9 V
ID, DRAIN CURRENT (AMPS)
6
5
4
1.5 V
1.7 V
8 V
4.5 V
3.1 V
2.7 V
2.5 V
2.3 V
ID, DRAIN CURRENT (AMPS)
RDS(on), DRAIN–TO SOURCE–RESISTANCE ()
0.07
0.06
RDS(on), DRAIN–TO SOURCE–RESISTANCE ()
108
0.04
VGS = 2.7 V
RDS(on), DRAIN–TO–SOURCE RESISTANCE (NORMALIZED)
IDSS, LEAKAGE (nA)
48 201814 16
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4
GATE–TO–SOURCE OR DRAIN–TO–SOURCE VOLTAGE (VOLTS)
C, CAPACITANCE (pF)
500
2000
Figure 7. Capacitance Variation
804106
TJ = 25°C
Ciss
Coss
Crss
12
0
1000
1500
Ciss
Crss
VGS = 0 VVDS = 0 V
VDS
VGS
2500
22486
Figure 8. Gate–To–Source and Drain–To–Source
Voltage versus Total Charge
RG, GATE RESISTANCE (OHMS)
1 10 100
100
10
t, TIME (ns)
VDD = 10 V
ID = 4.2 A
VGS = 4.5 V
tr
td(on)
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
20
VGS, GATE–TO–SOURCE VOLTAGE (VOLTS)
4
0
0
1
0
Qg, TOTAL GATE CHARGE (nC)
VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
5
24
ID = 4.2 A
TJ = 25°C
VDS
VGS
Q2
Q1
1000
tf
3
28
12
416
QT
td(off)
RG, GATE RESISTANCE (OHMS)
1 10 100
100
10
t, TIME (ns)
VDD = 10 V
ID = 2.1 A
VGS = 4.5 V
tr
td(on)
Figure 10. Resistive Switching Time Variation
versus Gate Resistance
1000
tf
td(off)
6 8 10 12
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5
DRAIN–TO–SOURCE DIODE CHARACTERISTICS
0.3 0.4 0.5 0.6
0
1
2
VSD, SOURCE–TO–DRAIN VOLTAGE (VOLTS)
Figure 11. Diode Forward Voltage versus Current
4VGS = 0 V
TJ = 25°C
3
0.7
Figure 12. Maximum Rated Forward Biased
Safe Operating Area
0.1
VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
0.01
1
ID, DRAIN CURRENT (AMPS)
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
VGS = 20 V
SINGLE PULSE
TC = 25°C
10
dc
1
100
100
10
10 ms
1.0 ms
100 s
0.8 0.9
IS, SOURCE CURRENT (AMPS)
0.1 Mounted on 2″ sq. FR4 board (1″ sq. 2 oz.
Cu 0.06″ thick single sided), 10s max.
Figure 13. Diode Reverse Recovery Waveform
di/dt
trr
ta
tp
IS
0.25 IS
TIME
IS
tb
TYPICAL ELECTRICAL CHARACTERISTICS
Figure 14. Thermal Response
t, TIME (s)
Rthja(t), EFFECTIVE TRANSIENT
THERMAL RESISTANCE
1
0.1
0.01
D = 0.5
SINGLE PULSE
1.0E–05 1.0E–04 1.0E–03 1.0E–02 1.0E–01 1.0E+00 1.0E+01
0.2
0.05
0.01
1.0E+02 1.0E+03
0.001
10
0.0022 Ω0.0210 Ω0.2587 Ω0.7023 Ω0.6863 Ω
108.44 F3.1413 F0.3517 F0.0207 F0.0020 F
Chip
Ambient
Normalized to θja at 10s.
0.1
0.02
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6
INFORMATION FOR USING THE SO–8 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount b oard l ayout i s a c ritical portion o f t he t otal
design. The footprint for the semiconductor packages must
be the correct size to ensure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self–align when
subjected to a solder reflow process.
mm
inches
0.060
1.52
0.275
7.0
0.024
0.6
0.050
1.270
0.155
4.0
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within
a short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
•Always preheat the device.
•The delta temperature between the preheat and
soldering should be 100°C or less.*
•When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering
method, the difference shall be a maximum of 10°C.
•The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
•When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
•After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
•Mechanical stress or shock should not be applied
during cooling.
* Soldering a device without preheating can cause
excessive thermal shock and stress which can result in
damage to the device.
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7
TYPICAL SOLDER HEATING PROFILE
For any given circuit board, there will be a group of
control settings that will give the desired heat pattern. The
operator must set temperatures for several heating zones
and a figure for belt speed. Taken together, these control
settings make up a heating “profile” for that particular
circuit board. On machines controlled by a computer, the
computer remembers these profiles from one operating
session to the next. Figure 15 shows a typical heating
profile for use when soldering a surface mount device to a
printed circuit board. This profile will vary among
soldering systems, but it is a good starting point. Factors
that can affect the profile include the type of soldering
system in use, density and types of components on the
board, type of solder used, and the type of board or
substrate material being used. This profile shows
temperature versus time. The line on the graph shows the
actual temperature that might be experienced on the surface
of a test board at or near a central solder joint. The two
profiles are based on a high density and a low density
board. The Vitronics SMD310 convection/infrared reflow
soldering system was used to generate this profile. The type
of solder used was 62/36/2 Tin Lead Silver with a melting
point between 177–189°C. When this type of furnace is
used for solder reflow work, the circuit boards and solder
joints tend to heat first. The components on the board are
then heated by conduction. The circuit board, because it has
a large surface area, absorbs the thermal energy more
efficiently, then distributes this energy to the components.
Because of this effect, the main body of a component may
be up to 30 degrees cooler than the adjacent solder joints.
STEP 1
PREHEAT
ZONE 1
RAMP"
STEP 2
VENT
SOAK"
STEP 3
HEATING
ZONES 2 & 5
RAMP"
STEP 4
HEATING
ZONES 3 & 6
SOAK"
STEP 5
HEATING
ZONES 4 & 7
SPIKE"
STEP 6
VENT
STEP 7
COOLING
200°C
150°C
100°C
50°C
TIME (3 TO 7 MINUTES TOTAL) TMAX
SOLDER IS LIQUID FOR
40 TO 80 SECONDS
(DEPENDING ON
MASS OF ASSEMBLY)
205° TO 219°C
PEAK AT
SOLDER JOINT
DESIRED CURVE FOR LOW
MASS ASSEMBLIES
100°C
150°C
160°C
170°C
140°C
Figure 15. Typical Solder Heating Profile
DESIRED CURVE FOR HIGH
MASS ASSEMBLIES
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8
PACKAGE DIMENSIONS
SO–8
CASE 751–07
ISSUE W
STYLE 13:
PIN 1. N.C.
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
7. DRAIN
8. DRAIN
SEATING
PLANE
1
4
58
N
J
X 45
K
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN
EXCESS OF THE D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
A
BS
D
H
C
0.10 (0.004)
DIM
A
MIN MAX MIN MAX
INCHES
4.80 5.00 0.189 0.197
MILLIMETERS
B3.80 4.00 0.150 0.157
C1.35 1.75 0.053 0.069
D0.33 0.51 0.013 0.020
G1.27 BSC 0.050 BSC
H0.10 0.25 0.004 0.010
J0.19 0.25 0.007 0.010
K0.40 1.27 0.016 0.050
M0 8 0 8
N0.25 0.50 0.010 0.020
S5.80 6.20 0.228 0.244
–X–
–Y–
G
M
Y
M
0.25 (0.010)
–Z–
Y
M
0.25 (0.010) Z SXS
M
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without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
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