PTH12030W/L www.ti.com .................................................................................................................................................... SLTS211H - MAY 2003 - REVISED DECEMBER 2008 26-A, 12-V INPUT NON-ISOLATED WIDE-OUTPUT ADJUST POWER MODULE FEATURES APPLICATIONS * Up to 26 A Output Current * 12-V Input Voltage * Wide-Output Voltage Adjust (1.2 V to 5.5 V) / (0.8 V to 1.8 V) * Efficiencies up to 94% * 235 W/in3 Power Density * On/Off Inhibit * Output Voltage Sense * Prebias Startup * Margin Up/Down Controls * Dual-Phase Topology * Auto-TrackTM Sequencing * Undervoltage Lockout * Output Overcurrent Protection (Non-Latching, Auto-Reset) * Overtemperature Protection * Operating Temperature: -40C to 85C * Safety Agency Approvals: UL/IEC/CSA-C22.2 60950-1 * Point of Load Alliance (POLA) Compatible * 1 2 Multi-voltage, multi-processor systems Nominal Size = 1.37 in x 1.12 in (34,8 mm x 28,5 mm) DESCRIPTION The PTH12030 is a series of high current, non-isolated power module from Texas Instruments. This product is characterized by high efficiencies, and up to 26 A of output current, while occupying a small PCB area of 1.64 in2. In terms of cost, size, and performance, the series provides OEM's with a flexible module that meets the requirements of the most complex and demanding mixed-signal applications. These include the most densly populated, multiprocessor systems that incorporate the high-speed TMS320TM DSP family, microprocessors, and ASICs. The series uses double-sided surface mount construction and provides high-performance step-down power conversion from a 12-V input bus voltage. The output voltage of the W-suffix parts can be set to any value over the range, 1.2 V to 5.5 V. The L-suffix parts have an adjustment range of 0.8 V to 1.8 V. The output voltage is set using a single resistor. This series includes Auto-TrackTM. Auto-Track simplifies power-up and power-down supply voltage sequencing in a system by enabling modules to track each other, or any other external voltage. Each model also includes an on/off inhibit, output voltage adjust (trim), and margin up/down controls, and the ability to start up into an existing prebias. An output voltage sense ensures tight load regulation, and an output overcurrent and thermal shutdown feature provide for protection against external load faults. Package options inlude both through-hole and surface mount configurations. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Auto-Track, TMS320, POLA are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2003-2008, Texas Instruments Incorporated PTH12030W/L SLTS211H - MAY 2003 - REVISED DECEMBER 2008 .................................................................................................................................................... www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. STANDARD APPLICATION Margin Down Track Margin Up 13 12 11 1 VI 2 10 9 PTH12030x (Top View) 3 7 4 Inhibit VO 8 5 6 VOSense CI 560 mF Electrolytic (Required) CO 330 mF (Optional) RSET GND GND A. L O A D RSET = Required to set the output voltage to a value higher than the minimum value. See the Application Information section for values. ORDERING INFORMATION For the most current package and ordering information, see the Package Option Addendum at the end of this datasheet, or see the TI website at www.ti.com. ABSOLUTE MAXIMUM RATINGS Over operating free-air temperature range, all voltages are with respect to GND (unless otherwise noted) MIN VTrack Track pin voltage TA Operating Temperature Range Over VI range Twave Wave solder temperature Surface temperature of module body or pins (5seconds maximum) V -40 85 260 PTH12030WAS 235 (1) PTH12030WAZ 260 (1) Tstg Storage Temperature Storage temperature of module removed from shipping package Tpkg Packaging temperature Shipping Tray or Tape and Reel storage or bake temperature Mechanical Shock Per Mil-STD-883D, Method 2002.3, 1 ms, 1/2 Sine, mounted Mechanical Vibration Mil-STD-883D, Method 2007.2 20-2000 Hz Weight 2 UNIT VI + 0.3 PTH12030WAD Solder reflow temperature Surface temperature of module body or pins (1) TYP PTH12030WAH Treflow Flammability MAX -0.3 -55 C 125 45 500 G 15 G 10 grams Meets UL 94V-O During soldering of package version, do not elevate peak temperature of the module, pins, or internal components above the stated maximum. Submit Documentation Feedback Copyright (c) 2003-2008, Texas Instruments Incorporated Product Folder Link(s): PTH12030W/L PTH12030W/L www.ti.com .................................................................................................................................................... SLTS211H - MAY 2003 - REVISED DECEMBER 2008 ELECTRICAL CHARACTERISTICS TA = 25C, VI = 12 V, VO = 3.3 V, CI = 560 F, CO = 0 F, and IO = IOmax (unless otherwise stated) PTH12030W CHARACTERISTICS CONDITIONS MIN TYP 0 26 (1) 25C, natural convection 0 26 (1) IO Output current VI Input voltage range VO tol Set-point voltage tolerance Regtemp Temperature variation -40C < TA < 85C Regline Line regulation Over VI range 5 Regload Load regulation Over IO range 5 Over lO range 10.2 Total qutput variation Includes set-point, line, load, -40 C TA 85 C Vadj VO adjust range Over VI range Efficiency IO trip ttr Vtr IO = 18 A VO = 5 V 94.5% RSET = 2 k VO = 3.3 V 92.7% RSET = 4.32 k VO = 2.5 V 91.4% RSET = 11.5 k VO = 1.8 V 89.5% RSET = 24.3 k VO = 1.5 V 88.2% RSET = open circuit VO = 1.2 V 86.2% VO ripple (peak-to-peak) 20-MHz bandwidth Overcurrent threshold Reset, followed by auto-recovery Transient response 1 A/s load step, 50 to 100% IOmax, CO= 330 F Margin control (pins 12&13) All Voltages Pin to GND CO CO(max) UVLO Undervoltage lockout mV (2) %VO 5.5 V A Recovery Time 50 S VO over/undershoot 150 mV -8 (3) Track slew rate capability mV mVPP 5% Track input current (pin 11) %VO 50 Margin input current, Pin to GND dVtrack/dt V %VO 25 Margin up/down adjust IIL track Inhibit control (pin 4) RSET = 280 A 13.8 3 1.2 UNIT 2 (2) 0.5 Regtot MAX 60C, 200 LFM airflow A -0.13 VI increasing 9.5 VI decreasing 8.5 (4) A 1 V/ms V Input high voltage (VIH) Referenced to GND 2.5 Open (5) Input low voltage (VIL) Referenced to GND -0.2 0.5 V Input low current (IIL) Pin 4 to GND 0.5 A II inh Input standby current Inhibit (pin 4) to GND, track (pin 11) VI 10 mA fs Switching frequency Over VI and IO ranges CI External input capacitance CO External output capacitance 475 Capacitance value nonceramic 0 ceramic 0 (1) (2) (3) (4) (5) (6) (7) (8) (9) Reliability 675 (7) (8) Bellcore TR-332, 50% stress, TA=40C, ground benign kHz F 330 7,150 300 4 (9) Equiv. series resistance (nonceramic) MTBF 575 560 (6) 3 F m 106 Hrs See SOA curves or consult factory for appropriate derating. The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a tolerance of 1 %, with 100 ppm/C (or better) temperature stability. A small, low-leakage (<100 nA) MOSFET is recommended to control this pin. The open-circuit voltage is less than 1 Vdc. A low-leakage (<100 nA), open-drain device, such as MOSFET or voltage supervisor IC, is recommended to control this pin. This control pin is pulled up to an internal 5-V source. To avoid risk of damage to the module, do not apply an external voltage greater than 7 V. If it is left open-circuit, the module operates when input power is applied. A small, low-leakage (<100 nA) MOSFET or open-drain/collector voltage supervisor IC is recommended for control. For further info, see the related application information section. A 560 F electrolytic input capacitor, rated for a minimum of 500 mArms of ripple current is required for proper operation. An external output capacitor is not required for basic operation. Adding 330 F of distributed capacitance at the load will improve the transient response. This is the calculated maximum. The minimum ESR limitation often results in a lower value. See the application information section. This is the typical ESR for all the electrolytic (nonceramic) ouput capacitance. Use 7 m as the minimum when using max-ESR values to calculate. Submit Documentation Feedback Copyright (c) 2003-2008, Texas Instruments Incorporated Product Folder Link(s): PTH12030W/L 3 PTH12030W/L SLTS211H - MAY 2003 - REVISED DECEMBER 2008 .................................................................................................................................................... www.ti.com ELECTRICAL CHARACTERISTICS TA = 25C, VI = 12 V, VO = 3.3 V, CI= 560 F, CO = 0 F, and IO = IOmax (unless otherwise stated) PTH12030L CHARACTERISTICS CONDITIONS MIN TYP 0 26 (1) 25C, natural convection 0 26 (1) IO Output current VI Input voltage range VO tol Set-point voltage tolerance Regtemp Temperature variation -40C < TA < 85C Regline Line regulation Over VI range 5 Regload Load regulation Over IO range 5 Over lO range 10.2 Total output variation Includes set-point, line, load, -40C TA 85 C Vadj VO adjust range Over VI range Efficiency IO trip ttr %VO mV mV (2) %VO 1.8 VO = 1.8 V 89% V RSET = 3.57 k VO = 1.5 V 87% RSET = 12.1 k VO = 1.2 V 85% RSET = 32.4 k VO = 1 V 83% RSET = open cct VO = 0.8 V 80% 20-MHz bandwidth 15 Overcurrent threshold Reset, followed by auto-recovery 50 A Recovery Time 50 S VO over/undershoot 150 mV Margin control (pins 12&13) 1 A/s load step, 50 to 100% Iomax, CO= 330 F Margin up/down adjust Margin input current, Pin to GND IIL track Track input current (pin 11) Pin to GND dVtrack/dt Track slew rate capability UVLO V %VO VO ripple (peak-to-peak) Transient response Vtr IO = 18 A RSET = 130 Undervoltage lockout mVPP 5 % -8 (3) A -0.13 (4) CO CO (max) 1 VI increasing 9.5 VI decreasing 8.5 Referenced to GND 2.5 Open (5) Input low voltage (VIL) Referenced to GND -0.2 0.5 Input low current (IIL) Pin 4 to GND II inh Input standby current Inhibit (pin 4) to GND, track (pin 11) VI fs Switching frequency Over VI and IO ranges CI External input capacitance External output capacitance CO 0.5 Capacitance value 0 ceramic 0 4 (9) Equivalent series resistance (nonceramic) MTBF (1) (2) (3) (4) (5) (6) (7) (8) (9) 4 Reliability Bellcore TR-332, 50% stress, TA= 40C, ground benign 3 V mA 575 675 330 (7) 7150 (8) 560 (6) nonceramic V/ms mA 10 475 mA V Input high voltage (VIH) Inhibit control (pin4) A 13.8 3 0.8 UNIT 2 (2) 0.5 Regtot MAX 60C, 200 LFM airflow kHz F 300 F m 106 Hr See SOA curves or consult factory for appropriate derating. The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a tolerance of 1%, with 100 ppm/C (or better) temperature stability. A small, low-leakage (<100 nA) MOSFET is recommended to control this pin. The open-circuit voltage is less than 1 Vdc. A low-leakage (<100 nA), open-drain device, such as MOSFET or voltage supervisor IC, is recommended to control this pin. This control pin is pulled up to an internal 5-V source. To avoid risk of damage to the module, do not apply an external voltage greater than 7 V. If it is left open-circuit, the module operates when input power is applied. A small, low-leakage (<100 nA) MOSFET or open-drain/collector voltage supervisor IC is recommended for control. For further information, see the application information section. A 560 F electrolytic input capacitor, rated for a minimum of 500 mArms of ripple current is required for proper operation. An external output capacitor is not required for basic operation. Adding 330 F of distributed capacitance at the load improves the transient response. This is the calculated maximum. The minimum ESR limitation often results in a lower value. See the application information section. This is the typical ESR for all the electrolytic (non-ceramic) ouput capacitance. Use 7 m as the minimum when using max-ESR values to calculate. Submit Documentation Feedback Copyright (c) 2003-2008, Texas Instruments Incorporated Product Folder Link(s): PTH12030W/L PTH12030W/L www.ti.com .................................................................................................................................................... SLTS211H - MAY 2003 - REVISED DECEMBER 2008 DEVICE INFORMATION TERMINAL FUNCTIONS TERMINAL NAME GND 1,3,7,10 VI DESCRIPTION NO. This is the common ground connection for the VI and VO power connections. It is also the 0 Vdc reference for the control inputs. 2 The positive input voltage power node to the module, which is referenced to common GND. 4 The Inhibit pin is an open-collector/drain negative logic input that is referenced to GND. Applying a low-level ground signal to this input disables the module's output and turns off the output voltage. When the Inhibit control is active, the input current drawn by the regulator is significantly reduced. If the Inhibit pin is left open-circuit, the module produces an output whenever a valid input source is applied. VOAdjust 5 A 1% resistor must be directly connected between this pin and pin 7 (GND) to set the output voltage to a value higher than 0.8 V. The temperature stability of the resistor should be 100 ppm/C (or better). The set point range for the output voltage is from 1.2 V to 5.5 V for W-suffix devices, and 0.8 V to 1.8 V for L-suffix devices. The resistor value required for a given output voltage may be calculated using a formula. If left open circuit, the module output voltage defaults to its lowest value. For further information on output voltage adjustment, see the related application information section. Table 3 gives the preferred resistor values for a number of standard output voltages. VOSense 6 The sense input allows the regulation circuit to compensate for voltage drop between the module and the load. For optimal voltage accuracy, VO Sense should be connected to Vout. It can also be left disconnected. Inhibit (1) VO 8,9 The regulated positive power output with respect to the GND node. Track 11 This is an analog control input that enables the output voltage to follow an external voltage. This pin becomes active typically 20 ms after the input voltage has been applied, and allows direct control of the output voltage from 0 V up to the nominal set-point voltage. Within this range the output will follow the voltage at the Track pin on a volt-for-volt basis. When the control voltage is raised above this range, the module regulates at its set-point voltage. The feature allows the output voltage to rise simultaneously with other modules powered from the same input bus. If unused, this input should be connected to VI. Note: Due to the undervoltage lockout feature, the output of the module cannot follow its own input voltage during power up. For more information, see the related application information section. Margin Down (1) 12 When this input is asserted to GND, the output voltage is decreased by 5% from the nominal. The input requires an open-collector (open-drain) interface. It is not TTL compatible. A lower percent change can be accomodated with a series resistor. For further information, see the related application information section. Margin Up (1) 13 When this input is asserted to GND, the output voltage is increased by 5%. The input requires an open-collector (open-drain) interface. It is not TTL compatible. The percent change can be reduced with a series resistor. For further information, see the related application information section. (1) Denotes negative logic: Open = Normal operation Ground = Function active 13 12 11 1 2 10 PTHXX030 (Top View) 3 9 8 7 4 5 6 Submit Documentation Feedback Copyright (c) 2003-2008, Texas Instruments Incorporated Product Folder Link(s): PTH12030W/L 5 PTH12030W/L SLTS211H - MAY 2003 - REVISED DECEMBER 2008 .................................................................................................................................................... www.ti.com PTH12030W TYPICAL CHARACTERISTICS (VI = 12 V) (1) (2) EFFICIENCY vs LOAD CURRENT OUTPUT RIPPLE vs LOAD CURRENT 100 VO = 3.3 V Output Ripple - mV Efficiency - % 90 VO = 1.8 V 80 50 10 40 8 VO = 5 V VO = 1.2 V 70 PD - Power Dissipation - W VO = 2.5 V POWER DISSIPATION vs LOAD CURRENT 30 VO = 1.8 V 20 VO = 2.5 V VO = 3.3 V 10 60 VO = 1.2 V VO = 5 V VO = 3.3 V 6 VO = 2.5 V 4 VO = 1.8 V 2 VO = 1.2 V VO = 5 V 0 50 0 5 10 15 20 IO - Output Current - A 25 0 5 10 15 20 90 80 80 TA - Ambient Temperature - C TA - Ambient Temperature - C 10 15 20 IO - Output Current - A 70 60 400 LFM 50 200 LFM 40 100 LFM Figure 3. 70 400 LFM 60 200 LFM 50 100 LFM 40 Natural Convection 30 Natural Convection VO = 5 V 25 TEMPERATURE DERATING vs OUTPUT CURRENT 90 30 VO = 3.3 V 20 20 0 6 5 Figure 2. TEMPERATURE DERATING vs OUTPUT CURRENT (2) 0 IO - Output Current - A Figure 1. (1) 0 25 5 10 15 20 25 0 5 10 15 IO - Output Current - A IO - Output Current - A Figure 4. Figure 5. 20 25 Characteristic data has been developed from actual products tested at 25C. This data is considered typical data for the converter. Applies to Figure 1, Figure 2, and Figure 3. SOA curves represent the conditions at which internal components are at or below the manufacturer's maximum operating temperatures. Derating limits apply to modules soldered directly to a 4 in. x 4 in. double-sided PCB with 1 oz. copper. For surface mount products (AS and AZ suffix), multiple vias (plated through holes) are required to add thermal paths around the power pins. Please refer to the mechanical specification for more information. Applies to Figure 4. Submit Documentation Feedback Copyright (c) 2003-2008, Texas Instruments Incorporated Product Folder Link(s): PTH12030W/L PTH12030W/L www.ti.com .................................................................................................................................................... SLTS211H - MAY 2003 - REVISED DECEMBER 2008 PTH12030L TYPICAL CHARACTERISTICS (VI = 12 V) (1) (2) EFFICIENCY vs LOAD CURRENT OUTPUT RIPPLE vs LOAD CURRENT 100 POWER DISSIPATION vs LOAD CURRENT 8 50 VO = 1.5 V 80 VO = 1 V VO = 0.8 V 70 PD - Power Dissipation - W 40 Output Ripple - mV Efficiency - % VO = 1.8 V VO = 1.2 V 90 30 VO = 1.5 V 20 VO = 1 V 60 VO = 1.8 V VO = 1.2 V 10 VO = 0.8 V 6 VO = 1 V 4 VO = 1.5 V 2 VO = 1.8 V VO = 0.8 V 50 0 5 10 15 20 0 25 0 0 5 10 15 20 IO - Output Current - A IO - Output Current - A Figure 6. Figure 7. 25 0 5 10 15 20 25 IO - Output Current - A Figure 8. TEMPERATURE DERATING vs OUTPUT CURRENT TA- Ambient Temperature -5 C 90 80 Nat Conv 100 LFM 70 200 LFM 60 400 LFM 50 40 30 20 VO = 1.8 V 0 5 10 15 20 25 IO - Output Current - A Figure 9. (1) (2) Characteristic data has been developed from actual products tested at 25C. This data is considered typical data for the converter. Applies to Figure 6, Figure 7, and Figure 8. SOA curves represent the conditions at which internal components are at or below the manufacturer's maximum operating temperatures. Derating limits apply to modules soldered directly to a 4 in. x 4 in. double-sided PCB with 1 oz. copper. For surface mount products (AS and AZ suffix), multiple vias (plated through holes) are required to add thermal paths around the power pins. Please refer to the mechanical specification for more information. Applies to Figure 9. Submit Documentation Feedback Copyright (c) 2003-2008, Texas Instruments Incorporated Product Folder Link(s): PTH12030W/L 7 PTH12030W/L SLTS211H - MAY 2003 - REVISED DECEMBER 2008 .................................................................................................................................................... www.ti.com APPLICATION INFORMATION ADJUSTING THE OUTPUT VOLTAGE The VOAdjust control (pin 5) sets the output voltage of the PTH12030W/L. The adjustment range is 1.2V to 5.5V for the W-suffix modules, and 0.8V to 1.8V for L-suffix modules. The adjustment method requires the addition of a single external resistor, RSET, that must be connected directly between the VOAdjust and GND pins(1). Table 1 gives the standard value of the external resistor for a number of standard voltages, along with the actual output voltage that this resistance value provides. For other output voltages the required resistor can either be calculated using Equation 1, or simply selected from the range of values given in Table 3. Figure 10 shows the placement of the required resistor. Table 1. Standard Values of RSET for Standard Output Voltages PTH12030W PTH12030L VO (Required) (V) RSET (k) VO (Actual) (V) RSET(k) VO (Actual) (V) 5 0.280 5.009 N/A N/A 3.3 2 3.294 N/A N/A 2.5 4.32 2.503 N/A N/A 2 8.06 2.01 N/A N/A 1.8 11.5 1.801 0.130 1.8 1.5 24.3 1.506 3.57 1.499 1.2 Open 1.2 12.1 1.201 1.1 N/A N/A 18.7 1.101 1 N/A N/A 32.4 0.999 0.9 N/A N/A 71.5 0.901 0.8 N/A N/A Open 0.8 Figure 10. Vo Adjust Resistor Placement NOTES 1. RSET: Use a 0.05 W resistor with a tolerance of 1% and temperature stability of 100 ppm/C (or better). Connect the resistor directly between pins 5 and 7, as close to the regulator as possible, using dedicated PCB traces. 2. Never connect capacitors from VOAdjust to either GND or VO. Any capacitance added to the VO Adjust pin affects the stability of the regulator. Use Equation 1 to calculate the adjust resistor value. See Table 2 for parameters, RS and Vmin. Equation 1. Output Voltage Adjust RSET = 10 kW x 0.8 V - RS kW VO - Vmin (1) Table 2. Adjust Equation Parameters 8 PARAMETERS PTH12030W PTH12030L V(MIN) 1.2 V 0.8 V V(MAX) 5.5 V 1.8 V RS 1.82 k 7.87 k Submit Documentation Feedback Copyright (c) 2003-2008, Texas Instruments Incorporated Product Folder Link(s): PTH12030W/L PTH12030W/L www.ti.com .................................................................................................................................................... SLTS211H - MAY 2003 - REVISED DECEMBER 2008 Table 3. Output Voltage Set-Point Resistor Values PTH12030W PTH12030L VOUT (V) RSET (k) VOUT (V) RSET(k) VOUT (V) RSET(k) 1.2 Open 2.7 3.51 0.8 Open 1.225 318 2.75 3.34 0.825 312 1.25 158 2.8 3.18 0.85 152 1.275 105 2.85 3.03 0.875 98.8 1.3 78.2 2.9 2.89 0.9 72.1 1.325 62.2 2.95 2.75 0.925 56.1 1.35 51.5 3 2.62 0.95 45.5 1.375 43.9 3.05 2.50 0.975 37.8 1.4 38.2 3.1 2.39 1 32.1 1.425 33.7 3.15 2.28 1.025 27.7 1.45 30.2 3.2 2.18 1.05 24.1 1.475 27.3 3.25 2.08 1.075 21.2 1.5 24.8 3.3 1.99 1.1 18.8 1.55 21 3.35 1.9 1.125 16.7 1.6 18.2 3.4 1.82 1.15 15 1.65 16 3.5 1.66 1.175 13.5 1.7 14.2 3.6 1.51 1.2 12.1 1.75 12.7 3.7 1.38 1.225 11 1.8 11.5 3.8 1.26 1.25 9.91 1.85 10.5 3.9 1.14 1.275 8.97 1.9 9.61 4 1.04 1.3 8.13 1.95 8.85 4.1 0.939 1.325 7.37 2 8.18 4.2 0.847 1.35 6.68 2.05 7.59 4.3 0.761 1.375 6.04 2.1 7.07 4.4 0.680 1.4 5.46 2.15 6.6 4.5 0.604 1.425 4.93 2.2 6.18 4.6 0.533 1.45 4.44 2.25 5.8 4.7 0.466 1.475 3.98 3.56 2.3 5.45 4.8 0.402 1.5 2.35 5.14 4.9 0.342 1.55 2.8 2.4 4.85 5 0.285 1.6 2.13 2.45 4.58 5.1 0.231 1.65 1.54 2.5 4.33 5.2 0.180 1.7 1.02 2.55 4.11 5.3 0.131 1.75 0.551 2.6 3.89 5.4 0.085 1.8 0.130 2.65 3.7 5.5 0.041 Submit Documentation Feedback Copyright (c) 2003-2008, Texas Instruments Incorporated Product Folder Link(s): PTH12030W/L 9 PTH12030W/L SLTS211H - MAY 2003 - REVISED DECEMBER 2008 .................................................................................................................................................... www.ti.com CAPACITOR RECOMMENDATIONS FOR THE PTH12030 SERIES OF POWER MODULES INPUT CAPACITOR The recommended input capacitor(s) is determined by the 560 F minimum capacitance and 500 mArms minimum ripple current rating. Ripple current, less than 100 m equivalent series resistance (ESR) and temperature, are the major considerations when selecting input capacitors. Unlike polymer-tantalum capacitors, regular tantalum capacitors are not recommended for the input bus. These capacitors require a recommended minimum voltage rating of 2 x (max. dc voltage + ac ripple). When the operating temperature is below 0C, the ESR of aluminum electrolytic capacitors increases. For these applications, Os-Con, polymer-tantalum, and polymer-aluminum types should be considered. Adding one or two ceramic capacitors to the input further reduces high-frequency reflected ripple current. OUTPUT CAPACITORS (OPTIONAL) For applications with load transients, regulator response benefits from an external output capacitance. The recommended output capacitance of 330 F allows the module to meet its transient response specification. For most applications, a high quality computer-grade aluminum eletrolytic capacitor is adequate. These capacitors provide decoupling over the frequency range, 2 kHz to 150 kHz, and are suitable when ambient temperatures are above 0C. For operation below 0C, tantalum, ceramic, or Os-Con type capacitors are recommended. When using one or more nonceramic capacitors, the calculated equivalent ESR should be no lower than 4 m (7 m using the manufacturer's maximum ESR for a single capacitor). A list of preferred low-ESR type capacitors are identified in Table 4. CERAMIC CAPACITORS Above 150 kHz, the performance of aluminum electrolytic capacitors is less effective. Multilayer ceramic capacitors have low ESR and a resonant frequency higher than the bandwidth of the regulator. They can be used to reduce the reflected ripple current at the input as well as improve the transient response of the output. When used on the output their combined ESR is not critical as long as the total value of ceramic capacitance does not exceed 300F. Also, to prevent the formation of local resonances, do not place more than five identical ceramic capacitors in parallel with values of 10 F or greater. TANTALUM CAPACITORS Tantalum type capacitors can only be used on the output bus, and are recommended for applications where the ambient operating temperature can be less than 0C. The AVX TPS, Sprague 593D/594/595, and Kemet T495/T510 capacitor series are suggested over other tantalum types due to their higher rated surge, power dissipation, and ripple current capability. As a caution many general-purpose tantalum capacitors have considerably higher ESR, reduced power dissipation and lower ripple current capability. These capacitors are also less reliable as they have reduced power dissipation and surge current ratings. Tantalum capacitors that have no stated ESR or surge current rating are not recommended for power applications. When specifying Os-con and polymer tantalum capacitors for the output, the minimum ESR limit is encountered well before the maximum capacitance value is reached. CAPACITOR TABLE Table 4 identifies the characteristics of capacitors from a number of vendors with acceptable ESR and ripple current (rms) ratings. The recommended number of capacitors required at both the input and output buses is identified for each capacitor type. This is not an extensive capacitor list. Capacitors from other vendors are available with comparable specifications. Those listed are for guidance. The RMS ripple current rating and ESR (at 100 kHz) are critical parameters necessary to insure both optimum regulator performance and long capacitor life. 10 Submit Documentation Feedback Copyright (c) 2003-2008, Texas Instruments Incorporated Product Folder Link(s): PTH12030W/L PTH12030W/L www.ti.com .................................................................................................................................................... SLTS211H - MAY 2003 - REVISED DECEMBER 2008 Table 4. Input/Output Capacitors (1) CAPACITOR CHARACTERISTICS CAPACITOR VENDOR, TYPE/SERIES, (STYLE) WORKING VALUE VOLTAGE (F) (V) QUANTITY MAX ESR @ 100 kHz () MAX RIPPLE CURRENT @ 85C (lrms)(mA) PHYSICAL SIZE (mm) INPUT BUS OPTIONAL OUTPUT BUS VENDOR PART NUMBER Panasonic 25 330 0.090 1100 10 x 12,5 2 1 EEUFC1E331 FC, Radial 25 560 0.065 1205 12,5 x 15 1 1 EEUFC1E561S FK, (SMD) 25 470 0.080 1100 10 x 10,2 2 1 EEVFK1E471P FK, (SMD) 35 680 0.060 1100 12,5 x 13,5 1 1 EEVFK1V681Q MVZ, Aluminum (SMD) 16 680 0.090 670 10 x 10 1 1 MVZ16VC681MJ10TP LXZ, Aluminium (Radial)) 25 680 0.068 1050 10 x 16 1 1 LXZ16VB681M10X16LL PS, Poly-Aluminum (Radial) 16 330 0.014 5060 10 x 12,5 2 3 16PS330MJ12 PXA, Poly-Aluminum (SMD) 16 330 0.014 5050 10 x 12,2 2 3 PXA16VCMJ12 Nichicon, Aluminum 25 560 0.060 1060 12,5 x 15 1 1 UPM1E561MHH6 HD, (Radial) 16 680 0.038 1440 10 x 16 1 1 UHD1C681MHR PM, (Radial) 35 560 0.048 1360 16 x 15 1 1 UPM1V561MHH6 Panasonic, Poly-Aluminum SE, (SMD) 6.3 180 0.005 4000 7,3x4,3x4,2 N/R (2) 1 (3) EEFSE0J181R (VO 5.1V) Sanyo, TPE Poscap (SMD) 10 330 0.025 3000 7,3x4,3x3,8 N/R (2) 4 10TPE330M SEQP, Os-Con (Radial) 16 330 0.016 4720 10 x 13 2 3 16SEQP330M SVP, Os-Con (SMD) 16 330 0.016 4700 10 x 12,6 2 3 16SVP330M AVX, Tantalum, Series III 10 470 0.045 1723 7,3x5,7x4,1 N/R (2) 5 (3) TPSE477M010R0045 (VO 5.1V) TPS (SMD) 10 330 0.045 1723 7,3x5,7x4,1 N/R (2) 5 (3) TPSE337M010R0045 (VO 5.1V) Kemet, Poly-Tantalum T520, (SMD) 10 330 0.040 1800 7,3x4,3x4 N/R (2) 5 T520X337M010AS T530, (SMD) 10 330 0.010 5000 7,3x4,3x4 N/R (2) 1 T530X337M010ASE010 6.3 470 0.010 5000 7,3x4,3x4 N/R (2) 1 (3) T530X477M006ASE010 (VO 5.1V) Vishay-Sprague 595D, Tantalum (SMD) 10 470 0.100 1440 7,2x6x4,1 N/R (2) 5 (3) 595D477X0010R2T (VO 5.1V) 94SA, Os-con (Radial) 16 1,000 0.015 9740 16 x 25 1 2 94SA108X0016HBP 94SVP, Os-Con (SMD) 16 330 0.017 4580 10 x12,7 2 2 94SVP337X0016F12 Kemet, Ceramic X5R 16 10 0.002 - 1210 Case 1 (4) 5 C1210C106M4PAC (SMD) 6.3 47 0.002 3225 mm N/R (2) 5 C1210C476K9PAC Murata, Ceramic X5R 6.3 100 0.002 1210 Case N/R (2) 3 GRM32ER60J107M (SMD) 16 47 3225 mm 1 (4) 5 GRM32ER61J476K 16 22 1 (4) 5 GRM32ER61C226K (4) United Chemi-Con 5 GRM32DR61C106K 1210 Case N/R (2) 3 C3225X5R0J107MT 3225 mm N/R (2) 5 C322X5R0J476MT 22 1 (4) 5 C3225XR1C226MT 10 1 (4) 5 C3225X5R1C106MT 16 10 TDK, Ceramic X5R 6.3 100 (SMD) 6.3 47 16 16 (1) (2) (3) (4) - 1 0.002 - Capacitor Supplier Verification Please verify availability of capacitors identified in this table. Capacitor suppliers may recommend alternative part numbers because of limited availability or obsolete products. In some instances, the capacitor product life cycle may be in decline and have short-term consideration for obsolescence. RoHS, Lead-free and Material Details Please consult capacitor suppliers regarding material composition, RoHS status, lead-free status, and manufacturing process requirements. Component designators or part number deviations can occur when material composition or soldering requirements are updated. N/R -Not recommended. The voltage rating does not meet the minimum operating limits. The voltage rating of this capacitor only allows it to be used for output voltages that are equal to or less than 5.1 V. Small ceramic capacitors may used to complement electrolytic types at the input to further reduce high-frequency ripple current. Submit Documentation Feedback Copyright (c) 2003-2008, Texas Instruments Incorporated Product Folder Link(s): PTH12030W/L 11 PTH12030W/L SLTS211H - MAY 2003 - REVISED DECEMBER 2008 .................................................................................................................................................... www.ti.com DESIGNING FOR VERY FAST LOAD TRANSIENTS The transient response of the dc/dc converter has been characterized using a load transient with a di/dt of 1A/s. The typical voltage deviation for this load transient is given in the specification table using the optional value of output capacitance. As the di/dt of a transient is increased, the response of a converter's regulation circuit ultimately depends on its output capacitor decoupling network. This is an inherent limitation with any dc/dc converter once the speed of the transient exceeds its bandwidth capability. If the target application specifies a higher di/dt or lower voltage deviation, the requirement can only be met with additional output capacitor decoupling. In these cases special attention must be paid to the type, value, and ESR of the capacitors selected. If the transient performance requirements exceed that specified in this data sheet, or the total amount of load capacitance is above 3,000 F, the selection of output capacitors becomes more important. FEATURES OF THE PTH FAMILY OF NON-ISOLATED WIDE OUTPUT ADJUST POWER MODULES POLATM COMPATIBILITY The PTH/PTV family of nonisolated, wide-output adjustable power modules are optimized for applications that require a flexible, high performance module that is small in size. Each of these products are POLATM compatible. POLA compatible products are produced by a number of manufacturers, and offer customers advanced, nonisolated modules with the same footprint and form factor. POLA parts are also assured to be interoperable, thereby providing customers with a second-source availability. From the basic, Just Plug it In functionality of the 6-A modules, to the 30-A rated feature-rich PTHxx030, these products were designed to be very flexible, yet simple to use. The features vary with each product. Table 5 provides a quick reference to the features by product series and input bus voltage. Table 5. Operating Features by Series and Input Bus Voltage Series PTHxx050 PTHxx060 PTHxx010 PTVxx010 PTHxx020 PTHxx020 PTHxx030 Input Bus (V) IO(A) Adjust (Trim) On/Off Inhibit OverCurrent Prebias Startup AutoTrackTM Margin Up/Down Output Sense 3.3 6 * * * * * 5 6 * * * * * 12 6 * * * * * 3.3 / 5 10 * * * * 12 10 * * * * 3.3 / 5 15 * * * 12 12 * * 5 8 * * 12 8 * 3.3 / 5 22 12 5 Thermal Shutdown * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 18 * * * * * * * * 18 * * * * * * * 12 16 * * * * * * * 3.3 / 5 30 * * * * * * * * 12 26 * * * * * * * * * For simple point-of-use applications, the PTH12050 (6 A) provides operating features such as an on/off inhibit, output voltage trim, prebias start-up and overcurrent protection. The PTH12060 (10 A), and PTH12010 (12 A) include an output voltage sense, and margin up/down controls. Then the higher output current, PTH12020 (18 A) and PTH12030 (26 A) products incorporate overtemperature shutdown protection. The PTV12010 and PTV12020 are similar parts offered in a vertical, single in-line pin (SIP) profile, at slightly lower current ratings. All of the products referenced in Table 5 include Auto-TrackTM. This feature was specifically designed to simplify the task of sequencing the supply voltages in a power system. This and other features are described in the following sections. 12 Submit Documentation Feedback Copyright (c) 2003-2008, Texas Instruments Incorporated Product Folder Link(s): PTH12030W/L PTH12030W/L www.ti.com .................................................................................................................................................... SLTS211H - MAY 2003 - REVISED DECEMBER 2008 SOFT-START POWER UP The Auto-Track feature allows the power-up of multiple PTH modules to be directly controlled from the Track pin. However, in a stand-alone configuration, or when the Auto-Track feature is not being used, the Track pin should be directly connected to the input voltage, VI, see Figure 11. When the Track pin is connected to the input voltage the Auto-Track function is permanently disengaged. This allows the module to power up entirely under the control of its internal soft-start circuitry. When power up is under soft-start control, the output voltage rises to the set-point at a quicker and more linear rate. 8 10 9 Up Dn Track 2 VI PTH12020W Inhibit 3 VO VI (5 V/div) 3.3 V 6 VO (1 V/div) GND Adjust 7 4 1 CI 1000 mF RSET 2 kW 0.1 W 1% + 12 V 5 Sense CO 330 mF + GND GND II (5 V/div) t - Time - 5 ms/div Figure 11. Power-Up Application Circuit Figure 12. Power-Up Waveforms From the moment a valid input voltage is applied, the soft-start control introduces a short time delay (typically 8 ms-15 ms) before allowing the output voltage to rise. The output then progressively rises to the module's setpoint voltage. Figure 12 shows the soft-start power-up characteristic of the 18-A output product (PTH12020W), operating from a 12-V input bus and configured for a 3.3-V output. The waveforms were measured with a 5-A resistive load and the Auto-Track feature disabled. The initial rise in input current when the input voltage first starts to rise is the charge current drawn by the input capacitors. Power-up is complete within 25 ms. OVERCURRENT PROTECTION For protection against load faults, all modules incorporate output overcurrent protection. Applying a load that exceeds the regulator's overcurrent threshold causes the regulated output to shut down. Following shutdown a module periodically attempts to recover by initiating a soft-start power-up. This is described as a hiccup mode of operation, whereby the module continues in a cycle of successive shutdown and power up until the load fault is removed. During this period, the average current flowing into the fault is significantly reduced. Once the fault is removed, the module automatically recovers and returns to normal operation. OVERTEMPERATURE PROTECTION (OTP) The PTH12020W and PTH12030W products have overtemperature protection. These products have an on-board temperature sensor that protects the module's internal circuitry against excessively high temperatures. A rise in the internal temperature may be the result of a drop in airflow, or a high ambient temperature. If the internal temperature exceeds the OTP threshold, the module's Inhibit control is internally pulled low. This turns the output off. The output voltage drops as the external output capacitors are discharged by the load circuit. The recovery is automatic, and begins with a soft-start power up. It occurs when the the sensed temperature decreases by about 10C below the trip point. Note: The overtemperature protection is a last resort mechanism to prevent thermal stress to the regulator. Operation at or close to the thermal shutdown temperature is not recommended and reduces the long-term reliability of the module. Always operate the regulator within the specified safe operating area (SOA) limits for the worst-case conditions of ambient temperature and airflow. Submit Documentation Feedback Copyright (c) 2003-2008, Texas Instruments Incorporated Product Folder Link(s): PTH12030W/L 13 PTH12030W/L SLTS211H - MAY 2003 - REVISED DECEMBER 2008 .................................................................................................................................................... www.ti.com OUTPUT ON/OFF INHIBIT For applications requiring output voltage on/off control, each series of the PTH family incorporates an output Inhibit control pin. The inhibit feature can be used wherever there is a requirement for the output voltage from the regulator to be turned off. The power modules function normally when the Inhibit pin is left open-circuit, providing a regulated output whenever a valid source voltage is connected to VI with respect to GND. Figure 13 shows the typical application of the inhibit function. Note the discrete transistor (Q1). The Inhibit input has its own internal pull-up to a potential of 5 V to 13.2 V (see footnotes to specification table). The input is not compatible with TTL logic devices. An open-collector (or open-drain) discrete transistor is recommended for control. VOSense 2 + Q1 BSS138 1 = Inhibit 8 5 7 Q1VDS (5 V/div) VO 6 PTH12060W 3 1 CI 560 mF 9 4 RSET CO 2 kW 330 mF 0.1 W 1% GND + 10 VI VO (2 V/div) L O A D GND II (2 V/div) t - Time - 10 ms/div Figure 13. Inhibit Control Circuit Figure 14. Power-Up from Inhibit Control Turning Q1 on applies a low voltage to the Inhibit control pin and disables the output of the module. If Q1 is then turned off, the module executes a soft-start power-up sequence. A regulated output voltage is produced within 25 ms Figure 14 shows the typical rise in both the output voltage and input current, following the turn-off of Q1. The turn off of Q1 corresponds to the rise in the waveform, Q1 Vds. The waveforms were measured with a 5-A constant current load. REMOTE SENSE Products with this feature incorporate an output voltage sense pin, VO Sense. A remote sense improves the load regulation performance of the module by allowing it to compensate for any IR voltage drop between its output and the load. An IR drop is caused by the high output current flowing through the small amount of pin and trace resistance. To use this feature simply connect the VO Sense pin to the VO node, close to the load circuit (see standard application circuit). If a sense pin is left open-circuit, an internal low-value resistor (15- or less) connected between the pin and and the output node, ensures the output remains in regulation. With the sense pin connected, the difference between the voltage measured directly between the VO and GND pins, and that measured from VO Sense to GND, is the amount of IR drop being compensated by the regulator. This should be limited to a maximum of 0.3 V. Note: The remote sense feature is not designed to compensate for the forward drop of nonlinear or frequency dependent components that may be placed in series with the converter output. Examples include OR-ing diodes, filter inductors, ferrite beads, and fuses. When these components are enclosed by the remote sense connection, they are effectively placed inside the regulation control loop, which can adversely affect the stability of the regulator. 14 Submit Documentation Feedback Copyright (c) 2003-2008, Texas Instruments Incorporated Product Folder Link(s): PTH12030W/L PTH12030W/L www.ti.com .................................................................................................................................................... SLTS211H - MAY 2003 - REVISED DECEMBER 2008 Auto-TrackTM Function The Auto-Track function is unique to the PTH/PTV family, and is available with all POLA products. Auto-Track was designed to simplify the amount of circuitry required to make the output voltage from each module power up and power down in sequence. The sequencing of two or more supply voltages during power up is a common requirement for complex mixed-signal applications that use dual-voltage VLSI ICs such as the TMS320TM DSP family, microprocessors, and ASICs. How Auto-TrackTM Works Auto-Track works by forcing the module output voltage to follow a voltage presented at the Track control pin (1). This control range is limited to between 0 V and the module set-point voltage. Once the track-pin voltage is raised above the set-point voltage, the module output remains at its set-point (2). As an example, if the Track pin of a 2.5-V regulator is at 1 V, the regulated output is 1 V. If the voltage at the Track pin rises to 3 V, the regulated output does not go higher than 2.5 V. When under Auto-Track control, the regulated output from the module follows the voltage at its Track pin on a volt-for-volt basis. By connecting the Track pin of a number of these modules together, the output voltages follow a common signal during power up and power down. The control signal can be an externally generated master ramp waveform, or the output voltage from another power supply circuit (3). For convenience, the Track input incorporates an internal RC-charge circuit. This operates off the module input voltage to produce a suitable rising waveform at power up. Typical Application The basic implementation of Auto-Track allows for simultaneous voltage sequencing of a number of Auto-Track compliant modules. Connecting the Track inputs of two or more modules forces their track input to follow the same collective RC-ramp waveform, and allows their power-up sequence to be coordinated from a common Track control signal. This can be an open-collector (or open-drain) device, such as a power-up reset voltage supervisor IC. See U3 in Figure 15. To coordinate a power-up sequence, the Track control must first be pulled to ground potential. This should be done at or before input power is applied to the modules. The ground signal should be maintained for at least 40 ms after input power has been applied. This brief period gives the modules time to complete their internal soft-start initialization (4), enabling them to produce an output voltage. A low-cost supply voltage supervisor IC, that includes a built-in time delay, is an ideal component for automatically controlling the Track inputs at power up. Figure 15 shows how the TL7712A supply voltage supervisor IC (U3) can be used to coordinate the sequenced power up of two 12-V input Auto-Track modules. The output of the TL7712A supervisor becomes active above an input voltage of 3.6 V, enabling it to assert a ground signal to the common track control well before the input voltage has reached the module's undervoltage lockout threshold. The ground signal is maintained until approximately 43 ms after the input voltage has risen above U3's voltage threshold, which is 10.95 V. The 43-ms time period is controlled by the capacitor C3. The value of 3.3 F provides sufficient time delay for the modules to complete their internal soft-start initialization. The output voltage of each module remains at zero until the track control voltage is allowed to rise. When U3 removes the ground signal, the track control voltage automatically rises. This causes the output voltage of each module to rise simultaneously with the other modules, until each reaches its respective set-point voltage. Figure 17 shows the output voltage waveforms from the circuit of Figure 15 after input voltage is applied to the circuit. The waveforms, VO1 and VO2, represent the output voltages from the two power modules, U1 (3.3 V) and U2 (1.8 V), respectively. VTRK, VO1, and VO2 are shown rising together to produce the desired simultaneous power-up characteristic. The same circuit also provides a power-down sequence. When the input voltage falls below U3's voltage threshold, the ground signal is re-applied to the common track control. This pulls the track inputs to zero volts, forcing the output of each module to follow, as shown in Figure 17. In order for a simultaneous power-down to occur, the track inputs must be pulled low before the input voltage has fallen below the modules' undervoltage lockout. This is an important constraint. Once the modules recognize that a valid input voltage is no longer present, their outputs can no longer follow the voltage applied at their track input. During a power-down sequence, the fall in the output voltage from the modules is limited by the maximum output capacitance and the Auto-Track slew rate. Submit Documentation Feedback Copyright (c) 2003-2008, Texas Instruments Incorporated Product Folder Link(s): PTH12030W/L 15 PTH12030W/L SLTS211H - MAY 2003 - REVISED DECEMBER 2008 .................................................................................................................................................... www.ti.com 2 U1 Track VI = 12 V 3 Vo 1 = 3.3 V 6 VI VO PTH12050W Inhibit GND 4 1 Adjust 5 + + CI1 CO1 RSET1 2.0 k 8 U3 VCC 7 SENSE RESET 2 5 RTRK # RESIN 1 3 50 TL7712A REF 0.1 F 9 Up Dn RESET 8 5 Track Sense CT 2 GND CREF 10 U2 6 4 CT 3.3 F VI VO PTH12060W Vo 2 = 1.8 V 6 RRST 10 k Inhibit 3 Adjust GND 1 7 4 + # RTRK = 100 / N N = Number of Track pins connected together C I2 RSET2 + CO2 11.5 k Figure 15. Sequenced Power Up and Power Down Using Auto-Track VTRK (1 V/div) VTRK (1 V/div) V01 (1 V/div) V01 (1 V/div) V02 (1 V/div) V02 (1 V/div) t - Time - 400 s/div t - Time - 20 ms/div Figure 16. Simultaneous Power Up with Auto-Track Control 16 Submit Documentation Feedback Figure 17. Simultaneous Power Down with Auto-Track Control Copyright (c) 2003-2008, Texas Instruments Incorporated Product Folder Link(s): PTH12030W/L PTH12030W/L www.ti.com .................................................................................................................................................... SLTS211H - MAY 2003 - REVISED DECEMBER 2008 Notes on Use of Auto-TrackTM 1. The Track pin voltage must be allowed to rise above the module set-point voltage before the module regulates at its adjusted set-point voltage. 2. The Auto-Track function tracks almost any voltage ramp during power up, and is compatible with ramp speeds of up to 1 V/ms. 3. The absolute maximum voltage that may be applied to the Track pin is the input voltage VI. 4. The module cannot follow a voltage at its track control input until it has completed its soft-start initialization. This takes about 40 ms from the time that a valid voltage has been applied to its input. During this period, it is recommended that the Track pin be held at ground potential. 5. The Auto-Track function is disabled by connecting the Track pin to the input voltage (VI). When Auto-Track is disabled, the output voltage rises at a quicker and more linear rate after input power has been applied. PREBIAS STARTUP CAPABILITY The capability to start up into an output prebias condition is now available to all the 12-V input, PTH series of power modules. (Note that this is a feature enhancement for the many of the W-suffix products).[1] A prebias startup condition occurs as a result of an external voltage being present at the output of a power module prior to its output becoming active. This often occurs in complex digital systems when current from another power source is backfed through a dual-supply logic component, such as an FPGA or ASIC. Another path might be via clamp diodes, sometimes used as part of a dual-supply power-up sequencing arrangement. A prebias can cause problems with power modules that incorporate synchronous rectifiers. This is because under most operating conditions, such modules can sink as well as source output current. The 12-V input PTH modules all incorporate synchronous rectifiers, but will not sink current during startup, or whenever the Inhibit pin is held low. Startup includes an initial delay (approximately 8 ms-15 ms), followed by the rise of the output voltage under the control of the module's internal soft-start mechanism; see Figure 18. UVLO Threshold VI (5 V/div) VO (1 V/div) Startup Period t - Time - 5 ms/div Figure 18. Startup Waveforms Submit Documentation Feedback Copyright (c) 2003-2008, Texas Instruments Incorporated Product Folder Link(s): PTH12030W/L 17 PTH12030W/L SLTS211H - MAY 2003 - REVISED DECEMBER 2008 .................................................................................................................................................... www.ti.com CONDITIONS FOR PREBIAS HOLDOFF In order for the module to allow an output prebias voltage to exist (and not sink current), certain conditions must be maintained. The module holds off a prebias voltage when the Inhibit pin is held low, and whenver the output is allowed to rise under soft-start control. Power up under soft-start control occurs upon the removal of the ground signal to the Inhibit pin (with input voltage applied), or when input power is applied with Auto-Track disabled.[2] To further ensure that the regulator doesn't sink output current, (even with a ground signal applied to its Inhibit), the input voltage must always be greater than the applied prebias source. This condition must exist throughout the power-up sequence.[3] The soft-start period is complete when the output begins rising above the prebias voltage. Once it is complete, the module functions as normal, and sinks current if voltage higher than the nominal regulation value is applied to its output. Note: If a prebias condition is not present, the soft-start period is complete when the output voltage has risen to either the set-point voltage, or the voltage applied at the module's Track control pin, whichever is lowest. DEMONSTRATION CIRCUIT Figure 19 shows the startup waveforms for the demonstration circuit shown in Figure 20. The initial rise in VO2 is the prebias voltage, which is passed from the VCCIO to the VCORE voltage rail through the ASIC. Note that the output current from the PTH12010L module (IO2) is negligible until its output voltage rises above the applied prebias. VO1 (1 V/div) VO2 (1 V/div) IO2 (5 V/div) t - Time - 10 ms/div Figure 19. Prebias Startup Waveforms NOTES 1. Output prebias holdoff is an inherent feature to all PTH120x0L and PTV120x0W/L modules. It has now been incorporated into all modules (including W-suffix modules with part numbers of the form PTH120x0W), with a production lot date code of 0423 or later. 2. The prebias start-up feature is not compatible with Auto-Track. If the rise in the output is limited by the voltage applied to the Track control pin, the output sinks current during the period that the track control voltage is below that of the back-feeding source. For this reason, it is recommended that Auto-Track be disabled when not being used. This is accomplished by connecting the Track pin to the input voltage, VI. This raises the Track pin voltage well above the set-point voltage prior to the module's start up, thereby defeating the Auto-Track feature. 3. To further ensure that the regulator's output does not sink current when power is first applied (even with a ground signal applied to the Inhibit control pin), the input voltage must always be greater than the applied prebias source. This condition must exist throughout the power-up sequence of the power system. 18 Submit Documentation Feedback Copyright (c) 2003-2008, Texas Instruments Incorporated Product Folder Link(s): PTH12030W/L PTH12030W/L www.ti.com .................................................................................................................................................... SLTS211H - MAY 2003 - REVISED DECEMBER 2008 10 9 8 5 Up Dn Tra ck VI = 12 V 2 VI GND 1 7 + C1 330 mF 10 9 2 R4 100 kW TL7702B 8 VCC 7 SENSE 5 RESET 2 RESIN 1 REF 6 RESET 3 CT GND 4 R5 C5 C6 10 k0 0.1 mF 0.68 mF VO PTH12020W Inhibit 3 R3 11 k0 Sense VI Inhibit 3 Adjust 4 R1 2 kW 8 5 Track Sense PTH12010L GND 1 7 6 VO VO1 = 3.3 V + 6 Vadj 4 C2 330 mF VO2 = 1.8 V + IO2 R2 130 W + C3 330 mF VC ORE + C4 330 mF VC CI O ASIC Figure 20. Application Circuit Demonstrating Prebias Startup MARGIN UP/DOWN CONTROLS The PTH12060, PTH12010, PTH12020, and PTH12030 products incorporate Margin Up and Margin Down control inputs. These controls allow the output voltage to be momentarily adjusted[1], either up or down, by a nominal 5%. This provides a convenient method for dynamically testing the operation of the load circuit over its supply margin or range. It can also be used to verify the function of supply voltage supervisors. The 5% change is applied to the adjusted output voltage, as set by the external resistor, RSET at the VO Adjust pin. The 5% adjustment is made by pulling the appropriate margin control input directly to the GND terminal.[2] A low-leakage open-drain device, such as an n-channel MOSFET or p-channel JFET is recommended for this purpose.[3] Adjustments of less than 5% can also be accommodated by adding series resistors to the control inputs. The value of the resistor can be selected from Table 6, or calculated using the following formula. MARGIN UP/DOWN ADJUST RESISTANCE CALCULATION To reduce the margin adjustment to a value less than 5%, series resistors are required (See RD and RU in Figure 21). For the same amount of adjustment, the resistor value calculated for RU and RD is the same. The formula is as follows. RU or RD = 499 - 99.8 kW D% (2) Where % = The desired amount of margin adjust in percent. Submit Documentation Feedback Copyright (c) 2003-2008, Texas Instruments Incorporated Product Folder Link(s): PTH12030W/L 19 PTH12030W/L SLTS211H - MAY 2003 - REVISED DECEMBER 2008 .................................................................................................................................................... www.ti.com Table 6. Margin Up/Down Resistor Values % ADJUST RU / RD(k) 5 0k 4 24.9 3 66.5 2 150 1 397 1 10 9 8 7 0V PT H12010W ( T op View) VI 2 RD +VO 6 3 + +VO 4 5 RU RSET 0.1 W, 1 % CI + L O A D CO Q1 Margin Down Q2 Margin Up GND GND Figure 21. Margin Up/Down Application Schematic MARGIN UP/DOWN NOTES 1. The Margin Up and Margin Down controls were not intended to be activated simultaneously. If they are their affects on the output voltage may not completely cancel, resulting in the possibility of a slightly higher error in the output voltage set point. 2. The ground reference should be a direct connection to the module GND at pin 7 (pin 1 for the PTHxx050). This will produce a more accurate adjustment at the load circuit terminals. The transistors Q1 and Q2 should be located close to the regulator. 3. The Margin Up and Margin Down control inputs are not compatible with devices that source voltage. This includes TTL logic. These are analog inputs and should only be controlled with a true open-drain device (preferably discrete MOSFET transistor). The device selected should have low off-state leakage current. Each input sources 8 A when grounded, and has an open-circuit voltage of 0.8 V. 20 Submit Documentation Feedback Copyright (c) 2003-2008, Texas Instruments Incorporated Product Folder Link(s): PTH12030W/L PTH12030W/L www.ti.com .................................................................................................................................................... SLTS211H - MAY 2003 - REVISED DECEMBER 2008 TAPE AND REEL SPECIFICATIONS TRAY SPECIFICATIONS Submit Documentation Feedback Copyright (c) 2003-2008, Texas Instruments Incorporated Product Folder Link(s): PTH12030W/L 21 PACKAGE OPTION ADDENDUM www.ti.com 13-Nov-2010 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish PTH12030LAH ACTIVE ThroughHole Module EUM 13 16 Pb-Free (RoHS) SN PTH12030LAS ACTIVE Surface Mount Module EUN 13 16 TBD PTH12030LAST ACTIVE Surface Mount Module EUN 13 200 PTH12030LAZ ACTIVE Surface Mount Module EUN 13 PTH12030LAZT ACTIVE Surface Mount Module EUN PTH12030WAD ACTIVE ThroughHole Module PTH12030WAH ACTIVE PTH12030WAS MSL Peak Temp (3) Samples (Requires Login) N / A for Pkg Type Request Free Samples SNPB Level-1-235C-UNLIM/ Level-3-260C-168HRS Request Free Samples TBD SNPB Level-1-235C-UNLIM/ Level-3-260C-168HRS Purchase Samples 16 Pb-Free (RoHS) SNAGCU Level-3-260C-168 HR Request Free Samples 13 200 Pb-Free (RoHS) SNAGCU Level-3-260C-168 HR Purchase Samples EUM 13 16 Pb-Free (RoHS) SN N / A for Pkg Type Purchase Samples ThroughHole Module EUM 13 16 Pb-Free (RoHS) SN N / A for Pkg Type Request Free Samples ACTIVE Surface Mount Module EUN 13 16 TBD SNPB Level-1-235C-UNLIM/ Level-3-260C-168HRS Request Free Samples PTH12030WAST ACTIVE Surface Mount Module EUN 13 200 TBD SNPB Level-1-235C-UNLIM/ Level-3-260C-168HRS Purchase Samples PTH12030WAZ ACTIVE Surface Mount Module EUN 13 16 Pb-Free (RoHS) SNAGCU Level-3-260C-168 HR Request Free Samples PTH12030WAZT ACTIVE Surface Mount Module EUN 13 200 Pb-Free (RoHS) SNAGCU Level-3-260C-168 HR Purchase Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 13-Nov-2010 Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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