7-649
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
CD4000BMS, CD4001BMS
CD4002BMS, CD4025BMS
CMOS NOR Gate
Pinouts
CD4000BMS
TOP VIEW
CD4001BMS
TOP VIEW
CD4002BMS
TOP VIEW
CD4025BMS
TOP VIEW
NC
NC
A
B
C
H = A + B + C
VSS
VDD
F
E
D
K = D + E + F
L = G
G
1
2
3
4
5
6
7
14
13
12
11
10
9
8NC = NO CONNECTION
A
B
J = A + B
K = C + D
C
D
VSS
VDD
H
G
M = G + H
L = E + F
F
E
1
2
3
4
5
6
7
14
13
12
11
10
9
8NC = NO CONNECTION
J = A + B + C + D
A
B
C
D
NC
VSS
VDD
K = E + F + G + H
H
G
F
E
NC
1
2
3
4
5
6
7
14
13
12
11
10
9
8NC = NO CONNECTION
A
B
D
E
F
K = D + E + F
VSS
VDD
G
H
I
L = G + H + I
J = A + B + C
C
1
2
3
4
5
6
7
14
13
12
11
10
9
8NC = NO CONNECTION
Features
• High-Voltage Types (20V Rating)
• Propagation Delay Time = 60ns (typ.) at CL = 50pF,
VDD = 10V
• Buffered Inputs and Outputs
• Standard Symmetrical Output Characteristics
• 100% Tested for Maximum Quiescent Current at 20V
• 5V, 10V and 15V Parametric Ratings
• Maximum Input Current of 1µA at 18V Over Full Pack-
age-Temperature Range; 100nA at 18V and +25oC
• Noise Margin (Over Full Package Temperature Range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• Meets All Requirements of JEDEC Tentative Stan-
dards No. 13B, “Standard Specifications for Descrip-
tion of “B” Series CMOS Device’s
Description
CD4000BMS, CD4001BMS, CD4002BMS, and
CD4025BMS NOR gates provide the system designer with
direct implementation of the NOR function and supplement
the existing family of CMOS gates. All inputs and outputs are
buffered.
The CD4000BMS, CD4001BMS, CD4002BMS and the
CD4025BMS is supplied in these 14 lead outline packages:
CD4000BMS - Dual 3 Plus Inverter
CD4001BMS - Quad 2 Input
CD4002BMS - Dual 4 Input
CD4025BMS - Triple 3 Input
CD4000B CD4001B CD4002B CD4025B
Braze Seal DIP H4X H4Q H4Q H4Q
Frit Seal DIP H1B H1B H1B H1B
Ceramic Flatpack H3W H3W H3W H3W
File Number 3289
November 1994
7-650
CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS
Functional Diagrams
CD4000BMS CD4001BMS
CD4002BMS CD4025BMS
NC
NC
A
B
C
H
VSS
VDD
F
E
D
K
L
G
1
2
3
4
5
6
7
14
13
12
11
10
9
8
K = D + E + F
H = A + B + C
L = G
A
B
J
K
C
D
VSS
VDD
H
G
M
L
F
E
1
2
3
4
5
6
7
14
13
12
11
10
9
8
J = A + B M = G + H
K = C + D
L = E + F
J
A
B
C
D
NC
VSS
VDD
K
H
G
F
E
NC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
K = E + F + G + H
J = A + B + C + D
A
B
D
E
F
K
VSS
VDD
G
H
I
L
J
C
1
2
3
4
5
6
7
14
13
12
11
10
9
8
L = G + H + I
K = D + E + F
J = A + B + C
7-651
Specifications CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS
Absolute Maximum Ratings Reliability Information
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
Operating Temperature Range. . . . . . . . . . . . . . . . -55oC to +125oC
Package Types D, F, K, H
Storage Temperature Range (TSTG). . . . . . . . . . . -65oC to +150oC
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC
At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for
10s Maximum
Thermal Resistance . . . . . . . . . . . . . . . . θja θjc
Ceramic DIP and FRIT Package. . . . . 80oC/W 20oC/W
Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W
Maximum Package Power Dissipation (PD) at +125oC
For TA = -55oC to +100oC (Package Type D, F, K). . . . . . 500mW
For TA = +100oC to +125oC (Package Type D, F, K) . . . . .Derate
Linearity at 12mW/oC to 200mW
Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW
For TA = Full Package Temperature Range (All Package Types)
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS (NOTE 1) GROUP A
SUBGROUPS TEMPERATURE
LIMITS
UNITSMIN MAX
Supply Current IDD VDD = 20V, VIN = VDD or GND 1 +25oC - 0.5 µA
2 +125oC-50µA
VDD = 18V, VIN = VDD or GND 3 -55oC - 0.5 µA
Input Leakage IIL VIN = VDD or GND VDD = 20 1 +25oC -100 - nA
2 +125oC -1000 - nA
VDD = 18V 3 -55oC -100 - nA
Input Leakage IIH VIN = VDD or GND VDD = 20 1 +25oC - 100 nA
2 +125oC - 1000 nA
VDD = 18V 3 -55oC - 100 nA
Output Voltage VOL15 VDD = 15V, No Load 1, 2, 3 +25oC, +125oC, -55oC - 50 mV
Output Voltage VOH15 VDD = 15V, No Load (Note 3) 1, 2, 3 +25oC, +125oC, -55oC 14.95 - V
Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1 +25oC 0.53 - mA
Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1 +25oC 1.4 - mA
Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1 +25oC 3.5 - mA
Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1 +25oC - -0.53 mA
Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1 +25oC - -1.8 mA
Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1 +25oC - -1.4 mA
Output Current (Source) IOH15 VDD = 15V, VOUT = 13.5V 1 +25oC - -3.5 mA
N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1 +25oC -2.8 -0.7 V
P Threshold Voltage VPTH VSS = 0V, IDD = 10µA 1 +25oC 0.7 2.8 V
Functional F VDD = 2.8V, VIN = VDD or GND 7 +25oC VOH >
VDD/2 VOL <
VDD/2 V
VDD = 20V, VIN = VDD or GND 7 +25oC
VDD = 18V, VIN = VDD or GND 8A +125oC
VDD = 3V, VIN = VDD or GND 8B -55oC
Input Voltage Low
(Note 2) VIL VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC - 1.5 V
Input Voltage High
(Note 2) VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC 3.5 - V
Input Voltage Low
(Note 2) VIL VDD = 15V, VOH > 13.5V,
VOL < 1.5V 1, 2, 3 +25oC, +125oC, -55oC- 4 V
Input Voltage High
(Note 2) VIH VDD = 15V, VOH > 13.5V,
VOL < 1.5V 1, 2, 3 +25oC, +125oC, -55oC11 - V
NOTES: 1. All voltages referenced to device GND, 100% testing being
implemented.
2. Go/No Go test with limits applied to inputs
3. For accuracy, voltage is measured differentially to VDD. Limit
is 0.050V max.
7-652
Specifications CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS (NOTE 1, 2) GROUP A
SUBGROUPS TEMPERATURE
LIMITS
UNITSMIN MAX
Propagation Delay TPHL
TPLH VDD = 5V, VIN = VDD or GND 9 +25oC - 250 ns
10, 11 +125oC, -55oC - 338 ns
Transition Time TTHL
TTLH VDD = 5V, VIN = VDD or GND 9 +25oC - 200 ns
10, 11 +125oC, -55oC - 270 ns
NOTES:
1. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
2. -55oC and +125oC limits guaranteed, 100% testing being implemented.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
LIMITS
UNITSMIN MAX
Supply Current IDD VDD = 5V, VIN = VDD or GND 1, 2 -55oC, +25oC - 0.25 µA
+125oC - 7.5 µA
VDD = 10V, VIN = VDD or GND 1, 2 -55oC, +25oC - 0.5 µA
+125oC - 1.5 µA
VDD = 15V, VIN = VDD or GND 1, 2 -55oC, +25oC - 0.5 µA
+125oC - 3.0 µA
Output Voltage VOL VDD = 5V, No Load 1, 2 +25oC, +125oC,
-55oC-50mV
Output Voltage VOL VDD = 10V, No Load 1, 2 +25oC, +125oC,
-55oC-50mV
Output Voltage VOH VDD = 5V, No Load 1, 2 +25oC, +125oC,
-55oC4.95 - V
Output Voltage VOH VDD = 10V, No Load 1, 2 +25oC, +125oC,
-55oC9.95 - V
Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1, 2 +125oC 0.36 - mA
-55oC 0.64 - mA
Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1, 2 +125oC 0.9 - mA
-55oC 1.6 - mA
Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1, 2 +125oC 2.4 - mA
-55oC 4.2 - mA
Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1, 2 +125oC - -0.36 mA
-55oC - -0.64 mA
Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1, 2 +125oC - -1.15 mA
-55oC - -2.0 mA
Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1, 2 +125oC - -0.9 mA
-55oC - -1.6 mA
Output Current (Source) IOH15 VDD =15V, VOUT = 13.5V 1, 2 +125oC - -2.4 mA
-55oC - -4.2 mA
Input Voltage Low VIL VDD = 10V, VOH > 9V, VOL <
1V 1, 2 +25oC, +125oC,
-55oC-3V
Input Voltage High VIH VDD = 10V, VOH > 9V, VOL <
1V 1, 2 +25oC, +125oC,
-55oC7-V
Propagation Delay TPHL
TPLH VDD = 10V 1, 2, 3 +25oC - 120 ns
VDD = 15V 1, 2, 3 +25oC - 90 ns
Transition Time TTHL
TTLH VDD = 10V 1, 2, 3 +25oC - 100 ns
VDD = 15V 1, 2, 3 +25oC - 80 ns
7-653
Specifications CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS
Input Capacitance CIN Any Input 1, 2 +25oC - 7.5 pF
NOTES:
1. All voltages referenced to device GND.
2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized
on initial design release and upon design changes which would affect these characteristics.
3. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
LIMITS
UNITSMIN MAX
Supply Current IDD VDD = 20V, VIN = VDD or GND 1, 4 +25oC - 2.5 µA
N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1, 4 +25oC -2.8 -0.2 V
N Threshold Voltage
Delta ∆VNTH VDD = 10V, ISS = -10µA 1, 4 +25oC-±1V
P Threshold Voltage VPTH VSS = 0V, IDD = 10µA 1, 4 +25oC 0.2 2.8 V
P Threshold Voltage
Delta ∆VPTH VSS = 0V, IDD = 10µA 1, 4 +25oC-±1V
Functional F VDD = 18V, VIN = VDD or GND 1 +25oC VOH >
VDD/2 VOL <
VDD/2 V
VDD = 3V, VIN = VDD or GND
Propagation Delay Time TPHL
TPLH VDD = 5V 1, 2, 3, 4 +25oC - 1.35 x
+25oC
Limit
ns
NOTES: 1. All voltages referenced to device GND.
2. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 3. See Table 2 for +25oC limit.
4. Read and Record
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC
PARAMETER SYMBOL DELTA LIMIT
Supply Current - SSI IDD ±0.1µA
Output Current (Sink) IOL5 ± 20% x Pre-Test Reading
Output Current (Source) IOH5A ± 20% x Pre-Test Reading
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUP MIL-STD-883
METHOD GROUP A SUBGROUPS READ AND RECORD
Initial Test (Pre Burn-In) 100% 5004 1, 7, 9 IDD, IOL5
Interim Test 1 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5
Interim Test 2 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5
PDA (Note 1) 100% 5004 1, 7, 9, Deltas
Interim Test 3 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A
PDA (Note 1) 100% 5004 1, 7, 9, Deltas
Final Test 100% 5004 2, 3, 8A, 8B, 10, 11
Group A Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11
Group B Subgroup B-5 Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroups 1, 2, 3, 9, 10, 11
Subgroup B-6 Sample 5005 1, 7, 9
Group D Sample 5005 1, 2, 3, 8A, 8B, 9 Subgroups 1, 2 3
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
LIMITS
UNITSMIN MAX
654
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Specifications CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS
TABLE 7. TOTAL DOSE IRRADIATION
CONFORMANCE GROUPS MIL-STD-883
METHOD
TEST READ AND RECORD
PRE-IRRAD POST-IRRAD PRE-IRRAD POST-IRRAD
Group E Subgroup 2 5005 1, 7, 9 Table 4 1, 9 Table 4
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
FUNCTION OPEN GROUND VDD 9V ± -0.5V
OSCILLATOR
50kHz 25kHz
PART NUMBER CD4000BMS
Static Burn-In 1
Note 1 1, 2, 6, 9, 10 3 - 5, 7, 8, 11 - 13 14
Static Burn-In 2
Note 1 1, 2, 6, 9, 10 7 3 - 5, 8, 11 - 14
Dynamic Burn-
In Note 1 1, 2 7 14 6, 9, 10 3 - 5, 8, 11 - 13
Irradiation
Note 2 1, 2, 6, 9, 10 7 3 - 5, 8, 11 - 14
PART NUMBER CD4001BMS
Static Burn-In 1
Note 1 3, 4, 10, 11 1, 2, 5 - 9, 12, 13 14
Static Burn-In 2
Note 1 3, 4, 10, 11 7 1, 2, 5, 6, 8, 9,
12 - 14
Dynamic Burn-
In Note 1 - 7 14 3, 4, 10, 11 1, 2, 5, 6, 8, 9,
12, 13
Irradiation
Note 2 3, 4, 10, 11 7 1, 2, 5, 6, 8, 9,
12 - 14
PART NUMBER CD4002BMS
Static Burn-In 1
Note 1 1, 6, 8, 13 2 - 5, 7, 9 - 12 14
Static Burn-In 2
Note 1 1, 6, 8, 13 7 2 - 5, 9 - 12, 14
Dynamic Burn-
In Note 1 6, 8 7 14 1, 13 2 - 5, 9 - 12
Irradiation
Note 2 1, 6, 8, 13 7 2 - 5, 9 - 12, 14
PART NUMBER CD4025BMS
Static Burn-In 1
Note 1 6, 9, 10 1 - 5, 7, 8, 11 - 13 14
Static Burn-In 2
Note 1 6, 9, 10 7 1 - 5, 8, 11 - 14
Dynamic Burn-
In Note 1 - 7 14 6, 9, 10 1 - 5, 8, 11 - 13
Irradiation
Note 2 6, 9, 10 7 1 - 5, 8, 11 - 14
NOTE:
1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and GND will have a series resistor of 47K ±5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD
= 10V ± 0.5V
7-655
Specifications CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS
Schematic and Logic Diagrams
CD4000BMS CD4001BMS
CD4002BMS CD4025BMS
5(12)
4(13)
6
(10)
LOGIC DIAGRAM
5*
3*
4*
(12)
(11)
(13)
p
n
pppp
n
n
n
n
n
p
n
p
6(10)
8*
VDD
14
VSS7
INVERTER AND 1 OF 2
GATES (NUMBERS IN
PARENTHESES ARE
p
n
p
n
p
n9
TERMINAL NUMBERS
FOR SECOND GATE)
89
3(11)
p
n
p
n
pp p
nn
n
1*
2*
(8, 6, 13)
(9, 5, 12)
VDD
14
VSS
7
3
(10, 4, 11)
1(8, 6,13)
2(9, 5, 12)
3
(10, 4, 11)
LOGIC DIAGRAM
1 OF 4 GATES (NUMBERS IN PARANTHESES
ARE TERMINAL NUMBERS FOR OTHER GATES)
VDD
VSS
*ALL INPUTS ARE
PROTECTED BY CMOS
PROTECTION NETWORK
2(12)
4(10)
1
(13)
5(9)
3(11)
2*
3*
4*
5*
(12)
(11)
(10)
(9)
p
n
ppppp
n
n
n
n
n
n
p
n
pn
p
1
(13)
VDD
14
VSS
7
LOGIC DIAGRAM
1 OF 2 GATES (NUMBERS IN
PARENTHESES ARE TERMINAL
NUMBERS FOR SECOND GATE)
3(1, 11)
5(8, 13)
6
(9, 10)
LOGIC DIAGRAM
3*
4*
5*
(1, 11)
(2, 12)
(8, 13)
p
n
pppp
n
n
n
n
n
p
n
p
6
(9, 10)
VDD
14
VSS
7
1 OF 3 GATES (NUMBERS IN
PARENTHESES ARE TERMINAL
NUMBERS FOR OTHER GATES)
4(2, 12)
7-656
CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS
Typical Performance Characteristics
FIGURE 1. TYPICAL VOLTAGE TRANSFER
CHARACTERISTICS FIGURE 2. TYPICAL POWER DISSIPATION vs FREQUENCY
FIGURE 3. TYPICAL OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS FIGURE 4. MINIMUM OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS
FIGURE 5. TYPICAL OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS FIGURE 6. MINIMUM OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS
AMBIENT TEMPERATURE (TA) = +25oC
SUPPLY VOLTAGE (VDD) = 15V
10V
5V
15
10
5
0 5 10 15 20 25
INPUT VOLTAGE (VI) (V)
OUTPUT VOLTAGE (VO) (V)
AMBIENT TEMPERATURE (TA) = +25oC
SUPPLY VOLTAGE (VDD) = 15V
10V
5V 10V
CL = 15pF
CL = 50pF
105
864286422
INPUT FREQUENCY (fI) (kHz)
11010
2103104
864 2864
8
6
4
2
8
6
4
2
8
6
4
2
8
6
4
2
104
103
102
10
POWER DISSIPATION PER GATE (PD) (µW)
AMBIENT TEMPERATURE (TA) = +25oC
10V
5V
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
OUTPUT LOW (SINK) CURRENT (IOL) (mA)
0 5 10 15
5
10
15
20
25
30
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
AMBIENT TEMPERATURE (TA) = +25oC
10V
5V
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
OUTPUT LOW (SINK) CURRENT (IOL) (mA)
0 5 10 15
2.5
5
7.5
10
12.5
15
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
GATE-TO-SOURCE VOLTAGE (VGS) = -5V
AMBIENT TEMPERATURE (TA) = +25oC
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
0-5-10-15
-5
-10
-15
-20
-25
-30
OUTPUT HIGH (SINK) CURRENT (IOH) (mA)
-10V
-15V
GATE-TO-SOURCE VOLTAGE (VGS) = -5V
AMBIENT TEMPERATURE (TA) = +25oC
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
0-5-10-15
-5
-10
-15
OUTPUT HIGH (SINK) CURRENT (IOH) (mA)
-10V
-15V
7-657
CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS
Typical Performance Characteristics (Continued)
Chip Dimensions and Pad Layouts
FIGURE 7. TYPICAL TRANSITION TIME vs LOAD
CAPACITANCE FIGURE 8. TYPICAL PROPAGATION DELAY TIME vs LOAD
CAPACITANCE
CD4000BMS CD4001BMS
CD4002BMS CD4025BMS
Dimensions in parentheses are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10-3 inch)
AMBIENT TEMPERATURE (TA) = +25oC
TRANSITION TIME (tTHL, tTLH) (ns)
50
100
150
200
020406080100
10V
15V
SUPPLY VOLTAGE (VDD) = 5V
LOAD CAPACITANCE (CL) (pF)
AMBIENT TEMPERATURE (TA) = +25oC
10V
15V
SUPPLY VOLTAGE (VDD) = 5V
LOAD CAPACITANCE (CL) (pF)
PROPAGATION DELAY TIME PER GATE
(tPHL, tPLH) (ns)
200
175
150
125
100
75
50
25
010 20 30 40 50 60 70 80 90 100