Precision 2.5 V, 5.0 V, and 10.0 V
Voltage References
REF01/REF02/REF03
Rev. J
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
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Fax: 781.461.3113 ©2000–2009 Analog Devices, Inc. All rights reserved.
FEATURES
High output accuracy
REF01: 10.0 V, ±0.3% maximum
REF02: 5.0 V, ±0.3% maximum
REF03: 2.5 V, ±0.6% maximum
Adjustable output: ± 3% minimum
Excellent temperature stability
REF01: 8.5 ppm/°C maximum
REF02: 8.5 ppm/°C maximum
REF03: 50 ppm/°C maximum
Low noise
REF01: 30 μV p-p typical
REF02: 15 μV p-p typical
REF03: 6 μV p-p typical
High supply voltage range: up to 36 V maximum
Low supply current: 1.4 mA maximum
High load-driving capability: 10 mA maximum
Temperature output function
APPLICATIONS
Precision data systems
High resolution converters
Industrial process control systems
Precision instruments
Military and aerospace applications
GENERAL DESCRIPTION
The REF0x series of precision voltage references provide a
stable 10.0 V, 5.0 V, or 2.5 V output with minimal change in
response to variations in supply voltage, ambient temperature
or load conditions. The parts are available in 8-lead SOIC,
PDIP, CERDIP, and TO-99 packages, as well as 20-terminal
LCC packages (883 only), furthering the parts’ usability in
both standard and high stress applications.
With an external buffer and a simple resistor network, the
TEMP terminal can be used for temperature sensing and
approximation. A TRIM terminal is also provided on the
device for fine adjustment of the output voltage.
The small footprint, wide supply range, and application
versatility make the REF0x series of references ideal for general-
purpose and space-constrained applications.
Newer designs should use the ADR0x series of references,
which offer higher accuracy and temperature stability over a
wider operating temperature range, while maintaining full pin-
for-pin compatibility with the REF0x series. This data sheet
applies to commercial-grade products only. Contact sales or
visit analog.com for military-grade (883) data sheets.
Table 1. Selection Guide
Part Number Output Voltage Input Voltage Range
REF01 10.0 V 12 V to 36 V
REF02 5.0 V 7.0 V to 36 V
REF03 2.5 V 4.5 V to 36 V
PIN CONFIGURATIONS
00375-001
REF01/
REF02/
REF03
TOP VIEW
(No t to Scale)
NC
1
NC
NC
V
OUT
TRIM
8
V
IN 27
TEMP
3 6
GND
4 5
NC = NO CONNECT. DO NOT CONNE CT ANYTHING
ON THESE PINS. SOME OF THEMARE RESERVED
FOR FACTORY TESTING PURPOSES.
Figure 1. 8-Lead PDIP (P-Suffix),
8-Lead CERDIP (Z-Suffix),
8-Lead SOIC (S-Suffix)
00375-002
1
2
345
6
7
8
NC
GROUND
(CASE)
NC
V
IN
V
OUT
NC
NC TRIM
NC = NO CONNECT. DO NOT CONNE CT ANYT HING
ON THESE PINS. SOME OF THEMARE RESERVED
FO R FACTORY TEST ING P URP OSE S .
REF01/
REF02/
REF03
Figure 2. 8-Lead TO-99 (J-Suffix)
00375-003
4
NC
5
V
IN
6
NC
7
TEMP
8
NC
18
NC
17
NC
16
NC
15
V
OUT
14
NC
19
NC
20
NC
1
NC
2
NC
3
NC
13
NC
12
TRIM
11
NC
10
GND
9
NC
REF01/
REF02
TOP V IEW
(Not to Scale)
NC = NO CONNECT. DO NO T CO NNE CT ANYTHING
ON THESE PINS. SOME OF THEMARE RESERVED
FOR FACTORY TESTING PURPOSES.
Figure 3. 20-Terminal LCC (RC-Suffix;
883 Parts Only)
REF01/REF02/REF03
Rev. J | Page 2 of 20
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Pin Configurations ........................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
REF01 Specifications .................................................................... 3
REF02 Specifications .................................................................... 4
REF03 Specifications .................................................................... 5
Absolute Maximum Ratings ............................................................ 6
Thermal Resistance ...................................................................... 6
ESD Caution .................................................................................. 6
Pin Configurations and Function Descriptions ........................... 7
Typical Performance Characteristics ............................................. 8
Terminology .................................................................................... 13
Theory of Operation ...................................................................... 14
Input and Output Capacitors .................................................... 14
Output Adjustment .................................................................... 14
Temperature Monitoring ........................................................... 14
Long-Term Stability ................................................................... 15
Burn-In ........................................................................................ 15
Power Dissipation....................................................................... 15
Applications Information .............................................................. 16
Basic Reference Application...................................................... 16
Negative Reference ..................................................................... 16
Low Cost Current Source .......................................................... 16
Precision Current Source with Adjustable Output ................ 16
Precision Boosted Output Regulator ....................................... 17
Bipolar Voltage Reference ......................................................... 17
Adjustable Reference With Positive and Negative Swing ..... 17
Outline Dimensions ....................................................................... 18
REF01 Ordering Guide .............................................................. 20
REF02 Ordering Guide .............................................................. 20
REF03 Ordering Guide .............................................................. 20
REVISION HISTORY
10/09—Rev. J: Initial Version
Updated Format .................................................................. Universal
Combined REF01, REF02, and REF03 Data Sheets ....... Universal
Changes to Absolute Maximum Input Voltage............................. 6
REF01/REF02/REF03
Rev. J | Page 3 of 20
SPECIFICATIONS
REF01 SPECIFICATIONS
VIN = 15 V, TA = 25°C, ILOAD = 0 mA, all grades, unless otherwise noted.
Parameter Symbol Conditions Min Typ Max Unit
OUTPUT VOLTAGE VO A and E grades 9.97 10.00 10.03 V
H grade 9.95 10.00 10.05 V
C grade 9.90 10.00 10.10 V
OUTPUT ADJUSTMENT RANGE1 ΔVTRIM A, E and H grades, POT = 10 kΩ ±3.0 ±3.3 %
C grade, POT = 10 kΩ ±2.7 ±3.0 %
INITIAL ACCURACY VOERR A and E grades ±30 mV
±0.3 %
H grade ±50 mV
±0.5 %
C grade ±100 mV
±1.0 %
TEMPERATURE COEFFICIENT TCVO A and E grades, −55°C ≤ TA ≤ +125°C 3.0 8.5 ppm/°C
H grade, 0°C ≤ TA ≤ +70°C 10 25 ppm/°C
C grade, 0°C ≤ TA ≤ +70°C (-J and -Z packages) 20 65 ppm/°C
C grade, −40 ≤ TA ≤ +85°C (-P and -S packages) 20 65 ppm/°C
LINE REGULATION2 ∆VO/∆VIN A, E and H grades, VIN = 13 V to 33 V 60 100 ppm/V
A, E and H grades, VIN = 13 V to 33 V, 0°C ≤ TA ≤ +70°C 70 120 ppm/V
A, E and H grades, VIN = 13 V to 33 V, −55°C ≤ TA ≤ +125°C 90 150 ppm/V
C grade, VIN = 13 V to 33 V 90 150 ppm/V
C grade, VIN = 13 V to 30 V, 0°C ≤ TA ≤ +70°C (-J and -Z packages) 110 180 ppm/V
C grade, VIN = 13 V to 30 V, −40°C ≤ TA ≤ +85°C (-P and -S packages) 110 180 ppm/V
LOAD REGULATION2 ∆VO/∆ILOAD A and E grades, ILOAD = 0 mA to 10 mA 50 80 ppm/mA
A and E grades, ILOAD = 0 mA to 8 mA, 0°C ≤ TA ≤ +70°C 60 100 ppm/mA
A and E grades, ILOAD = 0 mA to 8 mA, −55°C ≤ TA ≤ +125°C 90 150 ppm/mA
H grade, ILOAD = 0 mA to 10 mA 60 100 ppm/mA
H grade, ILOAD = 0 mA to 8 mA, 0°C ≤ TA ≤ +70°C 70 120 ppm/mA
H grade, ILOAD = 0 mA to 8 mA, −50°C ≤ TA ≤ +125°C 90 150 ppm/mA
C grade, ILOAD = 0 mA to 8 mA 60 150 ppm/mA
C grade, ILOAD = 0 mA to 5 mA, 0°C ≤ TA ≤ +70°C (-J and -Z packages) 80 180 ppm/mA
C grade, ILOAD = 0 mA to 5 mA, −40°C ≤ TA ≤ +85°C (-P and -S packages) 80 180 ppm/mA
DROPOUT VOLTAGE VDO 2 V
QUIESCENT CURRENT IIN A, E, and H grades 1.0 1.4 mA
C grade 1.0 1.6 mA
LOAD CURRENT ILOAD
Sourcing A, E, and H grades 10 mA
C grade 8 mA
Sinking −0.3 mA
SHORT CIRCUIT TO GND ISC V
O = 0 V 30 mA
VOLTAGE NOISE eN p-p 0.1 Hz to 10.0 Hz (-S, -Z and -P packages) 30 μV p-p
0.1 Hz to 10.0 Hz (-J package) 35 μV p-p
LONG-TERM STABILITY3 ∆VO After 1000 hours of operation 50 ppm
TURN-ON SETTLING TIME tR Output settling to within ±0.1% of final value 5 μs
TEMPERATURE SENSOR4
Voltage Output at TEMP Pin VTEMP 580 mV
Temperature Sensitivity TCVTEMP 1.96 mV/°C
1 Refer to the section. Output Adjustment
2 Specification includes the effects of self-heating.
3 Long-term stability is noncumulative; the drift in subsequent 1000-hour periods is significantly lower than in the first 1000-hour periods. Refer to Application Note AN-713.
4 Refer to the Temperature Monitoring section.
REF01/REF02/REF03
Rev. J | Page 4 of 20
REF02 SPECIFICATIONS
VIN = 15 V, TA = 25°C, ILOAD = 0 mA, all grades, unless otherwise noted. Nongraded refers to REF02Z.
Parameter Symbol Conditions Min Typ Max Unit
OUTPUT VOLTAGE VO A and E grades 4.985 5.000 5.015 V
H grade and nongraded 4.975 5.000 5.025 V
C grade 4.950 5.000 5.050 V
OUTPUT ADJUSTMENT RANGE1 ΔVTRIM A, E, H grades and nongraded, POT = 10 kΩ ±3.0 ±6.0 %
C grade, POT = 10 kΩ ±2.7 ±6.0 %
INITIAL ACCURACY VOERR A and E grades ±15 mV
±0.3 %
H grade and nongraded ±25 mV
±0.5 %
C grade ±50 mV
±1 %
TEMPERATURE COEFFICIENT TCVO A grade and non-graded, −55°C ≤ TA ≤ +125°C 3 8.5 ppm/°C
E and H grades, 0°C ≤ TA ≤ +70°C 10 25 ppm/°C
C grade, 0°C ≤ TA ≤ +70°C (-J and -Z packages) 20 65 ppm/°C
C grade, −40 ≤ TA ≤ +85°C (-P and -S packages) 20 65 ppm/°C
LINE REGULATION2 ∆VO/∆VIN A, E, H grades and nongraded, VIN = 8 V to 36 V 60 100 ppm/V
A, E, H grades and nongraded, VIN = 8 V to 36 V, 0°C ≤ TA ≤ +70°C 70 120 ppm/V
A, E, H grades and nongraded, VIN = 8V to 36 V, −55°C ≤ TA ≤ +125°C 90 150 ppm/V
C grade, VIN = 8 V to 36 V 90 150 ppm/V
C grade, VIN = 8 V to 36 V, 0°C ≤ TA ≤ +70°C (-J and -Z packages) 110 180 ppm/V
C grade, VIN = 8 V to 36 V,−40°C ≤ TA ≤ +85°C (-P and -S packages) 110 180 ppm/V
LOAD REGULATION2 ∆VO/∆ILOAD A and E grades, ILOAD = 0 mA to 10 mA 60 100 ppm/mA
A and E grades, ILOAD = 0 mA to 8 mA, 0°C ≤ TA ≤ +70°C 60 100 ppm/mA
A and E grades, ILOAD = 0 mA to 8 mA, −55°C ≤ TA ≤ +125°C 70 120 ppm/mA
H grade and nongraded, ILOAD = 0 mA to 10 mA 60 100 ppm/mA
H grade and nongraded, ILOAD = 0 mA to 8 mA, 0°C ≤ TA ≤ +70°C 70 120 ppm/mA
H grade and nongraded, ILOAD = 0 mA to 8 mA, −50°C ≤ TA ≤ +125°C 90 150 ppm/mA
C grade, ILOAD = 0 mA to 8 mA 60 150 ppm/mA
C grade, ILOAD = 0 mA to 5 mA, 0°C ≤ TA ≤ +70°C (-J and -Z packages) 80 180 ppm/mA
C grade, ILOAD = 0 mA to 5 mA, −40°C ≤ TA ≤ +85°C (-P and -S packages) 80 180 ppm/mA
DROPOUT VOLTAGE VDO 2 V
QUIESCENT CURRENT IIN A, E, H grades and nongraded 1.0 1.4 mA
C grade 1.0 1.6 mA
LOAD CURRENT ILOAD
Sourcing A, E, H grades and nongraded 10 mA
C grade 8 mA
Sinking
−0.3 mA
SHORT CIRCUIT TO GND ISC V
O = 0 V 30 mA
VOLTAGE NOISE eN p-p 0.1 Hz to 10.0 Hz (-S, -Z and -P packages) 15 μV p-p
0.1 Hz to 10.0 Hz (-J package) 20 μV p-p
LONG-TERM STABILITY3 ∆VO After 1000 hours of operation 50 ppm
TURN-ON SETTLING TIME tR Output settling to within ±0.1% of final value 5 μs
TEMPERATURE SENSOR4
Voltage Output at TEMP Pin VTEMP 580 mV
Temperature Sensitivity TCVTEMP 1.96 mV/°C
1 Refer to the section. Output Adjustment
2 Specification includes the effects of self-heating.
3 Long-term stability is noncumulative; the drift in subsequent 1000-hour periods is significantly lower than in the first 1000-hour periods. Refer to Application Note AN-713.
4 Refer to the Temperature Monitoring section.
REF01/REF02/REF03
Rev. J | Page 5 of 20
REF03 SPECIFICATIONS
VIN = 15 V, −40°C ≤ TA ≤ +85°C, ILOAD = 0 mA, unless otherwise noted.
Parameter Symbol Conditions Min Typ Max Unit
OUTPUT VOLTAGE VO 2.495 2.500 2.515 V
OUTPUT ADJUSTMENT RANGE1 ΔVTRIM POT = 10 kΩ ±6 ±11 %
INITIAL ACCURACY VOERR ±15 mV
±0.6 %
TEMPERATURE COEFFICIENT TCVO 10 50 ppm/°C
LINE REGULATION2 ∆VO/∆VIN V
IN = 4.5 V to 33 V 20 50 ppm/V
LOAD REGULATION2 ∆VO/∆ILOAD I
LOAD = 0 mA to 10 mA 60 100 ppm/mA
DROPOUT VOLTAGE VDO 2 V
QUIESCENT CURRENT IIN 1.0 1.4 mA
LOAD CURRENT ILOAD
Sourcing 10 mA
Sinking −0.3 mA
SHORT CIRCUIT TO GND ISC V
O = 0 V 24 mA
VOLTAGE NOISE eN p-p 0.1 Hz to 10.0 Hz 6 μV p-p
LONG-TERM STABILITY3 ∆VO After 1000 hours of operation 50 ppm
TURN-ON SETTLING TIME tR Output settling to within ±0.1% of final value 5 μs
TEMPERATURE SENSOR4
Voltage Output at TEMP Pin VTEMP 580 mV
Temperature Sensitivity TCVTEMP 1.96 mV/°C
1 Refer to the section. Output Adjustment
2 Specification includes the effects of self-heating.
3 Long-term stability is non-cumulative; the drift in subsequent 1000-hour periods is significantly lower than in the first 1000-hour periods. Refer to Application Note AN-713.
4 Refer to the Temperature Monitoring section.
REF01/REF02/REF03
Rev. J | Page 6 of 20
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Input Voltage 36.0 V
Output Short Circuit Duration Indefinite
Operating Temperature Range
REF01A, REF02A −55°C to +125°C
REF01CP, REF01CS, REF01E, REF01H,
REF02CP, REF02CS, REF02E, REF02H,
REF03G
−40°C to +85°C
REF01CJ 0°C to +70°C
Storage Temperature Range
-J, -S, -Z and -RC Packages −65°C to +150°C
-P Package −65°C to +125°C
Junction Temperature Range (TJ) −65°C to +150°C
Lead Temperature (Soldering, 10 sec.) 300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3. Thermal Resistance
Package Type θJA θ
JC Unit
8-lead SOIC (S) 130 43 °C/W
8-lead PDIP (P) 110 50 °C/W
8-lead CERDIP (Z) 162 26 °C/W
TO-99 (J) 170 24 °C/W
ESD CAUTION
REF01/REF02/REF03
Rev. J | Page 7 of 20
00375-004
REF01/
REF02/
REF03
TOP VIEW
(No t to Scale)
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
NC
1
NC
8
NC
V
OUT
TRIM
V
IN 27
TEMP
3 6
GND
4 5
Figure 4. 8-Lead PDIP (P-Suffix), 8-Lead CERDIP (Z-Suffix), 8-Lead SOIC (S-Suffix) Pin Configuration
Table 4. Pin Function Descriptions—PDIP, CERDIP, and SOIC Packages
Pin No. Mnemonic Description
1, 7, 8 NC No Internal Connection. Leave floating or tied to ground in actual application.
2 VIN Supply Voltage Input.
3 TEMP Temperature (Band Gap) Output. Refer to the Temperature Monitoring section.
4 GND Ground Connection.
5 TRIM Output Voltage Trim. Refer to the Output Adjustment section.
6 VOUT Reference Voltage Output.
1
26
7
8
NC
NC
345
GROUND
(CASE)
V
IN VOUT
NC
REF01/
REF02/
00375-005
NC TRIM
REF03
Figure 5. 8-Lead TO-99 (J-Suffix) Pin Configuration
Table 5. Pin Function Descriptions—8-Lead TO-99 Package
Pin No. Mnemonic Description
1, 3, 7, 8 NC No Internal Connection. Leave floating or tied to ground in actual application.
2 VIN Supply Voltage Input.
4 GND Ground Connection.
5 TRIM Output Voltage Trim. Refer to the Output Adjustment section.
6 VOUT Reference Voltage Output.
4
NC
5
V
IN
6
NC
7
TEMP
8
NC
14
NC
18
NC
17
NC
16
NC
15
V
OUT
19
NC
20
NC
1
NC
2
NC
3
NC
00375-006
13
NC
12
TRIM
11
NC
10
GND
9
NC
REF01/
REF02
TOP VI EW
(No t t o S cale)
Figure 6. 20-Terminal LCC (RC-Suffix) Pin Configuration
Table 6. Pin Function Descriptions—20-Terminal LCC Package
Terminal No. Mnemonic Description
1 to4, 6, 8, 9, 11,
13, 14, 16 to 20
NC No Internal Connection. Leave floating or tied to ground in actual application.
5 VIN Supply Voltage Input.
7 TEMP Temperature (Band Gap) Output. Refer to the Temperature Monitoring section.
10 GND Ground Connection.
12 TRIM Output Voltage Trim. Refer to the Output Adjustment section.
15 VOUT Reference Voltage Output.
REF01/REF02/REF03
Rev. J | Page 8 of 20
TYPICAL PERFORMANCE CHARACTERISTICS
TEMPERATURE (°C)
V
OUT
(V)
10.010
10.005
10.000
9.995
9.990
9.985
–40 –25 –10 5 20 35 50 65 80 95 110 125
00375-007
Figure 7. REF01 Typical Output Voltage vs. Temperature
TEM PE RATURE (°C)
V
OUT
(V)
5.008
5.004
5.000
4.996
4.992
–40 –25 –10 5 20 35 50 65 80 95 110 125
00375-008
Figure 8. REF02 Typical Output Voltage vs. Temperature
TEM P ERATURE (°C)
–40
V
OUT
(V)
2.502
2.501
–25 –10 5 20 35 50 65 80 95 110 125
2.500
2.499
2.498
00375-009
Figure 9. REF03 Typical Output Voltage vs. Temperature
12 2816 20 24 32 36 40
SUPP LY CURRENT (mA)
0.8
0.7
0.6
0.5
0.4
INPUT VOLTAGE (V)
+125°C
+25°C
–40°C
00375-010
Figure 10. REF01 Supply Current vs. Input Voltage
12 2816 20 24 32 36 408
SUPP LY CURRENT (mA)
+125°C
0.8
0.7
0.6
0.5
0.4
INPUT VOLTAGE (V)
+25°C
–40°C
00375-011
Figure 11. REF02 Supply Current vs. Input Voltage
INPUT VOLTAGE (V)
5
SUPP LY CURRENT (mA)
10 15 20 25 30 35 40
0.40
0.45
0.50
0.55
0.60
0.65
0.70
0.75
0.80
0.85
+125°C
–40°C
+25°C
00375-012
Figure 12. REF03 Supply Current vs. Input Voltage
REF01/REF02/REF03
Rev. J | Page 9 of 20
40
20
0
25 85 125
30
10
I
L
= 0mA T O 10mA
LO AD RE GULAT IO N ( ppm/mA)
TEMPERAT URE (°C)
00375-
V
IN
= 36V
V
IN
= 14V
500–40
–40
–30
–20
–10
013
Figure 13. REF01 Load Regulation vs. Temperature
40
20
0
50
85 125
30
10
I
L
= 0mA TO 5mA
LOAD REGULATION (ppm/mA)
TEM P ERATURE (°C)
00375-
V
IN
= 36V
V
IN
= 8V
25
0–40
–20
–10
014
Figure 14. REF02 Load Regulation vs. Temperature
LOAD REGULATION (ppm/mA)
10
20
30
40
50
60
0
TEM P E RATURE (°C)
–40 –25 –10 520 35 50 65 80 95 110 125
V
IN
= 36V
V
IN
= 7V
I
L
= 0mA TO 10m A
00375-015
Figure 15. REF03 Load Regulation vs. Temperature
0
–4
2
–2
–6
–8
TEMPERATURE (°C)
LINE REG UL
A
TION (ppm/V)
–10
–40 –25 –10 520 35 50 65 80 95 110 125
V
IN
= 14V TO 36V
00375-016
Figure 16. REF01 Line Regulation vs. Temperature
4
–4
8
0
–8
TEMPERATURE (°C)
LI NE RE GUL
A
TION (ppm/V)
V
IN
= 8V TO 36V
–40 –25 –10 520 35 50 65 80 95 110 125
00375-017
Figure 17. REF02 Line Regulation vs. Temperature
LINE REGUL
A
TION (ppm/mV)
–4
–2
0
2
4
TEMPERATURE (°C)
–40 –25 –10 52035
50 65 80 95 110 125
V
IN
= 5V TO 36 V
00375-018
Figure 18. REF03 Line Regulation vs. Temperature
REF01/REF02/REF03
Rev. J | Page 10 of 20
3
1
5
2
4
04602 810
DROPO UT VOLTAGE ( V)
–40°C
+125°C
LO AD CURRENT (mA)
+25°C
1900375-0
Figure 19. REF01 Dropout Voltage vs. Load Current
460 2
6
2
0
4
+25°C
–40°C
+125°C
DROPOUT VOLTAGE (V)
LOAD CURRENT ( mA)
810
0
0375-020
Figure 20. REF02 Dropout Voltage vs. Load Current
3
1
5
2
4
DROPO UT VOLTAGE ( V)
+125°C
04602
LO AD CURRENT (m A)
810
+25°C
–40°C
6
0
0375-021
Figure 21. REF03 Dropout Voltage vs. Load Current
0
0.50 246
TA = 25°C
LO AD CURRENT (mA)
810
QUIESCENT CURRENT ( mA)
0.55
0.60
0.65
0.70
0
0375-022
Figure 22. REF01 Quiescent Current vs. Load Current
00375-023
TI M E (1s/DIV )
1µV/DI
V
Figure 23. REF02 Typical Low-Frequency Voltage Noise (0.1 Hz to 10.0 Hz)
00375-024
TIME (1ms/DIV)
50µV/DI
V
Figure 24. REF02 Typical Wideband Voltage Noise (10 Hz to 10 kHz)
REF01/REF02/REF03
Rev. J | Page 11 of 20
00375-025
TIME (2ms/DIV)
V
OUT
5V/DIV
NO L O AD CAPACI TOR
NO I NPUT CAPACI TO R
10V
8V
Figure 25. REF02 Line Transient Response
00375-026
TIME (1ms/DIV)
LOAD = 5mA
NO L O AD CAPACI TOR
V
IN
5V/DIV
V
OUT
100mV/DIV
LO AD OFF LOAD O N
Figure 26. REF02 Load Transient Response
00375-027
TIME (1ms/DIV)
C
LOAD
= 100n F
V
IN
5V/DIV
LO AD = 5mA
V
OUT
100mV/DIV
LO AD OFF LOAD ON
Figure 27. REF02 Load Transient Response
00375-028
TIME (4µs/DIV)
CIN = 0.01µF
NO L OAD CAPACITO R
VIN 10V/DIV
VOUT 5V/DIV
Figure 28. REF02 Turn-Off Response
00375-029
TIME (4µs/DIV)
CIN = 0.01µF
NO LOAD CAPACITOR VIN 10V/DIV
VOUT 5V/DIV
Figure 29. REF02 Turn-On Response
00375-030
TIME (4µs/DIV)
CL = 0. 01µF
NO I NPUT CAPACI TOR
VIN 10V/DIV
VOUT 5V/DIV
Figure 30. REF02 Turn-Off Response (No Input Capacitor)
REF01/REF02/REF03
Rev. J | Page 12 of 20
00375-031
TIME (4µs/DIV)
CL = 0. 01µF
NO I NP UT CAPACITOR VIN 10V/DIV
VOUT 5V/DIV
Figure 31. REF02 Turn-Off Response (No Input Capacitor)
12525 50 75 100
0.80
0.75
0.70
0.65
0.60
0.55
0.50
0.45
0.40 –25 0–50
TEMPERATURE (°C)
00375-032
VIN = 15V
SAMPLE SIZE = 5
V
TEMP
(V)
ΔVTEMP/ΔT ≈ 1.96mV/°C
Figure 32. Output Voltage at TEMP Pin vs. Temperature
REF01/REF02/REF03
Rev. J | Page 13 of 20
()
TERMINOLOGY
Dropout Voltage (VDO)
Dropout voltage, sometimes referred to as supply voltage
headroom or supply-output voltage differential, is defined as
the minimum voltage differential between the input and output
necessary for the device to operate.
constant
min =
−= L
OUTINDO I
VVV
()
()
Since the dropout voltage depends upon the current passing
through the device, it is always specified for a given load
current.
Temperature Coefficient (TCVO)
The temperature coefficient relates the change in output voltage
to the change in ambient temperature of the device, as normal-
ized by the output voltage at 25°C. This parameter is expressed
in ppm/°C and can be determined by the following equation:
() ()
[]
Cppm/10
C25
6o
o×
−×
=
12
OUT
1
OUT
2
OUT
OUT TTV
TCV −TVTV
where:
VOUT(25°C) is output voltage at 25°C.
VOUT(T1) is output voltage at temperature 1.
VOUT(T2) is output voltage at temperature 2.
Thermally Induced Output Voltage Hysteresis (ΔVOUT_HYS)
Thermally induced output voltage hysteresis represents the
change in output voltage after the device is exposed to a
specified temperature cycle. This may be expressed as either a
shift in voltage or a difference in ppm from the nominal output.
()
[]
VC25 _
_TC
OUTOUTHYSOUT VVV −= o
()
()
[]
ppm10
C25
C25 6
_
_×
−
=o
o
OUT
TCOUTOUT
HYSOUT V
VV
V
where:
VOUT(25°C)is output voltage at 25°C.
VOUT_TC is output voltage after temperature cycling.
Thermal hysteresis occurs mainly as a result of forces exhibited
upon the internal die by its packaging. The effect is more
pronounced in parts with smaller packages.
Long-Term Stability (ΔVOUT_LTD)
Long-term stability refers to the shift in output voltage at 25°C
after 1000 hours of operation in a 25°C environment. This may
also be expressed as either a shift in voltage or a difference in
ppm from the nominal output.
(
)
()
[]
V
0
_tVtVΔV OUT
1
OUTLTDOUT −=
(
)
()
()
[]
ppm
tV
tVtV
ΔV
OUT
OUT
1
OUT
LTDOUT
6
0
0
_10×
−
=
where:
VOUT(t0) is VOUT at 25°C at time 0.
VOUT(t1) is VOUT at 25°C after 1000 hours of operation at 25°C.
Line Regulation
Line regulation refers to the change in output voltage in
response to a given change in input voltage. It is expressed in
either percent per volt, ppm per volt, or microvolt per volt
change in input voltage. This parameter accounts for the effects
of self-heating.
Load Regulation
Load regulation refers to the change in output voltage in
response to a given change in load current, and is expressed
in either microvolts per milliamp, ppm per milliamp, or ohms
of DC output resistance. This parameter accounts for the effects
of self-heating.
REF01/REF02/REF03
Rev. J | Page 14 of 20
THEORY OF OPERATION
REF01, REF02, and REF03 are high precision, low drift 10.0 V,
5.0 V, and 2.5 V voltage references available in a variety of
packages. These devices are standard band gap references (see
Figure 33). The band gap cell contains two NPN transistors
(Q18 and Q19) that differ in emitter area by a factor of 2. The
difference in the VBE values of these transistors produces a
proportional-to-absolute temperature current (PTAT) through
R14, and, when combined with the VBE of Q19, produces a band
gap voltage, VBG, that is almost constant over temperature.
With an internal op amp and the feedback network created by
R5 and R6, VO is set precisely at 10.0 V, 5.0 V, or 2.5 V. Precision
laser trimming of various resistors and other proprietary circuit
techniques are used to further enhance the initial accuracy,
temperature curvature, and drift performance of the device.
The PTAT voltage is brought out directly from the band gap,
unbuffered, at the TEMP pin. Since this voltage output has a
stable 1.96 mV/°C temperature coefficient, users can estimate
the temperature change of the device by simply monitoring the
change in voltage at this pin.
R1 R2 R3 R4
V
IN
Q23
Q1 Q2 Q7 Q8
Q9
Q3 Q10
D1
D2
Q4 VO
D3 C1
R13 Q12 Q13 R5
I1
R12
Q14 Q15
2× 1× VBG
R20 TRIM
Q18
TEMP
R27 Q19
Q16 Q17
Q20 R6
R24
R32
R14
3
R42
R41
R11
R17 GND
00375-03
Figure 33. REF0x Simplified Schematic
INPUT AND OUTPUT CAPACITORS
Figure 34 shows the basic input/output capacitor configuration
for the REF0x series of references.
U1
REF01/
REF02/
REF03
V
O
C2
0.1µF
C1
0.1µF
V
IN
V
IN
V
OUT
TEMP TRIM
GND
3400375-0
Figure 34. Basic REF0x Capacitor Configuration
While the REF0x series of references are designed to function
stably without any external components, connecting a 0.1 F
ceramic capacitor to the output is highly recommended to
improve stability and filter out low level voltage noise. An
additional 1 F to 10 F electrolytic, tantalum, or ceramic
capacitor can be added in parallel to improve transient perfor-
mance in response to sudden changes in load current; however,
the designer should keep in mind that doing so increases the
turn-on time of the device.
A 1 F to 10 F electrolytic, tantalum, or ceramic capacitor
can also be connected to the input to improve transient
response in applications where the supply voltage may fluctuate.
An additional 0.1 F ceramic capacitor should be connected in
parallel to reduce supply noise.
Both input and output capacitors should be mounted as close to
the device pins as possible.
OUTPUT ADJUSTMENT
The REF0x trim terminal can be used to adjust the output
up or down from the internally trimmed, nominal output
voltage. This feature allows the system designer to trim out
system errors due to changes in line and load conditions,
thermal hysteresis, output offset due to solder reflow, or other
error sources. The basic trim circuit configuration is shown
in Figure 35.
Table 7 also lists the range of output voltages obtainable from
each model in this configuration.
U1
REF01/
REF02/
REF03
V
IN
V
OUT
TEMP TRIM
GND
V
IN
V
O
POT
10kΩ
R2
1kΩ
R1
470kΩ
00375-035
Figure 35. Optional Trim Adjustment Circuit
Table 7. Adjustment Range Using Trim Circuit
Model VOUT, Low Limit VOUT, High Limit
REF01 9.70 V 10.05 V
REF02 4.95 V 5.02 V
REF03 2.3 V 2.8 V
Adjustment of the output does not significantly affect the
temperature performance of the reference itself, provided the
temperature coefficients of the resistors used are low.
TEMPERATURE MONITORING
In addition to the optional TRIM function, the REF0x series of
references provides the ability to monitor changes in temper-
ature by way of tracking the voltage present at the TEMP pin.
The output voltage of this pin is taken directly from the band
REF01/REF02/REF03
Rev. J | Page 15 of 20
gap core and, as a result, varies linearly with temperature. The
nominal voltage at the TEMP pin (VTEMP) is approximately
550 mV at 25°C, with a temperature coefficient (TCVTEMP) of
approximately 1.96 mV/°C. Refer to Figure 32 for a graph of
output voltage vs. temperature.
As an example, given these ideal values, a voltage change of
39.2 mV at the TEMP pin corresponds to a 20°C change in
temperature.
The TEMP function is provided as a convenience, rather than a
precise feature, of the reference. In addition, because the voltage
at the TEMP pin is taken directly from the band gap core, any
current injected into or pulled from this pin has a significant
effect on VOUT. As such, even tens of microamps drawn from the
TEMP pin can cause the output to fall out of regulation. Should
the designer wish to take advantage of this feature, it is neces-
sary to buffer the output of the TEMP pin with a low bias
current op amp, such as the AD8601 or AD8641. Any of these
op amps, if used as shown in Figure 36, causes less than a
100 µV change in VOUT.
U2
15V
U1
V
IN
V
OUT
TEMP TRIM
GND
V
O
V+
V
TEMP
V
IN
V–
AD8641
1.9mV/°C
00375-036
REF01/
REF02/
REF03
Figure 36. Temperature Monitoring
LONG-TERM STABILITY
One of the key parameters of the REF0x series of references is
long-term stability. Regardless of output voltage, internal testing
during development showed a typical drift of approximately
50 ppm after 1,000 hours of continuous, nonloaded operation
in a +25°C environment.
It is important to understand that long-term stability is not
guaranteed by design, and that the output from the device may
shift beyond the typical 50 ppm specification at any time,
especially during the first 200 hours of operation. For systems
that require highly stable output over long periods of time, the
designer should consider burning-in the devices prior to use to
minimize the amount of output drift exhibited by the reference
over time. Refer to the AN-713 Application Note for more
information regarding the effects of long-term drift and how it
can be minimized.
BURN-IN
Burn-in, wherein the part is powered and allowed to operate
normally for an extended period of time, can be useful for
minimizing the effects of long-term drift. A sample burn-in
circuit is shown below in Figure 37.
00375-037
V
IN
V
OUT
GND
+18
V
–18V
+
10µF
+
10µF
10Ω
R
L
OPTIONAL
REF01/
REF02/
REF03
Figure 37. Burn-In Circuit
The part may be burned in with or without a constant resistive
load. The load current should not exceed 10 mA.
POWER DISSIPATION
The REF0x series of voltage references are capable of sourcing
up to 10 mA of load current at room temperature across the
rated input voltage range. However, when used in applications
subject to high ambient temperatures, the input voltage and
load current should be carefully monitored to ensure that the
device does not exceeded its maximum power dissipation
rating. The maximum power dissipation of the device can be
calculated via the following equation:
[]
W
JA
A
j
Dθ
TT
P
−
=
where:
PD is device power dissipation.
Tj is device junction temperature.
TA is ambient temperature.
θJA is package (junction-to-air) thermal resistance.
Because of this relationship, acceptable load current in high-
temperature conditions may be less than the maximum
current-sourcing capability of the device. In no case should
the part be operated outside of its maximum power rating as
doing so may result in premature failure or permanent damage
to the device.
REF01/REF02/REF03
Rev. J | Page 16 of 20
APPLICATIONS INFORMATION
BASIC REFERENCE APPLICATION
Figure 38 shows the basic configuration for any REF0x device.
Input and output capacitance values can be tailored for
performance, provided they follow the guidelines described
in the Input and Output Capacitors section.
U1
REF01/
REF02/
REF03
V
O
C2
0.1µF
C1
0.1µF
V
IN
V
IN
V
OUT
TEMP TRIM
GND
3800375-0
Figure 38. Basic Reference Application
NEGATIVE REFERENCE
A negative reference can be constructed without any external
resistors as shown in Figure 39. In this configuration, the
reference IC and op amp work together to force the voltage at
the –VREF node to the negative value of the reference’s nominal
output voltage. The inverting input of the op amp represents
a virtual ground, forcing the VOUT pin of the reference to
0 V(ground), and the reference works to maintain a constant
voltage across its VOUT and GND pins, forcing the GND pin
negative.
U2
+15V
–15V
V–
V+
OP1177
–V
REF
U1
+5
V
TO +15V
39
REF01/
REF02/
REF03
V
IN
V
OUT
TEMP TRIM
GND
00375-0
Figure 39. Negative Reference
Note that any load on the –VREF node will have its current
sourced from, or sunk into, the output of the op amp. For this
reason, U2 should be implemented with a low offset, precision
op amp, with an output current rating that meets or exceeds the
current requirements of the load.
LOW COST CURRENT SOURCE
Unlike most references, the quiescent current of the REF0x
series remains constant with respect to the load current (refer to
Figure 22). As a result, a simple, low cost current source can be
constructed by configuring the reference as shown in Figure 40.
REF01/
REF02/
REF03 V
OUT
GND
V
IN
I
IN
I
SET
= (V
OUT
– V
L
)/R
SET
R
SET
I
Q
≈0.6mA
I
L
= I
SET
+ I
Q
V
L
R
L
00375-040
Figure 40. Simple Current Source
In this configuration, the current through the resistor RSET (ISET)
is equal to (VOUT − VL)/RSET. IL is simply the sum of ISET and IQ.
However, since IQ typically varies from 0.55 mA to 0.65 mA,
this circuit should be limited to low precision, general-purpose
applications.
PRECISION CURRENT SOURCE WITH
ADJUSTABLE OUTPUT
A higher-precision current source can be implemented with the
circuit shown in Figure 41.
U2
+12V
–12V
W
B
A
U1
REF02
VIN VOUT
TEMP TRIM
GND
V–
V+
OP1177
–5V TO VL
AD5201
0V T O (5V + VL)
+12
V
RSET 1kΩ
RLIL
VL
1kΩ
100kΩ
00375-041
Figure 41. Programmable 0 mA to 5 mA Current Source
By adding a mechanical or digital potentiometer, this circuit
becomes an adjustable current source. If a digital potentiometer
is used, the load current is simply the voltage across terminal B
to terminal W of the digital potentiometer divided by the value
of the resistor RSET.
[]
A
SET
REF
LR
DV
I
×
=
where D is the decimal equivalent of the digital potentiometer
input code.
A dual-supply op amp should be used since the ground
potential of REF02 can swing from −5.0 V to VL while the
potentiometer is swung from zero-scale to full-scale.
REF01/REF02/REF03
Rev. J | Page 17 of 20
PRECISION BOOSTED OUTPUT REGULATOR
The output current sourcing capability of the REF0x series can
be boosted by using an external op amp and MOSFET, as shown
in Figure 42.
U2
15V
N1
200Ω
U1
REF01/
REF02/
REF03
V
IN
V
OUT
TEMP TRIM
GND V–
V+
OP1177
2N7002
V
IN
V
O
R
L
1µF
C
L
00375-042
C
1
1000pF
00375-043
R
2
100Ω
R
1
100Ω
Figure 42. Precision Boosted Output Regulator
In this circuit, U2 forces VO to VREF by regulating the current
through N1, thereby sourcing the load current directly from the
input voltage source connected at VIN. Using the components
shown, this circuit can source up to 50 mA with an input volt-
age of 15.0 V. The circuit’s current sourcing capability can be
further increased by replacing N1 with a higher-power MOSFET.
BIPOLAR VOLTAGE REFERENCE
Many applications require both a positive and reference voltage
of the same magnitude. A simple method of generating such a
bipolar reference is shown in Figure 43.
REF03
V
IN
GND
V
+
V–
34
26
7
2U1
U2
4
6
V
OUT
OP97
100kΩ
–2.5V
+2.5V
100kΩ
Figure 43. Bipolar Voltage Reference
In this configuration, the negative rail is generated simply
with an inverting amplifier with a gain of −1. A low offset
op amp should be used to minimize the voltage error at the
negative output.
ADJUSTABLE REFERENCE WITH POSITIVE AND
NEGATIVE SWING
The output voltage of the REF0x references can be readily
adjusted via a simple trim circuit (explained in the Output
Adjustment section). The circuit shown in Figure 44 extends
the negative range of adjustment beyond that obtainable with
the simple trim circuit by employing a precision op amp with
a potentiometer feeding the op amp’s noninverting input.
00375-044
REF03
V
IN
GND
V
+
V+
2
34
6
7+15V
50kΩ
2U1
U2
4
6
V
OUT
OP97
50kΩ
50kΩ
V
OUT
–2.5V TO +2.5V
Figure 44. Negatively Adjustable Reference
The voltage output from the op amp can be adjusted by
changing the value of the potentiometer: as shown, the op
amp outputs +2.5 V when the pot is pulled completely high,
and −2.5V when pulled completely low. In this configuration,
the load current is sourced by the op amp; therefore, a low
offset op amp with a current rating that meets or exceeds the
current requirements of the load should be used.
REF01/REF02/REF03
Rev. J | Page 18 of 20
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
0.310 (7.87)
0.220 (5.59)
OUTLINE DIMENSIONS
0.005 (0.13)
MIN 0.055 (1.40)
MAX
14
58
0.100 (2.54) BSC
15°
0°
0.320 (8.13)
0.290 (7.37)
0.015 (0.38)
0.008 (0.20)
SEATING
PLANE
0.200 (5.08)
MAX
0.405 (10.29) MAX
0.150 (3.81)
MIN
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36)
0.060 (1.52)
0.015 (0.38)
0.070 (1.78)
0.030 (0.76)
Figure 45. 8-Lead Ceramic Dual In-Line Package [CERDIP]
Z-Suffix (Q-8)
Dimensions shown in inches and (millimeters)
.
CONT ROLLING DI M E NSIONS ARE IN INCHES; M ILLIMET ER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-O FF INCH EQ UIVAL E NTS F OR
REFE RE NCE ONLY AND ARE NOT AP PROPRIATE FO R US E IN DESIGN.
COMP LIANT TO JE DE C S TANDARDS MO- 002-AK
0.2500 (6.35) MIN
0.5000 ( 1 2.70)
MIN
0.1850 (4.70)
0.1650 (4.19)
REFE RE NCE P LANE
0.0500 (1.27) MAX
0.0190 ( 0.48)
0.0160 ( 0.41)
0.0210 ( 0. 53 )
0.0160 ( 0. 41 )
0.0400 ( 1. 02 )
0.0100 ( 0. 25 )
0.0400 ( 1.02) M A X 0.0340 ( 0.86)
0.0280 ( 0.71)
0.0450 ( 1.14)
0.0270 ( 0.69)
0.1600 ( 4.06)
0.1400 ( 3.56)
0.1000 (2.54)
BSC
6
28
7
5
4
3
1
0.2000
(5.08)
BSC
0.1000
(2.54)
BSC
0.3700 ( 9. 40 )
0.3350 ( 8. 51 )
0.3350 (8.51)
0.3050 (7.75)
45° BSC
BASE & SEATING PLANE
022306-A
Figure 46. 8-Pin Metal Header Package [TO-99]
J-Suffix (H-08)
Dimensions shown in inches and (millimeters)
REF01/REF02/REF03
Rev. J | Page 19 of 20
COM PLI ANT TO JEDEC S TANDARDS M S -001
CONT ROLLING DIM E NS IONS ARE IN I NCHE S; MI LLIMETER DI MENSI ONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQ UIVAL ENTS FOR
REFERENCE ONLY AND ARE NOT APP ROPRIATE F OR USE IN DES IGN.
070606-A
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
CORNER LE ADS MAY BE CONFIG URED AS W HO L E O R HAL F L EADS .
SEATING
PLANE
0.015
(0.38)
MIN
0.210 (5.33)
MAX
0.150 ( 3.81)
0.130 ( 3.30)
0.115 (2. 92)
0.070 ( 1.78)
0.060 ( 1.52)
0.045 ( 1.14)
8
14
5
0.280 ( 7.11)
0.250 ( 6.35)
0.240 ( 6.10)
0.100 (2.54)
BSC
0.400 ( 10 .16)
0.365 ( 9.27)
0.355 ( 9.02)
0.325 ( 8.26)
0.310 ( 7.87)
0.300 ( 7.62)
0.060 ( 1 .52)
MAX
0.430 (10.92)
MAX
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
0.195 ( 4.95)
0.130 ( 3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
PLANE
0.005 (0.13)
MIN
Figure 47. 8-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body, P-Suffix (N-8)
Dimensions shown in inches and (millimeters)
CONT ROLLING DIM E NS IONS ARE IN INCHES; M ILLIMET E R DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FO R
REFERENCE ONLY AND ARE NOT APPROPRIATE FO R USE I N DESIGN.
1
20 4
9
8
13
19
14
3
18
BOTTOM
VIEW
0.028 ( 0.71)
0.022 ( 0.56)
45° TYP
0.015 (0.38)
MIN
0.055 ( 1.40)
0.045 ( 1.14)
0.050 ( 1.27)
BSC
0.075 ( 1.91)
REF
0.0 11 (0.28)
0.007 (0.18)
R TYP
0.095 ( 2.41)
0.075 ( 1.90)
0.100 ( 2.54) RE F
0.200 (5.08)
REF
0.150 ( 3.81)
BSC
0.075 (1.91)
REF
0.358 ( 9.09)
0.342 ( 8.69)
SQ
0.358
(9.09)
MAX
SQ
0.100 (2.54)
0.064 (1.63)
0.088 ( 2 .24)
0.054 ( 1 .37)
022106-A
CONT ROLLING DIM E NS IONS ARE IN MILLI METE RS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MI LL I METER EQUIVALENTS FO R
REFERENCE ONLY AND ARE NOT APP ROPRIATE F OR USE IN DES IGN.
COMP LIANT TO JEDEC STANDARDS MS-012-AA
012407-A
Figure 48. 20-Terminal Ceramic Leadless Chip Carrier [LCC]
RC-Suffix (E-20-1)
Dimensions shown in inches and (millimeters)
0.25 ( 0.0098)
0.17 ( 0.0067)
1.27 ( 0.0500)
0.40 ( 0.0157)
0.50 ( 0 .0196)
0.25 ( 0 .0099) 45°
8°
0°
1.75 ( 0 .0688)
1.35 ( 0 .0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
85
5.00 (0.1968)
4.80 (0.1890)
4.00 ( 0.1574)
3.80 ( 0.1497)
1.27 (0.0500)
BSC
6.20 ( 0.2441)
5.80 ( 0.2284)
0.51 ( 0.0201)
0.31 ( 0.0122)
COPLANARITY
0.10
Figure 49. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body, S-Suffix (R-8)
Dimensions shown in millimeters and (inches)
REF01/REF02/REF03
Rev. J | Page 20 of 20
REF01 ORDERING GUIDE
Model Initial Accuracy (mV) Temperature Range Package Description Package Option
REF01AJ/883C1 ±30 −55°C to +125°C 8-Pin TO-99 J-Suffix (H-08)
REF01CJ ±100 0°C to 70°C 8-Pin TO-99 J-Suffix (H-08)
REF01EZ ±30 −40°C to +85°C 8-Lead CERDIP Z-Suffix (Q-8)
REF01HZ ±50 −40°C to +85°C 8-Lead CERDIP Z-Suffix (Q-8)
REF01CP ±100 −40°C to +85°C 8-Lead PDIP P-Suffix (N-8)
REF01CPZ2 ±100 −40°C to +85°C 8-Lead PDIP P-Suffix (N-8)
REF01HP ±50 −40°C to +85°C 8-Lead PDIP P-Suffix (N-8)
REF01HPZ2 ±50 −40°C to +85°C 8-Lead PDIP P-Suffix (N-8)
REF01CS ±100 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8)
REF01CS-REEL ±100 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8)
REF01CS-REEL7 ±100 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8)
REF01CSZ 2 ±100 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8)
REF01CSZ-REEL2 ±100 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8)
REF01CSZ-REEL72 ±100 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8)
1 Contact sales for 883 data sheet.
2 Z = RoHS Compliant Part.
REF02 ORDERING GUIDE
Model Initial Accuracy (mV) Temperature Range Package Description Package Option
REF02AJ/883C1 ±15 −55°C to +125°C 8-Pin TO-99 J-Suffix (H-08)
REF02AZ ±15 −55°C to +125°C 8-Lead CERDIP Z-Suffix (Q-8)
REF02AZ/883C1 ±15 −55°C to +125°C 8-Lead CERDIP Z-Suffix (Q-8)
REF02CP ±50 −40°C to +85°C 8-Lead PDIP P-Suffix (N-8)
REF02CPZ2 ±50 −40°C to +85°C 8-Lead PDIP P-Suffix (N-8)
REF02CS ±50 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8)
REF02CS-REEL ±50 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8)
REF02CS-REEL7 ±50 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8)
REF02CSZ2 ±50 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8)
REF02CSZ-REEL2 ±50 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8)
REF02CSZ-REEL72 ±50 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8)
REF02EZ ±15 −40°C to +85°C 8-Lead CERDIP Z-Suffix (Q-8)
REF02HZ ±25 −40°C to +85°C 8-Lead CERDIP Z-Suffix (Q-8)
REF02HP ±25 −40°C to +85°C 8-Lead PDIP P-Suffix (N-8)
REF02HPZ2 ±25 −40°C to +85°C 8-Lead PDIP P-Suffix (N-8)
REF02HSZ2 ±25 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8)
REF02RC/8831 ±25 −55°C to +125°C 20-Terminal LCC RC-Suffix (E-20-1)
REF02Z ±25 −55°C to +125°C 8-Lead CERDIP Z-Suffix (Q-8)
1 Contact sales for 883 data sheet.
2 Z = RoHS Compliant Part.
REF03 ORDERING GUIDE
Model Initial Accuracy (mV) Temperature Range Package Description Package Option
REF03GPZ1 ±15 −40°C to +85°C 8-Lead PDIP N-8 (P-Suffix)
REF03GS ±15 −40°C to +85°C 8-Lead SOIC_N R-8 (P-Suffix)
REF03GSZ1 ±15 −40°C to +85°C 8-Lead SOIC_N R-8 (P-Suffix)
REF03GSZ-REEL1 ±15 −40°C to +85°C 8-Lead SOIC_N R-8 (P-Suffix)
REF03GSZ-REEL71 ±15 −40°C to +85°C 8-Lead SOIC_N R-8 (P-Suffix)
1 Z = RoHS Compliant Part.
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D00375-0-10/09(J)
