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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

LM3410

LM3410-Q1

SNVS541H –OCTOBER 2007–REVISED AUGUST 2016

LM3410, LM3410-Q1 525-kHz and 1.6-MHz, Constant-Current Boost and SEPIC LED Driver

With Internal Compensation

1 Features

1• Qualified for Automotive Applications

• AEC-Q100 Test Guidance With the Following:

– Device Temperature Grade 1: –40°C to 125°C

Ambient Operating Temperature Range

– Device HBM ESD Classification Level 2

– Device CDM ESD Classification Level C6

• Space-Saving SOT-23 and WSON Packages

• Input Voltage From 2.7 V to 5.5 V

• Output Voltage From 3 V to 24 V

• 2.8-A (Typical) Switch Current Limit

• High Switching Frequency

– 525 KHz (LM3410Y)

– 1.6 MHz (LM3410X)

• 170-mΩNMOS Switch

• 190-mV Internal Voltage Reference

• Internal Soft Start

• Current-Mode, PWM Operation

• Thermal Shutdown

2 Applications

• LED Backlight Current Sources

• LiIon Backlight OLED and HB LED Drivers

• Handheld Devices

• LED Flash Drivers

• Automotive Applications

3 Description

The LM3410 and LM3410-Q1 constant current LED

driver are a monolithic, high frequency, PWM DC-DC

converter, available in 6-pin WSON, 8-pin MSOP-

PowerPad™, and 5-pin SOT-23 packages. With a

minimum of external components the LM3410 and

LM3410-Q1 are easy to use. It can drive 2.8-A

(typical) peak currents with an internal 170-mΩ

NMOS switch. Switching frequency is internally set to

either 525 kHz or 1.6 MHz, allowing the use of

extremely small surface mount inductors and chip

capacitors. Even though the operating frequency is

high, efficiencies up to 88% are easy to achieve.

External shutdown is included, featuring an ultra-low

standby current of 80 nA. The LM3410 and LM3410-

Q1 use current-mode control and internal

compensation to provide high-performance over a

wide range of operating conditions. Additional

features include PWM dimming, cycle-by-cycle

current limit, and thermal shutdown.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)

LM3410,

LM3410Q

WSON (6) 3.00 mm × 3.00 mm

MSOP-PowerPAD (8) 2.90 mm × 1.60 mm

SOT-23 (5) 3.00 mm × 3.00 mm

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

Typical Boost Application Circuit Typical Efficiency (LM3410X)

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Table of Contents

1 Features.................................................................. 1

2 Applications ........................................................... 1

3 Description............................................................. 1

4 Revision History..................................................... 2

5 Pin Configuration and Functions......................... 3

6 Specifications......................................................... 4

6.1 Absolute Maximum Ratings ...................................... 4

6.2 ESD Ratings.............................................................. 4

6.3 Recommended Operating Conditions....................... 4

6.4 Thermal Information.................................................. 4

6.5 Electrical Characteristics........................................... 5

6.6 Typical Characteristics.............................................. 6

7 Detailed Description.............................................. 8

7.1 Overview................................................................... 8

7.2 Functional Block Diagram....................................... 10

7.3 Feature Description................................................. 10

7.4 Device Functional Modes........................................ 10

8 Application and Implementation ........................ 11

8.1 Application Information............................................ 11

8.2 Typical Applications ................................................ 19

9 Power Supply Recommendations...................... 31

10 Layout................................................................... 32

10.1 Layout Guidelines ................................................. 32

10.2 Layout Examples................................................... 32

10.3 Thermal Considerations........................................ 33

11 Device and Documentation Support................. 40

11.1 Device Support...................................................... 40

11.2 Documentation Support ........................................ 41

11.3 Related Links ........................................................ 41

11.4 Receiving Notification of Documentation Updates 41

11.5 Community Resources.......................................... 41

11.6 Trademarks........................................................... 41

11.7 Electrostatic Discharge Caution............................ 41

11.8 Glossary................................................................ 41

12 Mechanical, Packaging, and Orderable

Information........................................................... 42

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision G (April 2013) to Revision H Page

• Added Device Information table, ESD Ratings table, Thermal Information table, Detailed Description section,

Feature Description section, Device Functional Modes section, Application and Implementation section, Typical

Application section, Power Supply Recommendations section, Layout section, Device and Documentation Support

section, and Mechanical, Packaging, and Orderable Information section.............................................................................. 1

• Added AEC-Q100 Test Guidance bullets to Features............................................................................................................ 1

• Changed RθJA value for NGG package from 80°C/W : to 55.3°C/W...................................................................................... 4

• Changed RθJA value for DGN package from 80°C/W : to 53.7°C/W ...................................................................................... 4

• Changed RθJA value for DBV package from 118°C/W : to 164.2°C/W................................................................................... 4

• Changed RθJC(top) value for NGG package from 18°C/W : to 65.9°C/W................................................................................. 4

• Changed RθJC(top) value for DGN package from 18°C/W : to 61.4°C/W ................................................................................. 4

• Changed RθJC(top) value for DBV package from 60°C/W : to 115.3°C/W................................................................................ 4

Changes from Revision F (May 2013) to Revision G Page

• Changed layout of National Semiconductor Data Sheet to TI format .................................................................................... 1

1SW

2GND

3FB 4 DIM

5 VIN

Not to scale

1NC 8 NC

2PGND 7 SW

3VIN 6 AGND

4DIM 5 FB

Not to scale

DAP

1PGND 6 SW

2VIN 5 AGND

3DIM 4 FB

Not to scale

DAP

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5 Pin Configuration and Functions

NGG Package

6-Pin WSON

Top View

DGN Package

8-Pin MSOP-PowerPad

Top View

DBV Package

5-Pin SOT-23

Top View

Pin Functions

PIN I/O DESCRIPTION

NAME WSON MSOP-

PowerPAD SOT-23

AGND 5 6 — — Signal ground pin. Place the bottom resistor of the feedback network as close

as possible to this pin and FB.

DIM 3 4 4 I Dimming and shutdown control input. Logic high enables operation. Duty

Cycle from 0% to 100%. Do not allow this pin to float or be greater than VIN +

0.3 V.

FB 4 5 3 I Feedback pin. Connect FB to external resistor to set output current.

GND DAP DAP — — Die attach pad. Signal and Power ground. Connect to PGND and AGND on

top layer. Place 4 to 6 vias from DAP to bottom layer GND plane.

— — 2 — Signal and power ground pin. Place the bottom resistor of the feedback

network as close as possible to this pin.

NC — 1, 8 — — No connection

PGND 1 2 — — Power ground pin. Place PGND and output capacitor GND close together.

SW 6 7 1 O Output switch. Connect to the inductor, output diode.

VIN 2 3 5 I Supply voltage pin for power stage, and input supply voltage.

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LM3410-Q1

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(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and

specifications.

(3) Thermal shutdown occurs if the junction temperature exceeds the maximum junction temperature of the device.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)

MIN MAX UNIT

Input voltage

VIN –0.5 7

SW –0.5 26.5

FB –0.5 3

DIM –0.5 7

Operating juction temperature(3), TJ150 °C

Storage temperature, Tstg –65 150 °C

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings VALUE UNIT

V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V

Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000

(1) Do not allow this pin to float or be greater than VIN + 0.3 V.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT

VIN Input voltage 2.7 5.5 V

VDIM DIM control input(1) 0 VIN V

VSW Switch output 3 24 V

TJOperating junction temperature –40 125 °C

Power dissipation (Internal) SOT-23 400 mW

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

6.4 Thermal Information

THERMAL METRIC(1)

LM3410, LM3410-Q1

UNIT

NGG

(WSON)

DGN

(MSOP-

PowerPAD)

DBV

(SOT-23)

6 PINS 8 PINS 5 PINS

RθJA Junction-to-ambient thermal resistance 0 LFPM Air Flow 55.3 53.7 164.2 °C/W

RθJC(top) Junction-to-case (top) thermal resistance 65.9 61.4 115.3 °C/W

RθJB Junction-to-board thermal resistance 29.6 37.3 27 °C/W

ψJT Junction-to-top characterization parameter 1.1 7.1 12.8 °C/W

ψJB Junction-to-board characterization parameter 29.7 37 26.5 °C/W

RθJC(bot) Junction-to-case (bottom) thermal resistance 9.3 6.8 — °C/W

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(1) Thermal shutdown occurs if the junction temperature exceeds the maximum junction temperature of the device.

6.5 Electrical Characteristics

Typical values apply for TJ= 25°C; Minimum and maximum limits apply for TJ= –40°C to 125°C and VIN = 5 V (unless

otherwise noted). Typical values represent the most likely parametric norm at TJ= 25°C, and are provided for reference

purposes only.PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

VFB Feedback voltage 178 190 202 mV

ΔVFB/VIN Feedback voltage line regulation VIN = 2.7 V to 5.5 V 0.06 %/V

IFB Feedback input bias current 0.1 1 µA

fSW Switching frequency LM3410X 1200 1600 2000 kHz

LM3410Y 360 525 680

DMAX Maximum duty cycle LM3410X 88% 92%

LM3410Y 90% 95%

DMIN Minimum duty cycle LM3410X 5%

LM3410Y 2%

RDS(ON) Switch on resistance MSOP and SOT-23 170 330 mΩ

WSON 190 350

ICL Switch current limit 2.1 2.8 A

SU Start-up time 20 µs

IQQuiescent current (switching) LM3410X, VFB = 0.25 V 7 11 mA

LM3410Y, VFB = 0.25 V 3.4 7

Quiescent current (shutdown) All versions, VDIM = 0 V 80 nA

UVLO Undervoltage lockout VIN rising 2.3 2.65 V

VIN falling 1.7 1.9

VDIM_H Shutdown threshold voltage 0.4 V

Enable threshold voltage 1.8

ISW Switch leakage VSW = 24 V 1 µA

IDIM Dimming pin current Sink and source 100 nA

TSD Thermal shutdown temperature (1) 165 °C

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LM3410-Q1

SNVS541H –OCTOBER 2007–REVISED AUGUST 2016

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6.6 Typical Characteristics

All curves taken at VIN = 5 V with the 50-mA boost configuration shown in Figure 18. TJ= 25°C, unless otherwise specified.

RSET = 4 Ω

Figure 1. LM3410X Efficiency vs VIN Figure 2. LM3410X Start-Up Signature

500-Hz DIM Frequency D = 50%

Figure 3. Four 3.3-V LEDs Figure 4. DIM Frequency and Duty Cycle vs Average ILED

Figure 5. Current Limit vs Temperature Figure 6. RDS(ON) vs Temperature

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Typical Characteristics (continued)

All curves taken at VIN = 5 V with the 50-mA boost configuration shown in Figure 18. TJ= 25°C, unless otherwise specified.

LM3410X

Figure 7. Oscillator Frequency vs Temperature

LM3410Y

Figure 8. Oscillator Frequency vs Temperature

Figure 9. VFB vs Temperature

Control

ILED

D1L1

C 1

VSW

VIN

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LM3410-Q1

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7 Detailed Description

7.1 Overview

The LM3410 and LM3410-Q1 are a constant frequency PWM, boost regulator IC. It delivers a minimum of 2.1-A

peak switch current. The device operates very similar to a voltage regulated boost converter except that the

device regulates the output current that passes through LEDs. The current magnitude is set with a series

resistor. The converter regulates to the feedback voltage (190 mV) created by the multiplication of the series

resistor and the LED current. The regulator has a preset switching frequency of either 525 kHz or 1.6 MHz. This

high frequency allows the LM3410 or LM3410-Q1 to operate with small surface mount capacitors and inductors,

resulting in a DC-DC converter that requires a minimum amount of board space. The LM3410 and LM3410-Q1

are internally compensated and requires few external components, making usage simple. The LM3410 and

LM3410-Q1 use current-mode control to regulate the LED current.

The LM3410 and LM3410-Q1 supply a regulated LED current by switching the internal NMOS control switch at

constant frequency and variable duty cycle. A switching cycle begins at the falling edge of the reset pulse

generated by the internal oscillator. When this pulse goes low, the output control logic turns on the internal

NMOS control switch. During this ON time, the SW pin voltage (VSW) decreases to approximately GND, and the

inductor current (IL) increases with a linear slope. ILis measured by the current sense amplifier, which generates

an output proportional to the switch current. The sensed signal is summed with the regulator’s corrective ramp

and compared to the error amplifier’s output, which is proportional to the difference between the feedback

voltage and reference voltage (VREF). When the PWM comparator output goes high, the output switch turns off

until the next switching cycle begins. During the switch OFF time, inductor current discharges through diode D1,

which forces the SW pin to swing to the output voltage plus the forward voltage (VD) of the diode. The regulator

loop adjusts the duty cycle (D) to maintain a regulated LED current.

Figure 10. Simplified Boost Topology Schematic

VOUT + VD

( )

tsw

VIN-VOUT-D

( )

DIODE(t)

Capacitor(t)

( )

tOUT

OUT

-i

()

iOUT

-i

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Overview (continued)

Figure 11. Typical Waveforms

NMOS

Control Logic

ThermalSHDN

UVLO=2.3V

RampArtificial

Internal

Compensation

ISENSE

VREF = 190 mV

ILIMIT

Oscillator

VIN

DIM

GND

1.6 MHz

VFB

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7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 Current Limit

The LM3410 and LM3410-Q1 use cycle-by-cycle current limiting to protect the internal NMOS switch. This

current limit does not protect the output from excessive current during an output short circuit. The input supply is

connected to the output by the series connection of an inductor and a diode. If a short circuit is placed on the

output, excessive current can damage both the inductor and diode.

7.3.2 DIM Pin and Shutdown Mode

The average LED current can be controlled using a PWM signal on the DIM pin. The duty cycle can be varied

from 0 to 100%, to either increase or decrease LED brightness. PWM frequencies from 1 Hz to 25 kHz can be

used. For controlling LED currents down to the µA levels, it is best to use a PWM signal frequency from 200 to

1 kHz. The maximum LED current would be achieved using a 100% duty cycle, that is the DIM pin always high.

7.4 Device Functional Modes

7.4.1 Thermal Shutdown

Thermal shutdown limits total power dissipation by turning off the output switch when the IC junction temperature

exceeds 165°C. After thermal shutdown occurs, the output switch does not turn on until the junction temperature

drops to approximately 150°C.

VFB

RSET= ILED

ILED

VFB

RSET

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8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

8.1 Application Information

8.1.1 Boost Converter

8.1.1.1 Setting the LED Current

Figure 12. Setting ILED

The LED current is set using the following equation:

where

• RSET is connected between the FB pin and GND. (1)

8.1.1.2 LED-Drive Capability

When using the LM3410 or LM3410-Q1 in the typical application configuration, with LEDs stacked in series

between the VOUT and FB pin, the maximum number of LEDs that can be placed in series is dependent on the

maximum LED forward voltage (VFMAX).

(VFMAX × NLEDs) + 190 mV < 24 V (2)

When inserting a value for maximum VFMAX the LED forward voltage variation over the operating temperature

range must be considered.

8.1.1.3 Inductor Selection

The inductor value determines the input ripple current. Lower inductor values decrease the physical size of the

inductor, but increase the input ripple current. An increase in the inductor value decreases the input ripple

current.

OUT LED

IN IN

V I

K u

'¶

VOUT

VIN =

VOUT - VIN

D = VOUT

1 - D

1 1

VOUT

VIN ¨

§¸

2'iL

DTS

'iL =

VIN ¸

·x DTS

( )

VIN

VV OUT

IN -

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Application Information (continued)

Figure 13. Inductor Current

(3)

The Duty Cycle (D) for a Boost converter can be approximated by using the ratio of output voltage (VOUT) to input

voltage (VIN).

(4)

Therefore:

(5)

Power losses due to the diode (D1) forward voltage drop, the voltage drop across the internal NMOS switch, the

voltage drop across the inductor resistance (RDCR) and switching losses must be included to calculate a more

accurate duty cycle (see Calculating Efficiency and Junction Temperature for a detailed explanation). A more

accurate formula for calculating the conversion ratio is:

where

•ηequals the efficiency of the device application. (6)

Or:

(7)

L= ¨

§2'iL

VIN ¸

·x DTS

OUT IN

OUT

V V

DV K

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Application Information (continued)

Therefore:

(8)

Inductor ripple in a LED driver circuit can be greater than what would normally be allowed in a voltage regulator

Boost and Sepic design. A good design practice is to allow the inductor to produce 20% to 50% ripple of

maximum load. The increased ripple is unlikely to be a problem when illuminating LEDs.

From the previous equations, the inductor value is then obtained.

where

• 1 / TS= fSW (9)

Ensure that the minimum current limit (2.1 A) is not exceeded, so the peak current in the inductor must be

calculated. The peak current (Lpk I) in the inductor is calculated by Equation 10:

ILpk = IIN +ΔILor ILpk = IOUT /D' + ΔiL(10)

When selecting an inductor, make sure that it is capable of supporting the peak input current without saturating.

Inductor saturation results in a sudden reduction in inductance and prevent the regulator from operating correctly.

Because of the speed of the internal current limit, the peak current of the inductor only needs to be specified for

the required maximum input current. For example, if the designed maximum input current is 1.5 A and the peak

current is 1.75 A, then the inductor must be specified with a saturation current limit of >1.75 A. There is no need

to specify the saturation or peak current of the inductor at the 2.8-A typical switch current limit.

Because of the operating frequency of the LM3410 and LM3410-Q1, ferrite based inductors are preferred to

minimize core losses. This presents little restriction because the variety of ferrite-based inductors is huge. Lastly,

inductors with lower series resistance (DCR) provides better operating efficiency. For recommended inductor

value examples, see Typical Applications.

8.1.1.4 Input Capacitor

An input capacitor is necessary to ensure that VIN does not drop excessively during switching transients. The

primary specifications of the input capacitor are capacitance, voltage, RMS current rating, and ESL (Equivalent

Series Inductance). TI recommens an input capacitance from 2.2 µF to 22 µF depending on the application. The

capacitor manufacturer specifically states the input voltage rating. Make sure to check any recommended

deratings and also verify if there is any significant change in capacitance at the operating input voltage and the

operating temperature. The ESL of an input capacitor is usually determined by the effective cross sectional area

of the current path. At the operating frequencies of the LM3410 and LM3410-Q1, certain capacitors may have an

ESL so large that the resulting impedance (2πfL) is higher than that required to provide stable operation. As a

result, TI recommends surface mount capacitors. Multilayer ceramic capacitors (MLCC) are good choices for

both input and output capacitors and have very low ESL. For MLCCs TI recommends use of X7R or X5R

dielectrics. Consult the capacitor manufacturer's datasheet for rated capacitance variation over operating

conditions.

8.1.1.5 Output Capacitor

The LM3410 and LM3410-Q1 operate at frequencies allowing the use of ceramic output capacitors without

compromising transient response. Ceramic capacitors allow higher inductor ripple without significantly increasing

output ripple. The output capacitor is selected based upon the desired output ripple and transient response. The

initial current of a load transient is provided mainly by the output capacitor. The output impedance therefore

determines the maximum voltage perturbation. The output ripple of the converter is a function of the capacitor’s

reactance and its equivalent series resistance (ESR) (see Equation 11).

2 x fSW x ROUT x COUT

VOUT x D

'VOUT = 'iLx RESR +¨

§¸

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Application Information (continued)

(11)

When using MLCCs, the ESR is typically so low that the capacitive ripple may dominate. When this occurs, the

output ripple is approximately sinusoidal and 90° phase shifted from the switching action.

Given the availability and quality of MLCCs and the expected output voltage of designs using the LM3410 or

LM3410-Q1, there no need to review any other capacitor technologies. Another benefit of ceramic capacitors is

their ability to bypass high frequency noise. A certain amount of switching edge noise couples through parasitic

capacitances in the inductor to the output. A ceramic capacitor bypasses this noise while a tantalum does not.

Because the output capacitor is one of the two external components that control the stability of the regulator

control loop, most applications requires a minimum at 0.47 µF of output capacitance. Like the input capacitor, TI

recommends X7R or X5R as multilayer ceramic capacitors. Again, verify actual capacitance at the desired

operating voltage and temperature.

8.1.1.6 Diode

The diode (D1) conducts during the switch off time. TI recommends Schottky diode for its fast switching times

and low forward voltage drop. The diode must be chosen so that its current rating is greater than:

ID1 ≥IOUT (12)

The reverse breakdown rating of the diode must be at least the maximum output voltage plus appropriate margin.

8.1.1.7 Output Overvoltage Protection

A simple circuit consisting of an external Zener diode can be implemented to protect the output and the LM3410

or LM3410-Q1 device from an overvoltage fault condition. If an LED fails open, or is connected backwards, an

output open circuit condition occurs. No current is conducted through the LEDs, and the feedback node equals

zero volts. The LM3410 or LM3410-Q1 reacts to this fault by increasing the duty cycle, thinking the LED current

has dropped. A simple circuit that protects the device is shown in Figure 14.

Zener diode D2 and resistor R3 is placed from VOUT in parallel with the string of LEDs. If the output voltage

exceeds the breakdown voltage of the Zener diode, current is drawn through the Zener diode, R3 and sense

resistor R1. Once the voltage across R1 and R3 equals the feedback voltage of 190 mV, the LM3410 and

LM3410-Q1 limits their duty cycle. No damage occurs to the device, the LEDs, or the Zener diode. Once the fault

is corrected, the application will work as intended.

VSW

VFB

LEDs

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Application Information (continued)

Figure 14. Overvoltage Protection Circuit

8.1.2 SEPIC Converter

The LM3410 or LM3410-Q1 can easily be converted into a SEPIC converter. A SEPIC converter has the ability

to regulate an output voltage that is either larger or smaller in magnitude than the input voltage. Other converters

have this ability as well (CUK and Buck-Boost), but usually create an output voltage that is opposite in polarity to

the input voltage. This topology is a perfect fit for Lithium Ion battery applications where the input voltage for a

single cell Li-Ion battery varies from 2.7 V to 4.5 V and the output voltage is somewhere in between. Most of the

analysis of the LM3410 Boost Converter is applicable to the LM3410 SEPIC Converter.

L2 L1

L2 LED

I I

and

I I

§ ·

¨ ¸

§ ·

¨ ¸

VOUT + VIN

D = VOUT

'¶

VOUT

VIN =

VIN L1D1

C1C2

LM 3410

HB/OLED

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Application Information (continued)

Figure 15. HB or OLED SEPIC Converter Schematic

8.1.2.1 SEPIC Equations

SEPIC Conversion ratio without loss elements:

(13)

Therefore:

(14)

Small ripple approximation:

In a well-designed SEPIC converter, the output voltage, and input voltage ripple, the inductor ripple IL1 and IL2 is

small in comparison to the DC magnitude. Therefore it is a safe approximation to assume a DC value for these

components. The main objective of the Steady State Analysis is to determine the steady state duty cycle, voltage

and current stresses on all components, and proper values for all components.

In a steady-state converter, the net volt-seconds across an inductor after one cycle equals zero. Also, the charge

into a capacitor equals the charge out of a capacitor in one cycle.

Therefore:

(15)

VIN ='( )VOUT

VC3 ='( )VOUT

AREA

( )

(s)

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Application Information (continued)

Substituting IL1 into IL2

IL2 = ILED (16)

The average inductor current of L2 is the average output load.

Figure 16. Inductor Volt-Second Balance Waveform

Applying Charge balance on C1:

(17)

Because there are no DC voltages across either inductor, and capacitor C3 is connected to Vin through L1 at

one end, or to ground through L2 on the other end, we can say that

VC3 = VIN (18)

Therefore:

(19)

This verifies the original conversion ratio equation.

It is important to remember that the internal switch current is equal to IL1 and IL2 during the D interval. Design the

converter so that the minimum ensured peak switch current limit (2.1 A) is not exceeded.

VOUT

VIN =1 - D

Dx K

+ + ¸

§RL1

§D2

§RON¸

§D

1+ + ¸

RL2

VOUT

K=

ROUT ROUT ROUT

VOUT

ROUT =ILED

++¸

RL1

§D2

RON¸

§D

1+ +¸

RL2

VOUT

§D

VOUT

VIN D'

i)t(1L

vL1( )

i)t(

i)t(1

vC1( )

vD1( )

vL2( )

i)t(2C

vC2( )

vO( )

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Application Information (continued)

8.1.2.2 Steady State Analysis with Loss Elements

Figure 17. SEPIC Simplified Schematic

8.1.2.2.1 Details

Using inductor volt-second balance and capacitor charge balance, the following equations are derived:

IL2 = (ILED) (20)

and IL1 = (ILED) × (D/D') (21)

(22)

(23)

Therefore:

(24)

All variables are known except for the duty cycle (D). A quadratic equation is needed to solve for D. A less

accurate method of determining the duty cycle is to assume efficiency, and calculate the duty cycle.

(25)

VIN SW

DIM

VIN

DIMM

GND

LEDs

L M3410

L1D1

VOUT

D = ¨

§(VIN x K) +VOUT¸

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Application Information (continued)

(26)

Table 1. Efficiencies for Typical SEPIC Applications

EXAMPLE 1 EXAMPLE 2 EXAMPLE 3

VIN 2.7 V VIN 3.3 V VIN 5 V

VOUT 3.1 V VOUT 3.1 V VOUT 3.1 V

IIN 770 mA IIN 600 mA IIN 375 mA

ILED 500 mA ILED 500 mA ILED 500 mA

η75% η80% η83%

8.2 Typical Applications

8.2.1 Low Input Voltage, 1.6-MHz, 3 to 5 White LED Output at 50-mA Boost Converter

Figure 18. Boost Schematic

8.2.1.1 Design Requirements

For this design example, use the parameters listed in Table 2 as the input parameters.

Table 2. Design Parameters

PARAMETER EXAMPLE VALUE

VIN 2.7 V to 5.5 V

ILED 50 mA

VOUT 14.6 V (four 3.6-V LEDs in series plus 190 mV)

RD8Ω(dynamic resistance of 4 LEDs in series)

ΔILp–p 100 mA (maximum)

ΔVOUTp–p 250 mV (maximum)

8.2.1.2 Detailed Design Procedure

This design procedure uses the worst-case minimum input voltage and a nominal 4 LED series load for

calculations.

8.2.1.2.1 Set the LED Current (R1)

Rearranging the LED current equation the current sense resistor R1can be found using Equation 27.

C2 • VOUT × DMAX

2 × fSW × RD × VOUT = 14.6V × 0.834

2 × 1.6MHz × × 14.6V = F

L1 = FVIN(min) × DMAX × TS

2 × ¨iL-PP G = l2.7V × 0.834 × 625ns

2 × 100mA p H

MAX

= V

OUT

-  × V

IN(min)

OUT

= 14.6V - 0.9 × 2.7V

14.6V = 0.834

R1 = VFB

ILED = 190mV

50mA 

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(27)

3.8 Ωis not a standard value so a standard value of R1= 3.83 Ωis chosen.

8.2.1.2.2 Calculate Maximum Duty Cycle (DMAX)

The maximum duty cycle is required for calculating the inductor value and the minimum output capacitance.

Assuming an approximate conversion efficiency (η) of 90% DMAX is calculated using Equation 28.

(28)

8.2.1.2.3 Calculate the Inductor Value (L1)

Using the maximum duty cycle, the minimum input voltage, and the maximum inductor ripple current (ΔiLp–p) the

minimum inductor value to achieve the maximum ripple current is calculated using Equation 29.

(29)

To ensure the maximum inductor ripple current requirement is met with a 20% inductor tolerance an inductor

value of L1= 10 µH is selected.

8.2.1.2.4 Calculate the Output Capacitor (C2)

To maintain a maximum of 250-mV output voltage ripple the dynamic resistance of the LED stack (RD) must be

used. Assuming a ceramic capacitor is used so the ESR can be neglected this minimum amount of capacitance

can be found using Equation 30.

(30)

1.9 µF is not a standard value so a value of C2= 2.2 µF is selected.

8.2.1.2.5 Input Capacitor (C1) and Schottky Diode (D1)

TI recommends an input capacitor from 2.2 µF to 22 µF. This is a relatively low power design optimized for a

small footprint. For a good balance of input filtering and small size a 6.3-V capacitor with a value of C1= 10 µF is

selected. The output voltage with a 5 LED load is over 18 V and the reverse voltage of the schottky diode must

be greater than this voltage. To give some headroom to avoid reverse breakdown and to maintain small size and

reliability the diode selected is D1= 30 V, 500 mA.

DIMM LM3410

VIN

R2C2

D1LEDs

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8.2.1.3 Application Curves

Figure 19. Efficiency versus Input Voltage Figure 20. PWM Dimming

8.2.2 LM3410X SOT-23: 5 × 1206 Series LED String Application

Figure 21. LM3410X (1.6 MHz) 5 × 3.3-V LED String Application Diagram

8.2.2.1 Design Requirements

For this design example, use the parameters listed in Table 3 as the input parameters.

Table 3. Design Parameters

PARAMETER EXAMPLE VALUE

VIN 2.7 V to 5.5 V

ILED ≊50 mA

VOUT ≊16.5 V (five 3.3-V LEDs in series)

DIMM LM3410

VIN

R2C2

D1LEDs

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Table 4. Part Values

PART VALUE

U1 2.8-A ISW LED Driver

C1, Input capacitor 10 µF, 6.3 V, X5R

C2, Output capacitor 2.2 µF, 25 V, X5R

D1, Catch diode 0.4-VfSchottky 500 mA, 30 VR

L1 10 µH, 1.2 A

R1 4.02 Ω, 1%

R2 100 kΩ, 1%

LEDs SMD-1206, 50 mA, Vf≊3.6 V

8.2.3 LM3410Y SOT-23: 5 × 1206 Series LED String Application

Figure 22. LM3410Y (525 kHz) 5 × 3.3-V LED String Application Diagram

8.2.3.1 Design Requirements

For this design example, use the parameters listed in Table 5 as the input parameters.

Table 5. Design Parameters

PARAMETER EXAMPLE VALUE

VIN 2.7 V to 5.5 V

ILED ≊50 mA

VOUT ≊16.5 V (five 3.3-V LEDs in series)

Table 6. Part Values

PART VALUE

U1 2.8-A ISW LED Driver

C1, Input capacitor 10 µF, 6.3 V, X5R

C2, Output capacitor 2.2 µF, 25 V, X5R

D1, Catch diode 0.4-VfSchottky 500 mA, 30 VR

L1 15 µH, 1.2 A

R1 4.02 Ω, 1%

R2 100 kΩ, 1%

LEDs SMD-1206, 50 mA, Vf≊3.6 V

DIMM

VIN

LM3410

EDsL

SET

LED

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8.2.4 LM3410X WSON: 7 × 5 LED Strings Backlighting Application

Figure 23. LM3410X (1.6 MHz) 7 × 5 × 3.3-V LEDs Backlighting Application Diagram

8.2.4.1 Design Requirements

For this design example, use the parameters listed in Table 7 as the input parameters.

Table 7. Design Parameters

PARAMETER EXAMPLE VALUE

VIN 2.7 V to 5.5 V

ILED ≊25 mA

VOUT ≊16.7 V (seven strings of five 3.3-V LEDs in series)

Table 8. Part Values

PART VALUE

U1 2.8-A ISW LED Driver

C1, Input capacitor 10 µF, 6.3 V, X5R

C2, Output capacitor 4.7 µF, 25 V, X5R

D1, Catch Diode 0.4-VfSchottky 500 mA, 30 VR

L1 8.2 µH, 2 A

R1 1.15 Ω, 1%

R2 100 kΩ, 1%

LEDs SMD-1206, 50 mA, Vf≊3.6 V

DIMM

VIN

LM3410

L1D1

C1R2HB -LEDs

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8.2.5 LM3410X WSON: 3 × HB LED String Application

Figure 24. LM3410X (1.6 MHz) 3 × 3.4-V LED String Application Diagram

8.2.5.1 Design Requirements

For this design example, use the parameters listed in Table 9 as the input parameters.

Table 9. Design Parameters

PARAMETER EXAMPLE VALUE

VIN 2.7 V to 5.5 V

ILED ≊340 mA

VOUT ≊11 V (three 3.4-V LEDs in series)

Table 10. Part Values

PART VALUE

U1 2.8-A ISW LED Driver

C1, Input capacitor 10 µF, 6.3 V, X5R

C2, Output capacitor 2.2 µF, 25 V, X5R

D1, Catch diode 0.4-VfSchottky 500 mA, 30 VR

L1 10 µH, 1.2 A

R1 1 Ω, 1%

R2 100 kΩ, 1%

R3 1.5 Ω, 1%

HB – LEDs 340 mA, Vf≊3.6 V

DIMM LM3410

VIN

OVP

EDsL

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8.2.6 LM3410Y SOT-23: 5 × 1206 Series LED String Application With OVP

Figure 25. LM3410Y (525 kHz) 5 × 3.3-V LED String Application With OVP Diagram

8.2.6.1 Design Requirements

For this design example, use the parameters listed in Table 11 as the input parameters.

Table 11. Design Parameters

PARAMETER EXAMPLE VALUE

VIN 2.7 V to 5.5 V

ILED ≊50 mA

VOUT ≊16.5 V (five 3.3-V LEDs in series)

Table 12. Part Values

PART VALUE

U1 2.8-A ISW LED Driver

C1, Input capacitor 10 µF, 6.3 V, X5R

C2, Output capacitor 2.2 µF, 25 V, X5R

D1, Catch diode 0.4-VfSchottky 500 mA, 30 VR

D2 18 V Zener diode

L1 15 µH, 0.7 A

R1 4.02 Ω, 1%

R2 100 kΩ, 1%

R3 100 Ω, 1%

LEDs SMD-1206, 50 mA, Vf≊3.6 V

VIN L1D1

C1C2

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HB/OLED

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8.2.7 LM3410X SEPIC WSON: HB or OLED Illumination Application

Figure 26. LM3410X (1.6 MHz) HB or OLED Illumination Application Diagram

8.2.7.1 Design Requirements

For this design example, use the parameters listed in Table 13 as the input parameters.

Table 13. Design Parameters

PARAMETER EXAMPLE VALUE

VIN 2.7 V to 5.5 V

ILED ≊300 mA

VOUT ≊3.8 V

Table 14. Part Values

PART VALUE

U1 2.8-A ISW LED Driver

C1, Input capacitor 10 µF, 6.3 V, X5R

C2, Output capacitor 10 µF, 6.3 V, X5R

C3 2.2 µF, 25 V, X5R

D1, Catch diode 0.4-VfSchottky 1 A, 20 VR

L1 and L2 4.7 µH, 3 A

R1 665 mΩ, 1%

R2 100 kΩ, 1%

HB – LEDs 350 mA, Vf≊3.6 V

VIN L1D1

LM3410 LEDs

FLASH CTRL

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8.2.8 LM3410X WSON: Boost Flash Application

Figure 27. LM3410X (1.6 MHz) Boost Flash Application Diagram

8.2.8.1 Design Requirements

For this design example, use the parameters listed in Table 15 as the input parameters.

Table 15. Design Parameters

PARAMETER EXAMPLE VALUE

VIN 2.7 V to 5.5 V

ILED ≊1 A (pulse)

VOUT ≊8 V

Table 16. Part Values

PART VALUE

U1 2.8-A ISW LED Driver

C1, Input capacitor 10 µF, 6.3 V, X5R

C2, Output capacitor 10 µF, 16 V, X5R

D1, Catch diode 0.4-VfSchottky 500 mA, 30 VR

L1 4.7 µH, 3 A

R1 200 mΩ, 1%

LEDs 500 mA, Vf≊3.6 V, IPULSE = 1 A

DIMM LM3410

VPWR

LEDs

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8.2.9 LM3410X SOT-23: 5 × 1206 Series LED String Application With VIN > 5.5 V

Figure 28. LM3410X (1.6 MHz) 5 × 1206 Series LED String Application With VIN > 5.5 V Diagram

8.2.9.1 Design Requirements

For this design example, use the parameters listed in Table 17 as the input parameters.

Table 17. Design Parameters

PARAMETER EXAMPLE VALUE

VPWR 9 V to 14 V

ILED ≊50 mA

VOUT ≊16.5 V (five 3.3-V LEDs in series)

Table 18. Part Values

PART VALUE

U1 2.8-A ISW LED Driver

C1, Input VPWRcapacitor 10 µF, 6.3 V, X5R

C2, Output capacitor 2.2 µF, 25 V, X5R

C3, Input VIN capacitor 0.1 µF, 6.3 V, X5R

D1, Catch diode 0.43-VfSchottky 500 mA, 30 VR

D2 3.3 V Zener, SOT-23

L1 10 µH, 1.2 A

R1 4.02 Ω, 1%

R2 100 kΩ, 1%

R3 576 Ω, 1%

LEDs SMD-1206, 50 mA, Vf≊3.6 V

VIN L1D1

LM3410

LED(s)

FLASH CTRL

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8.2.10 LM3410X WSON: Camera Flash or Strobe Circuit Application

Figure 29. LM3410X (1.6 MHz) Camera Flash or Strobe Circuit Application Diagram

8.2.10.1 Design Requirements

For this design example, use the parameters listed in Table 19 as the input parameters.

Table 19. Design Parameters

PARAMETER EXAMPLE VALUE

VIN 2.7 V to 5.5 V

ILED ≊1.5 A (flash)

VOUT ≊7.5 V

Table 20. Part Values

PART VALUE

U1 2.8-A ISW LED Driver

C1, Input capacitor 10 µF, 6.3 V, X5R

C2, Output capacitor 220 µF, 10 V, tantalum

C3 capacitor 10 µF, 16 V, X5R

D1, Catch diode 0.43-VfSchottky 1 A, 20 VR

L1 3.3 µH, 2.7 A

R1 1 Ω, 1%

R2 37.4 kΩ, 1%

R3 100 kΩ, 1%

R4 0.15 Ω, 1%

Q1 and Q2 30 V, ID= 3.9 A

LEDs SMD-1206, 50 mA, Vf≊3.6 V, IPULSE = 1.5 A

DIMM LM3410

VPWR

VIN

L1D1

LEDs

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8.2.11 LM3410X SOT-23: 5 × 1206 Series LED String Application With VIN and VPWR Rail > 5.5 V

Figure 30. LM3410X (1.6 MHz) 5 × 1206 Series LED String Application With VIN and VPWR Rail > 5.5 V

Diagram

8.2.11.1 Design Requirements

For this design example, use the parameters listed in Table 21 as the input parameters.

Table 21. Design Parameters

PARAMETER EXAMPLE VALUE

VPWR 9 V to 14 V

VIN 2.7 V to 5.5 V

ILED ≊50 mA

VOUT ≊16.5 V (five 3.3-V LEDs in series)

Table 22. Part Values

PART VALUE

U1 2.8-A ISW LED Driver

C1, Input VPWRcapacitor 10 µF, 6.3 V, X5R

C2, Output capacitor 2.2 µF, 25 V, X5R

C3, Input VIN capacitor 0.1 µF, 6.3 V, X5R

D1, Catch diode 0.43-VfSchottky 500 mA, 30 VR

L1 10 µH, 1.2 A

R1 4.02 Ω, 1%

R2 100 kΩ, 1%

LEDs SMD-1206, 50 mA, Vf≊3.6 V

VIN L1D1

C3R3

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8.2.12 LM3410X WSON: Boot-Strap Circuit to Extend Battery Life

Figure 31. LM3410X (1.6 MHz) Boot-Strap Circuit to Extend Battery Life

8.2.12.1 Design Requirements

For this design example, use the parameters listed in Table 3 as the input parameters.

Table 23. Design Parameters

PARAMETER EXAMPLE VALUE

VIN 1.9 V to 5.5 V

>2.3 V (typical) for start-up

ILED ≊300 mA

Table 24. Part Values

PART VALUE

U1 2.8-A ISW LED Driver

C1, Input VPWR capacitor 10 µF, 6.3 V, X5R

C2, Output capacitor 10 µF, 6.3 V, X5R

C3, Input VIN capacitor 0.1 µF, 6.3 V, X5R

D1, Catch diode 0.43-VfSchottky 1 A, 20 VR

D2 and D3 Dual small signal Schottky

L1 and L2 3.3 µH, 3 A

R1 665 mΩ, 1%

R3 100 kΩ, 1%

HB – LEDs 350 mA, Vf≊3.4 V

9 Power Supply Recommendations

Any DC output power supply may be used provided it has a high enough voltage and current range for the

particular application required.

VIN

AGND

VIN

DIM

PGND

LED1

VIN

DIM

AGND

PGND

COPPER

PGND

AGND

VIN

PCB

PGND

DIM

VSW

LEDs

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10 Layout

10.1 Layout Guidelines

When planning layout there are a few things to consider when trying to achieve a clean, regulated output. The

most important consideration when completing a boost converter layout is the close coupling of the GND

connections of the COUT capacitor and the PGND pin. The GND ends must be close to one another and be

connected to the GND plane with at least two vias. There must be a continuous ground plane on the bottom

layer of a two-layer board except under the switching node island. The FB pin is a high impedance node and the

FB trace must be kept short to avoid noise pickup and inaccurate regulation. The RSET feedback resistor must be

placed as close as possible to the IC, with the AGND of RSET (R1) placed as close as possible to the AGND of

the IC. Radiated noise can be decreased by choosing a shielded inductor. The remaining components must also

be placed as close as possible to the IC. See AN-1229 SIMPLE SWITCHER®PCB Layout Guidelins (SNVA054)

for further considerations and the LM3410 demo board as an example of a four-layer layout.

For certain high power applications, the PCB land may be modified to a dog bone shape (see Figure 33).

Increasing the size of ground plane and adding thermal vias can reduce the RθJA for the application.

10.2 Layout Examples

Figure 32. Boost PCB Layout Guidelines Figure 33. PCB Dog Bone Layout

The layout guidelines described for the LM3410 boost-converter are applicable to the SEPIC OLED Converter. This is

a proper PCB layout for a SEPIC Converter.

Figure 34. HB or OLED SEPIC PCB Layout

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10.3 Thermal Considerations

10.3.1 Design

When designing for thermal performance, many variables must be considered, such as ambient temperature,

airflow, external components, and PCB design.

The surrounding maximum air temperature is fairly explanatory. As the temperature increases, the junction

temperature increases. This may not be linear though. As the surrounding air temperature increases, resistances

of semiconductors, wires and traces increase. This decreases the efficiency of the application, and more power

is converted into heat, and increases the silicon junction temperatures further.

Forced air can drastically reduce the device junction temperature. Air flow reduces the hot spots within a design.

Warm airflow is often much better than a lower ambient temperature with no airflow.

Choose components that are efficient, and the mutual heating between devices can be reduced.

The PCB design is a very important step in the thermal design procedure. The LM3410 and LM3410-Q1 are

available in three package options (6-pin WSON, 8-pin MSOP, and 5-pin SOT-23). The options are electrically

the same, but there are differences between the package sizes and thermal performances. The WSON and

MSOP have thermal die attach pads (DAP) attached to the bottom of the packages, and are therefore capable of

dissipating more heat than the SOT-23 package. It is important that the customer choose the correct package for

the application. A detailed thermal design procedure has been included in this data sheet. This procedure helps

determine which package is correct, and common applications are analyzed.

There is one significant thermal PCB layout design consideration that contradicts a proper electrical PCB layout

design consideration. This contradiction is the placement of external components that dissipate heat. The

greatest external heat contributor is the external Schottky diode. Increasing the distance between the LM3410 or

LM3410-Q1 and the Schottky diode may reduce the mutual heating effect. This, however, creates electrical

performance issues. It is important to keep the device, the output capacitor, and Schottky diode physically close

to each other (see Layout Guidelines). The electrical design considerations outweigh the thermal considerations.

Other factors that influence thermal performance are thermal vias, copper weight, and number of board layers.

Heat energy is transferred from regions of high temperature to regions of low temperature via three basic

mechanisms: radiation, conduction and convection. Conduction and convection are the dominant heat transfer

mechanism in most applications.

The data sheet values for each packages thermal impedances are given to allow comparison of the thermal

performance of one package against another. To achieve a comparison between packages, all other variables

must be held constant in the comparison (PCB size, copper weight, thermal vias, power dissipation, VIN, VOUT,

load current, and others). This provides indication of package performance, but it would be a mistake to use

these values to calculate the actual junction temperature in an application.

10.3.2 LM3410 and LM3410-Q1 Thermal Models

Heat is dissipated from the LM3410, LM3410-Q1, and other devices. The external loss elements include the

Schottky diode, inductor, and loads. All loss elements mutually increase the heat on the PCB, and therefore

increase each other’s temperatures.

PDISS-TOP

INTERNAL SMALL

LARGE

PCB

DEVICE

PDISS-PCB

PDISS

TJUNCTION

TAMBIENT

CTJ-PCB

CTJ-CASE

RTJ-PCB

RTJ-CASE

CTCASE-AMB

TCASE

EXTERNAL

PDISS

TPCB

RTPCB-AMB

CTPCB-AMB

RTCASE-AMB

IL(t)

Q1C1

VOUT(t)

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Thermal Considerations (continued)

Figure 35. Thermal Schematic

Figure 36. Associated Thermal Model

R¸

+)(

DCR

cOUT

+1 DSON

xRD

-1 ¸

OUT

OUT LOSS

P P

K 

TJ- TA

RTJA =PDissipation

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Thermal Considerations (continued)

10.3.3 Calculating Efficiency and Junction Temperature

Use Equation 31 to calculate RθJA.

(31)

A common error when calculating RθJA is to assume that the package is the only variable to consider.

Other variables are:

• Input voltage, output voltage, output current, RDS(ON)

• Ambient temperature and air flow

• Internal and external components' power dissipation

• Package thermal limitations

• PCB variables (copper weight, thermal vias, and component placement)

Another common error when calculating junction temperature is to assume that the top case temperature is the

proper temperature when calculating RθJC. RθJC represents the thermal impedance of all six sides of a package,

not just the top side. This document refers to a thermal impedance called RΨJC. RΨJC represents a thermal

impedance associated with just the top case temperature. This allows for the calculation of the junction

temperature with a thermal sensor connected to the top case.

The complete LM3410 and LM3410-Q1 boost converter efficiency can be calculated using Equation 32.

where

• PLOSS is the sum of two types of losses in the converter, switching and conduction (32)

Conduction losses usually dominate at higher output loads, where as switching losses remain relatively fixed and

dominate at lower output loads.

To calculate losses in the LM3410 or LM3410-Q1 device, use Equation 33.

PLOSS = PCOND + PSW + PQ

where

• PQ= quiescent operating power loss (33)

Conversion ratio of the boost converter with conduction loss elements inserted is calculated with Equation 34.

where

• RDCR is the Inductor series resistance (34)

R¸

+)(

DCR

cOUT

+1 DSON

xRD

-1

K|

R¸

+)(

DCR

cOUT

+1 DSON

x RD

-1

DOUT

K=

'¶

VOUT

VIN =

'¶

VOUT

VIN =

VOUT

ROUT =ILED

LM3410

LM3410-Q1

SNVS541H –OCTOBER 2007–REVISED AUGUST 2016

www.ti.com

Product Folder Links: LM3410 LM3410-Q1

Thermal Considerations (continued)

(35)

If the loss elements are reduced to zero, the conversion ratio simplifies to Equation 36.

(36)

(37)

Therefore:

(38)

Only calculations for determining the most significant power losses are discussed. Other losses totaling less than

2% are not discussed.

A simple efficiency calculation that takes into account the conduction losses is Equation 39.

(39)

The diode, NMOS switch, and inductor (DCR) losses are included in this calculation. Setting any loss element to

zero simplifies the equation.

VDis the forward voltage drop across the Schottky diode. It can be obtained from Electrical Characteristics.

Conduction losses in the diode are calculated with Equation 40.

PDIODE = VD× ILED (40)

Depending on the duty cycle, this can be the single most significant power loss in the circuit. Choose a diode that

has a low forward voltage drop. Another concern with diode selection is reverse leakage current. Depending on

the ambient temperature and the reverse voltage across the diode, the current being drawn from the output to

the NMOS switch during time (D) could be significant, this may increase losses internal to the LM3410 or

LM3410-Q1 and reduce the overall efficiency of the application. See the Schottky diode manufacturer’s data

sheets for reverse leakage specifications.

Another significant external power loss is the conduction loss in the input inductor. The power loss within the

inductor can be simplified to Equation 41,

PIND = IIN2RDCR (41)

Or Equation 42.

2xx

=RDSON

PNFET-COND ILED

IND IND

IND

1 i

Isw rms I D 1 I D

3 I

§ ·

 u  |

¨ ¸

'iIIN

ISW(t)

=RDCR

O¸

D'¨

PIND

LM3410

LM3410-Q1

www.ti.com

SNVS541H –OCTOBER 2007–REVISED AUGUST 2016

Product Folder Links: LM3410 LM3410-Q1

Thermal Considerations (continued)

(42)

The LM3410 and LM3410-Q1 conduction loss is mainly associated with the internal power switch.

PCOND-NFET = I2SW-rms × RDS(ON) × D (43)

Figure 37. LM3410 and LM3410-Q1 Switch Current

(44)

(small ripple approximation)

PCOND-NFET = IIN2× RDS(ON) × D (45)

(46)

The value for RDS(ON) must be equal to the resistance at the desired junction temperature for analyzation. As an

example, at 125°C and RDS(ON) = 250 mΩ(See Typical Characteristics for value).

Switching losses are also associated with the internal power switch. They occur during the switch ON and OFF

transition periods, where voltages and currents overlap resulting in power loss.

The simplest means to determine this loss is empirically measuring the rise and fall times (10% to 90%) of the

switch at the switch node.

PSWR = 1/2 (VOUT × IIN × fSW × tRISE) (47)

PSWF = 1/2 (VOUT × IIN × fSW × tFALL) (48)

PSW = PSWR + PSWF (49)

Table 25. Typical Switch-Node Rise and Fall Times

VIN (V) VOUT (V) tRISE (ns) tFALL (ns)

3564

5 12 6 5

3 12 8 7

5 18 10 8

VFB2

RSET

PRSET =

LM3410

LM3410-Q1

SNVS541H –OCTOBER 2007–REVISED AUGUST 2016

www.ti.com

Product Folder Links: LM3410 LM3410-Q1

10.3.3.1 Quiescent Power Losses

IQis the quiescent operating current, and is typically around 1.5 mA.

PQ= IQ× VIN (50)

10.3.3.2 RSET Power Losses

RSET power loss is calculated with Equation 51.

(51)

10.3.4 Example Efficiency Calculation

Operating Conditions:5 × 3.3-V LEDs + 190 mVREF ≊16.7 V

Table 26. Operating Conditions

PARAMETER VALUE

VIN 3.3 V

VOUT 16.7 V

ILED 50 mA

VD0.45 V

fSW 1.6 MHz

IQ3 mA

tRISE 10 ns

tFALL 10 ns

RDS(ON) 225 mΩ

LDCR 75 mΩ

D 0.82

IIN 0.31 A

ΣPCOND + PSW + PDIODE + PIND + PQ= PLOSS (52)

Quiescent Power Loss:

PQ= IQ× VIN = 10 mW (53)

Switching Power Loss:

PSWR = 1/2(VOUT × IIN × fSW × tRISE)≊40 mW (54)

PSWF = 1/2(VOUT × IIN × fSW × tFALL)≊40 mW (55)

PSW = PSWR + PSWF = 80 mW (56)

Internal NFET Power Loss:

RDS(ON) = 225 mΩ(57)

PCONDUCTION = IIN2× D × RDS(ON) = 17 mW (58)

IIN = 310 mA (59)

Diode Loss:

VD= 0.45 V (60)

PDIODE = VD× ILED = 23 mW (61)

Inductor Power Loss:

RDCR = 75 mΩ(62)

PIND = IIN2× RDCR = 7 mW (63)

TJA

RPnDissipatio

-A

<JC

RPnDissipatio

-Case-Top

TJA

RPnDissipatio

-A

<JC

RPnDissipatio

-Case

LM3410

LM3410-Q1

www.ti.com

SNVS541H –OCTOBER 2007–REVISED AUGUST 2016

Product Folder Links: LM3410 LM3410-Q1

Table 27. Total Power Losses

PARAMETER VALUE LOSS PARAMETER LOSS VALUE

VIN 3.3 V — —

VOUT 16.7 V — —

ILED 50 mA POUT 825 W

VD0.45 V PDIODE 23 mW

fSW 1.6 MHz — —

IQ10 ns PSWR 40 mW

tRISE 10 ns PSWF 40 mW

IQ3 mA PQ10 mW

RDS(ON) 225 mΩPCOND 17 mW

LDCR 75 mΩPIND 7 mW

D 0.82 — —

η85% PLOSS 137 mW

PINTERNAL = PCOND + PSW = 107 mW (64)

10.3.5 Calculating RθJA and RΨJC

(65)

We now know the internal power dissipation, and we are trying to keep the junction temperature at or below

125°C. The next step is to calculate the value for RθJA or RΨJC. This is actually very simple to accomplish, and

necessary for determining the correct package option for a given application.

The LM3410 and LM3410-Q1 have a thermal shutdown comparator. When the silicon reaches a temperature of

165°C, the device shuts down until the temperature drops to 150°C. From this, it is possible calculate the RθJA or

the RΨJC of a specific application. Because the junction to top case thermal impedance is much lower than the

thermal impedance of junction to ambient air, the error in calculating RΨJC is lower than for RθJA . However, a

small thermocouple needs to be attached onto the top case of the device to obtain the RΨJC value.

Knowing the temperature of the silicon when the device shuts down provides three of the four variables. After

calculating the thermal impedance, working backwards with the junction temperature set to 125°C, the maximum

ambient air temperature to keep the silicon below 125°C can be calculated.

Procedure:

Place the application into a thermal chamber. Dissipate enough power in the device to obtain an accurate

thermal impedance value.

Raise the ambient air temperature until the device goes into thermal shutdown. Record the temperatures of the

ambient air and the top case temperature of the device. Calculate the thermal impedances.

Example from previous calculations (SOT-23 Package):

PINTERNAL = 107 mW (66)

TAat shutdown = 155°C (67)

TCat shutdown = 159°C (68)

(69)

RθJA SOT-23 = 93°C/W (70)

RΨJC SOT-23 = 56°C/W (71)

LM3410

LM3410-Q1

SNVS541H –OCTOBER 2007–REVISED AUGUST 2016

www.ti.com

Product Folder Links: LM3410 LM3410-Q1

Typical WSON and MSOP typical applications produces RθJA numbers from 53.7°C/W to 55.3°C/W, and RθJC

varies from 61.4°C/W to 65.9°C/W. These values are for PCBs with two and four layer boards with 0.5 oz

copper, and four to six thermal vias to bottom side ground plane under the DAP. The thermal impedances

calculated above are higher due to the small amount of power being dissipated within the device.

NOTE

To use these procedures it is important to dissipate an amount of power within the device

that indicates a true thermal impedance value. If a very small internal dissipated value is

used, the resulting thermal impedance calculated is abnormally high, and subject to error.

Figure 38 shows the nonlinear relationship of internal power dissipation vs RθJA.

Figure 38. RθJA vs Internal Dissipation

For 5-pin SOT-23 package typical applications, RθJA numbers range from 164.2°C/W, and RθJC varies from

115.3°C/W. These values are for PCBs with two and four layer boards with 0.5 oz copper, with two to four

thermal vias from GND pin to bottom layer.

Using typical thermal impedances and an ambient temperature maximum of 75°C, if the design requires more

dissipation than 400 mW internal to the device, or there is 750 mW of total power loss in the application, TI

recommends using the 6-pin WSON or the 8-pin MSOP-PowerPad package with the exposed DAP.

11 Device and Documentation Support

11.1 Device Support

11.1.1 Device Nomenclature

Radiation Electromagnetic transfer of heat between masses at different temperatures.

Conduction Transfer of heat through a solid medium.

Convection Transfer of heat through the medium of a fluid; typically air.

RθJA Thermal impedance from silicon junction to ambient air temperature.

RθJA is the sum of smaller thermal impedances (see Figure 35 and Figure 36). Capacitors

within the model represent delays that are present from the time that power and its

associated heat is increased or decreased from steady state in one medium until the time

that the heat increase or decrease reaches steady state in the another medium.

RθJC Thermal impedance from silicon junction to device case temperature.

LM3410

LM3410-Q1

www.ti.com

SNVS541H –OCTOBER 2007–REVISED AUGUST 2016

Product Folder Links: LM3410 LM3410-Q1

Device Support (continued)

CθJC Thermal Delay from silicon junction to device case temperature.

CθCA Thermal Delay from device case to ambient air temperature.

11.2 Documentation Support

11.2.1 Related Documentation

For related documentation see the following:

AN-1229 SIMPLE SWITCHER®PCB Layout Guidelins (SNVA054)

11.3 Related Links

The table below lists quick access links. Categories include technical documents, support and community

resources, tools and software, and quick access to sample or buy.

Table 28. Related Links

PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL

DOCUMENTS TOOLS &

SOFTWARE SUPPORT &

COMMUNITY

LM3410 Click here Click here Click here Click here Click here

LM3410-Q1 Click here Click here Click here Click here Click here

11.4 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper

right corner, click on Alert me to register and receive a weekly digest of any product information that has

changed. For change details, review the revision history included in any revised document.

11.5 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective

contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of

Use.

TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration

among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help

solve problems with fellow engineers.

Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and

contact information for technical support.

11.6 Trademarks

PowerPad, E2E are trademarks of Texas Instruments.

SIMPLE SWITCHER is a registered trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

11.7 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

11.8 Glossary

SLYZ022 —TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

LM3410

LM3410-Q1

SNVS541H –OCTOBER 2007–REVISED AUGUST 2016

www.ti.com

Product Folder Links: LM3410 LM3410-Q1

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

PACKAGE OPTION ADDENDUM

www.ti.com 30-Jan-2016

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish

(6)

MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

LM3410XMF/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 SSVB

LM3410XMFE/NOPB ACTIVE SOT-23 DBV 5 250 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 SSVB

LM3410XMFX/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 SSVB

LM3410XMY/NOPB ACTIVE MSOP-

PowerPAD DGN 8 1000 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 SSXB

LM3410XMYE/NOPB ACTIVE MSOP-

PowerPAD DGN 8 250 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 SSXB

LM3410XMYX/NOPB ACTIVE MSOP-

PowerPAD DGN 8 3500 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 SSXB

LM3410XQMF/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 SXUB

LM3410XQMFX/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 SXUB

LM3410XSD/NOPB ACTIVE WSON NGG 6 1000 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 3410X

LM3410XSDE/NOPB ACTIVE WSON NGG 6 250 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 3410X

LM3410XSDX/NOPB ACTIVE WSON NGG 6 4500 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 3410X

LM3410YMF/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 SSZB

LM3410YMFE/NOPB ACTIVE SOT-23 DBV 5 250 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 SSZB

LM3410YMFX/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 SSZB

LM3410YMY/NOPB ACTIVE MSOP-

PowerPAD DGN 8 1000 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 STAB

LM3410YMYE/NOPB ACTIVE MSOP-

PowerPAD DGN 8 250 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 STAB

LM3410YMYX/NOPB ACTIVE MSOP-

PowerPAD DGN 8 3500 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 STAB

PACKAGE OPTION ADDENDUM

www.ti.com 30-Jan-2016

Addendum-Page 2

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish

(6)

MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

LM3410YQMF/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 SXXB

LM3410YQMFX/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 SXXB

LM3410YSD/NOPB ACTIVE WSON NGG 6 1000 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 3410Y

LM3410YSDE/NOPB ACTIVE WSON NGG 6 250 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 3410Y

LM3410YSDX/NOPB ACTIVE WSON NGG 6 4500 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 3410Y

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish

value exceeds the maximum column width.

PACKAGE OPTION ADDENDUM

www.ti.com 30-Jan-2016

Addendum-Page 3

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF LM3410, LM3410-Q1 :

•Catalog: LM3410

•Automotive: LM3410-Q1

NOTE: Qualified Version Definitions:

•Catalog - TI's standard catalog product

•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

LM3410XMF/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LM3410XMFE/NOPB SOT-23 DBV 5 250 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LM3410XMFX/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LM3410XMY/NOPB MSOP-

Power

PAD

DGN 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

LM3410XMYE/NOPB MSOP-

Power

PAD

DGN 8 250 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

LM3410XMYX/NOPB MSOP-

Power

PAD

DGN 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

LM3410XQMF/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LM3410XQMFX/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LM3410XSD/NOPB WSON NGG 6 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1

LM3410XSDE/NOPB WSON NGG 6 250 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1

LM3410XSDX/NOPB WSON NGG 6 4500 330.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1

LM3410YMF/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LM3410YMFE/NOPB SOT-23 DBV 5 250 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LM3410YMFX/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

PACKAGE MATERIALS INFORMATION

www.ti.com 10-Mar-2017

Pack Materials-Page 1

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

LM3410YMY/NOPB MSOP-

Power

PAD

DGN 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

LM3410YMYE/NOPB MSOP-

Power

PAD

DGN 8 250 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

LM3410YMYX/NOPB MSOP-

Power

PAD

DGN 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

LM3410YQMF/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LM3410YQMFX/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LM3410YSD/NOPB WSON NGG 6 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1

LM3410YSDE/NOPB WSON NGG 6 250 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1

LM3410YSDX/NOPB WSON NGG 6 4500 330.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

LM3410XMF/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0

LM3410XMFE/NOPB SOT-23 DBV 5 250 210.0 185.0 35.0

LM3410XMFX/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0

LM3410XMY/NOPB MSOP-PowerPAD DGN 8 1000 210.0 185.0 35.0

LM3410XMYE/NOPB MSOP-PowerPAD DGN 8 250 210.0 185.0 35.0

PACKAGE MATERIALS INFORMATION

www.ti.com 10-Mar-2017

Pack Materials-Page 2

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

LM3410XMYX/NOPB MSOP-PowerPAD DGN 8 3500 367.0 367.0 35.0

LM3410XQMF/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0

LM3410XQMFX/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0

LM3410XSD/NOPB WSON NGG 6 1000 210.0 185.0 35.0

LM3410XSDE/NOPB WSON NGG 6 250 210.0 185.0 35.0

LM3410XSDX/NOPB WSON NGG 6 4500 367.0 367.0 35.0

LM3410YMF/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0

LM3410YMFE/NOPB SOT-23 DBV 5 250 210.0 185.0 35.0

LM3410YMFX/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0

LM3410YMY/NOPB MSOP-PowerPAD DGN 8 1000 210.0 185.0 35.0

LM3410YMYE/NOPB MSOP-PowerPAD DGN 8 250 210.0 185.0 35.0

LM3410YMYX/NOPB MSOP-PowerPAD DGN 8 3500 367.0 367.0 35.0

LM3410YQMF/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0

LM3410YQMFX/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0

LM3410YSD/NOPB WSON NGG 6 1000 210.0 185.0 35.0

LM3410YSDE/NOPB WSON NGG 6 250 210.0 185.0 35.0

LM3410YSDX/NOPB WSON NGG 6 4500 367.0 367.0 35.0

PACKAGE MATERIALS INFORMATION

www.ti.com 10-Mar-2017

Pack Materials-Page 3

www.ti.com

PACKAGE OUTLINE

TYP

0.22

0.08

0.25

3.0

2.6

2X 0.95

1.9

1.45 MAX

TYP

0.15

0.00

5X 0.5

0.3

TYP

0.6

0.3

TYP

1.9

3.05

2.75

1.75

1.45

(1.1)

SOT-23 - 1.45 mm max heightDBV0005A

SMALL OUTLINE TRANSISTOR

4214839/C 04/2017

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. Refernce JEDEC MO-178.

0.2 C A B

INDEX AREA

PIN 1

GAGE PLANE

SEATING PLANE

0.1 C

SCALE 4.000

www.ti.com

EXAMPLE BOARD LAYOUT

0.07 MAX

ARROUND 0.07 MIN

ARROUND

5X (1.1)

5X (0.6)

(2.6)

(1.9)

2X (0.95)

(R0.05) TYP

4214839/C 04/2017

SOT-23 - 1.45 mm max heightDBV0005A

SMALL OUTLINE TRANSISTOR

NOTES: (continued)

4. Publication IPC-7351 may have alternate designs.

5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

SYMM

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:15X

PKG

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

DEFINED

EXPOSED METAL

METAL

SOLDER MASK

OPENING

NON SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK DETAILS

EXPOSED METAL

www.ti.com

EXAMPLE STENCIL DESIGN

(2.6)

(1.9)

2X(0.95)

5X (1.1)

5X (0.6)

(R0.05) TYP

SOT-23 - 1.45 mm max heightDBV0005A

SMALL OUTLINE TRANSISTOR

4214839/C 04/2017

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

7. Board assembly site may have different recommendations for stencil design.

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

SCALE:15X

SYMM

PKG

www.ti.com

PACKAGE OUTLINE

TYP

0.22

0.08

0.25

3.0

2.6

2X 0.95

1.9

1.45 MAX

TYP

0.15

0.00

5X 0.5

0.3

TYP

0.6

0.3

TYP

1.9

3.05

2.75

1.75

1.45

(1.1)

SOT-23 - 1.45 mm max heightDBV0005A

SMALL OUTLINE TRANSISTOR

4214839/C 04/2017

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. Refernce JEDEC MO-178.

0.2 C A B

INDEX AREA

PIN 1

GAGE PLANE

SEATING PLANE

0.1 C

SCALE 4.000

www.ti.com

EXAMPLE BOARD LAYOUT

0.07 MAX

ARROUND 0.07 MIN

ARROUND

5X (1.1)

5X (0.6)

(2.6)

(1.9)

2X (0.95)

(R0.05) TYP

4214839/C 04/2017

SOT-23 - 1.45 mm max heightDBV0005A

SMALL OUTLINE TRANSISTOR

NOTES: (continued)

4. Publication IPC-7351 may have alternate designs.

5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

SYMM

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:15X

PKG

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

DEFINED

EXPOSED METAL

METAL

SOLDER MASK

OPENING

NON SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK DETAILS

EXPOSED METAL

www.ti.com

EXAMPLE STENCIL DESIGN

(2.6)

(1.9)

2X(0.95)

5X (1.1)

5X (0.6)

(R0.05) TYP

SOT-23 - 1.45 mm max heightDBV0005A

SMALL OUTLINE TRANSISTOR

4214839/C 04/2017

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

7. Board assembly site may have different recommendations for stencil design.

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

SCALE:15X

SYMM

PKG

MECHANICAL DATA

NGG0006A

www.ti.com

SDE06A (Rev A)

MECHANICAL DATA

DGN0008A

www.ti.com

MUY08A (Rev A)

BOTTOM VIEW

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