Version 1.6, Dece mb er 1, 20 03 Proprietary to OmniVision Technologies 1
Advanced Information
Preliminary Datasheet
OV7910 Color CMOS NTSC/PAL CAMERACHIPTM
OV7411 B&W CMOS NTSC/PAL CAMERACHIPTM
Omni TM
ision
General Description
The OV7910 (color) and OV7411 (black and white) single
chip CMOS CAMERACHIPSTM are designed to provide a
high level of functionality in a small footprint package.
Both devices support NTSC/PAL composite video and
S-Video. The OV7910 imager also provides RGB and
YCbCr video signals, an d each device directly interfaces
with a VCR TV monitor or other 75 ohm terminated input.
A minimal number of external components are required to
complete a fully functional camera subsystem. The
OV7910/OV7411 video cameras require only a single
5-volt DC supply and have been designed for very low
power operation. These products are ideal for all
applications requiring a small footprint, low voltage, low
power and low cost color or black and white video camera.
Features
Single chip 1/3" format video camera
628 x 582 pixels (PAL) or 510 x 492 pixels (NTSC)
Composite video: NTSC, S-Video
Component video RGB or YUV
Sensitivity boost (+18 dB)/AGC ON/OFF
Automatic exposure/gain/white balance
External frame sync capability
Aperture correction
SCCB programmable controls: color saturation, gain,
brightness, contrast, white balance, exposure time
Gamma correction (0.45) ON/OFF
Low power consumption
+5 volt only power supply
Ordering Information
Product Package
OV07910-C10A (Color, NTSC) CLCC-48
OV07910-C20A (Color, PAL) CLCC-48
OV07910-P10A (Color, NTSC) PLCC-48
OV07910-P20A (Color, PAL) PLCC-48
OV07411-C10A (B&W, NTSC) CL CC-48
OV07411-C20A (B&W, PAL) CLCC-48
OV07411-P10A (B&W, NTSC) PLCC-48
OV07411-P20A (B&W, PAL) PLCC-48
Applications
Automotive
PC Multimedia
•Toys
Security
Surveillance
Video phones
Video conference equipment
Key Specifications
Figure 1 OV7910/OV7411 Pin Diagram
Array Size PAL 628 x 582
NTSC 510 x 492
Power Supply 5 VDC + 5%
Power Requirements 200 mW
Image Area PAL 5.78 mm x 4.19 mm
NTSC 4.69 mm x 3.54 mm
Auto Electronic Exposure Time 1/60s to 1/1500s
Lens Size 1/3"
Min. Illumination
(3000K) OV7910 < 5 Lux
OV7411 < 1 Lux
S/N Ratio 40 dB
Pixel Size 9.2 µm x 7.2 µm
Fixed Patter n Noise < 0.03% VPP
Package Dimensions .560 in. x .560 in.
36FSI
37PWDN
38AMOD0
39AMOD1
40
HSHP
41DEVDD
42DEGND
31
VAXPXO
32VHSYNC/MIR
33FSO/VSFR
34FODD/SCCB_E
35PALSW
13 EVDD
12 SMTAWB
11 RSVD11
10 HSAT
9CEXP
8 RGSW
7 AVDD
18 OVDD
17 RVCVO
16 GYYO
15 BVCO
14 EGND
48
VREF4
1
SGND
2
SVDD
3
VcBRT
4
BPAVE
5
RSVD5
6
AGND
43
SCL
44
SDA
45
VREF1
46
VREF2
47
VREF3
OV7910/OV7411
25
DVDD
24
PAL
23
XCLK2
22
XCLK1
21
BKLT
20
HGAIN
19
G2X
30
AWBTM
29
AWBEN
28
AGCEN
27
GAMMA
26
DGND
2Proprietary to OmniVision Technologies Version 1.6, December 1, 2003
OV7910/OV7411 CMOS NTSC/PAL CAMERACHIPOmni ision
Functional Description
This section describes the various functions of the OV7910/OV7411. Refer to Figure 2 for the functional block diagram of the
OV7910/OV7411.
Figure 2 Functional Block Diagram
Clock/Timing Generator and Control Logic
Image Array
(628 X 582)
Row
Select
SCCB
Interface
Gain
Control
SCCB_E
SCL
SDA
ASP
Control
CVO
Analog Signal
Processor
(ASP)
XCLK1
XCLK2
PWDN
FSI
BKLT
VcBRT
GAMMA
VHSYNC
VAXPXO
FODD
AMP
Control
Register
Bank
Column Sample/Hold
Functional Description
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Video Standards
Two TV standards are implemented and available as
output in the OV7910/OV7411 imaging devices,
NTSC (M) and PAL (B). Table 1 shows how to configure
the standard of choice. Note that the accuracy and
stability of the crystal clock frequency is important to avoid
unwanted color shift in TV video system.
Video Formats
The OV7910/OV7411 image sensors support a variety of
formats including Composite (CVBS), S-Video (YO/CO),
RGB components, and YUV components. Composite and
S-Video signals are generated from the internal TV
encoder and RGB/YUV outputs are generated form the
color matrix prior to entering the encoder. The image
sensor utilizes the RG/BG Bayer pattern, sending raw
pixel data through the color ma trix, creati ng RGB or YUV
component signals. At the same time, YUV signals are
also processed to generate both composite and S-video
signals. Note that color format configuration is valid only
for the OV7910 image sensor.
Composite and S-Video
The Composite/S-Video format is the power-up default
configuration for the OV7910/OV7411 image sensors.
AMOD0 (pin 38) and AMOD1 (pin 39) select composite
and S-video formats. In this configuration, RVCVO
(pin 17) outputs the YO co mponent of the S-video signa l
and BVCO (pin 15) outputs the CO component. Table 2
summarizes the available formats and the settings
required on the appropriate pins.
RGB Format
Setting AMOD0 = 1 (with AMOD1 = x) selects the RGB
format. In this configuration, RVCVO outputs the RED
component, GYYO outputs the GREEN component and
BVCO provides the BLUE component.
Table 1 Standard Configurations
Standard PAL Setting
(Pin 24) Clock Comments
NTSC 0 14.31818 MHz Clock in =
4 x FSC
PAL 1 17.734475 MHz Clock in =
4 x FSC
YUV Format
Setting AMOD0 = 0 and AMOD1 = 1 configures the
OV7910/OV7411 sensors to operate in YUV mode or
B&W mode. In this configuration, GYYO outputs the Y
component, RVCVO provides the Cr component, and
BVCO outputs the Cb component. On the OV7411 image
sensor, only the GYYO (Y component) output is valid.
Configuring the OV7910/OV7411
The OV7910/OV7411 sensors are designed for
ease-of-use in many standalone applications. Most of the
on-chip functions are configurable by connecting
appropriate pins high (logic "1") or low (logic "0") using a
10K resistor. The image sensor reads the input pins at
power up which enable user-defined default
configurations.
The OV7910/OV7411 sensors also contain a Serial
Camera Control Bus (SCCB) interface for programmable
access to all register functions. For further details on the
SCCB port, see “Serial Camera Control Bus (SCCB)” on
page 4. By default, the SCCB interface is disabled. To
enable the SCCB interface for controlling the sensor, a
10K. pull-up resistor must be connected to the
FODD/SCCB_E pin (pin 34). With the FODD/SCCB_E pin
pulled high at power-up, the OV7910/OV7411 image
sensors will enable the SCCB port for access.
White Balance
The White Balance function in the OV7910/OV7411
image sensor is used to adjust and calibrate the image
device sensitivity on the primary (RGB) colors to match
the color cast of the light source. The Auto White Balance
(AWB) can be enabled or disabled through either the
AWBEN pin (pin 29) or through the SCCB port. If AWB is
enabled, the image sensors continuously perform white
balancing. A fast or slow mode of white balancing may be
user-selected through the AWBTM pin (pin 30). Fast A WB
updates color every 2 fields while slow AWB updates
every 16 fields.
By using the SCCB port, the color temperature may be
further fine tuned to the requirement of the application.
Note that the "blue" (BLUE and BBS registers) a nd "red"
(RED and RBS registers) bias control are only available
through the SCCB port. This function ena bles the user to
define a "cooler" or "warmer" background for image
capture.
4Proprietary to OmniVision Technologies Version 1.6, December 1, 2003
OV7910/OV7411 CMOS NTSC/PAL CAMERACHIPOmni ision
Table 2 Video Format Options
Format Type RVCVO (Pin 17) GYYO (Pin 16) BUCO (Pin 15) Pin Settings
Composite/S-Video CVBS YO CO AMOD0 = 0, AMOD1 = 0
RGB Component RED GREEN BLUE AMOD0 = 1, AMOD1 = x
YUV Component Cr Y Cb AMOD0 = 0, AMOD1 = 1
Black and White Y
AMOD0 = 0, AMOD1 = 1
Note: Pins 15 and 17 are undefined
in the OV7411 sensor.
Additional Picture Control
A number of functions/registers are available which
enable the user to configure OV7910/OV7411 image
capturing parameters. These fu ncti ons i nclude Automatic
Gain Control (AGC), AGC Gain, Automatic Exposure
Control (AEC), GAMMA, and Backlight control.
AGC Gain can be set at 2x normal by programming pin 20,
HGAIN. This function may be configured through the
SCCB port as well. GAMMA (pin 27) can be used to set
the color correction. BKLT (pin 21) controls how the
OV7910/OV7411 image sensors manage backlight
conditions. These functions may also be controlled by the
SCCB interface.
At power up, AGC and AEC are enabled. AGC can be
disabled at power-up by configuring the AGCEN pin
(pin 28) as required. AEC cannot be enabled/disabled
externally and must be programmed through the SCCB
port.
Other Image Sensor Control Functions
Additional programmable functions for OV7910/OV7411
image sensors include sharpn ess adjustment, brightness
level fine tune, color saturation adjustment, hue
adjustment. All these functions (except for power down)
can be configured by either an external pin or through the
SCCB interface.
Serial Camera Control Bus (SCCB)
Many of the functions and configuration registers in the
OV7910/OV741 1 image sensors are available through the
SCCB interface. The SCCB port is enabled by asserting
the SCCB_E line (pin 34, see “FODD/SCCB_E” on
page 8) through a 10K resistor to VDD. When the SCCB
capability is enabled (SCCB_E = 1), the OV7910/OV741 1
image sensor operates as a slave device that supports up
to 400 kbps serial transfer rate using a 7-bit address/data
transfer pr otocol.
NOTE: When the SCCB interface is enabled, the
OV7410/OV7411 will ou tput in co lor by default. To output
in B&W mode, set register COMB[1:0] = 10b.
SCCB Protocol Format
In SCCB operation (see Figure 5), the master must
perform the following operations:
Generate the Start/Stop condition
Provide the serial clock on SCL
Place the 7-bit slave address (RW bit) and the 8-bit
sub-address on SDA
The receiver must pull down SDA during the
acknowledgement bit time. During the write cycle, the
OV7910/OV7411 device returns the acknowledgement
and, during the read cycle, the master returns the
acknowledgement, indicating to the slave that the read
cycle can be terminated. Note that the restart feature is
not supported here.
Within each byte, the MSB is transferred first. The
read/write control bit is the LSB of the first byte. Standard
SCCB communications require only two pins, SCL and
SDA. SDA is configured as an open drain for bidirectional
purposes. A HIGH to LOW transition on the SDA while
SCL is HIGH indicates a START condition. A LOW to
HIGH transition on th e SDA while SCL is HIGH indicates
a STOP condition. Only a master can generate
START/STOP conditions.
Except for these two special conditions, the protocol that
SDA remain stable during the HIGH period of the clock,
SCL. Each bit is al lowed to change state only when SCL
is LOW (see Figure 3 and Figure 4).
The OV7910/OV741 1 SCCB interface supports multi-byte
write and multi-byte read. The master must supply the
sub-address in the write cycle, but not in the read cycle.
Therefore, the OV7910/OV7411 takes the read
sub-address from the previous write cycle. In multi-byte
write or multi-byte read cycles, the sub-address
automatically increments after the first data byte so that
Functional Description
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continuous locations can be accessed in one bus cycle. A
multi-byte cycle overwrites its original sub-address;
therefore, if a read cycle immed iately follows a multi-byte
cycle, a single byte write cycle that provides a new
address must be inserted.
The OV7910/OV7411 supports a single sl ave ID. The ID
is preset to 80 for write and 81 for read.
In the write cycle, the second byte in the SCCB is the
sub-address for selecting the indivi dual on-chip regi sters,
and the third byte is the data associated with this register.
Writing to the unimplemented sub-address is ignored.
In the read cycle, the second byte is the data associated
with the previously stored sub-address. Reading of an
unimplemented sub-address returns unknown.
Figure 3 Bit Transfer on the SCCB
DATA DATA
SDA
SCL
STABLE CHANGE
ALLOWED
Figure 4 Data Transfer on the SCCB
Figure 5 SCCB Protocol Format
SDA
SCL
SLAVE ID SUB-ADDRESS DATA
RW
S P
AAA
RW SUB-ADDRESS (8-BIT) DATA (8-BIT)SLAVE (7-BIT)S A A A P
STOP
ACKACKLSB=0MSB
START
FIRST BYTE SECOND BYTE THIRD BYTE
MASTER TRANSMIT, SLAVE RECEIVE (WRITE CYCLE)
RW SUB-ADDRESS (8-BIT)SLAVE (7-BIT)S A A P
STOP
ACKLSB=0MSB
START
FIRST BYTE SECOND BYTE
MASTER TRA N SM I T, SLAV E R E CEIVE (DUMMY WRITE CY C LE )
RW DATA (8-BIT) DATA (8-BIT)SLAVE (7-BIT)S A A 1 P
STOP
NO ACK IN
ACKLSB=1MSB
START
FIRST BYTE SECOND BYTE THIRD BYTE
MASTER RECEIVE, SLAVE RECEIVE (READ CYCLE) LAST BYTE
SLAVE TRANSMIT
MASTER TRANSMIT
MASTER INITIATE
S – START CONDITION
A – ACKNOWLEDGE BIT
P – STOP CONDITION
SLAVE ID – 1000000X
X – RW BIT, 1: READ, 0: WRITE
6Proprietary to OmniVision Technologies Version 1.6, December 1, 2003
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Pin Description
Table 3 Pin Description
Pin
Number Name Pin
Type Function/Description
01 SGND VIN Analog ground
02 SVDD VIN Analog Power (+5 VDC)
03 VcBRT 1.2V Image brightness adjustment - default set by internal resistor (~50K).
Default may be changed by applying an external bia s to this pin.
04 BPAVE Function
(default = 0)
Internal 3-point average selection
0: Use internal 3-point averaging
1: Bypass internal 3-point averaging
05 RSVD5 VREF Internal reference
06 AGND VIN Analog ground
07 AVDD VIN Analog power (+ 5 VDC)
08 RGSW Function
(default = 0)
"Raw" data pixel selection
0: Select "raw" pixel data
1: Select non-"raw" pixel dat a
09 CEXP Function
(default = 0)
Central exposure selection
0: Select normal mode
1: Select central exposure mode
10 HSAT Function
(default = 0)
Color saturation selection
0: Select normal color saturation
1: Select increase color saturation by 25%
11 RSVD11 NC Reserved
12 SMTAWB Function
(default = 0)
Automatic White Balance (AWB) smart mode selection
0: Disable smart mode
1: Enable smart mode - count pixels which contain a luminance
signal between 10-80% of maximum value
13 EVDD VIN Analog power (+5 VDC)
14 EGND VIN Analog ground
15 BVCO Output
Video output - output format determined by pin 38 (AMOD0) and pin 39
(AMOD1)
AMOD0 AMOD1 Format Output Component
0 0 Composite S-video CO channel
0 1 YUV or B&W Cb component
1 0 RGB Blue component
1 1 RGB Blue component
16 GYYO Output
Video output - output format determined by pin 38 (AMOD0) and pin 39
(AMOD1)
AMOD0 AMOD1 Format Output Component
0 0 Composite S-video YO channel
0 1 YUV or B&W Y component
1 0 RGB Green component
1 1 RGB Green component
Pin Description
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17 RVCVO Output
Video output - output format determined by pin 38 (AMOD0) and pin 39
(AMOD1)
AMOD0 AMOD1 Format Output Component
0 0 Composite CVBS
0 1 YUV or B&W Cr component
1 0 RGB Red component
1 1 RGB Red component
18 OVDD VIN Analog power for video output (+5 VDC)
19 G2X Function
(default = 0)
Enhanced gain selection for Auto matic Gain Control (AGC)
0: Select normal AGC gain (no additional 2x gain)
1: Select additional 2x AGC gain
20 HGAIN Function
(default = 0)
AGC gain range selection
0: Select normal AGC range
1: Select AGC range x2 (4x to 8x)
21 BKLT Function
(default = 0)
Backlight selection
0: Disable backlight compensation
1: Enable backlight compensation
22 XCLK1 Input Crystal clock input - frequency is 4 x FSC to meet NTSC/PAL subcarrier
standards
23 XCLK2 Output Crystal clock output
(4 x FSC for NTSC = 14.318181 MHz, 4 x FSC for PAL = 17.73265 MHz)
24 PAL Function
(default = 0)
NTSC/PAL selection
0: Select NTSC mode
1: Select PAL mode
25 DVDD VIN Digital power
26 DGND VIN Digital ground
27 GAMMA Function
(default = 1)
GAMMA selection
0: Disable GAMMA correction
1: Enable GAMMA correction
28 AGCEN Function
(default = 1)
AGC selection
0: Disable AGC
1: Enable AGC
29 AWBEN Function
(default = 1)
Automatic White Balance (AWB) selection
0: Disable AWB
1: Enable AWB
30 AWBTM Function
(default = 0)
AWB speed selection
0: Select normal AWB
1: Select "fast" AWB
31 VAXPXO Output Valid pixel detect output - CLK is asserted on this pin during active image
period
32 VHSYNC/MIR Output/Function
(default = 0) Vertical/horizontal sync output - adding a pull-up resistor on this pin
enables mirror image
Table 3 Pin Description (Continued)
Pin
Number Name Pin
Type Function/Description
8Proprietary to OmniVision Technologies Version 1.6, December 1, 2003
OV7910/OV7411 CMOS NTSC/PAL CAMERACHIPOmni ision
33 FSO/VSFR Output/Function
(default = 0) Vertical field/frame sync output - (default = field sync) adding a pull-up
resistor on this pin enables frame sync
34 FODD/SCCB_E Output/Function
(default = 0) Even/Odd field flag - adding a pull-u p resistor on this pin enables SCCB
control
35 PALSW Outp ut PAL switch clock output
36 FSI Input Field sync input
37 PWDN Function Power down mode selection
0: Disable power down mode
1: Enable power down mode
38 AMOD0 Function
Mode output selection - determined with pin 39 (AMOD1)
AMOD0 AMOD1 Mode
0 0 YO/CO/CVO
01 RGB
10 Y/U/V
11 RGB
39 AMOD1 Function
Mode output selection - determined with pin 38 (AMOD0)
AMOD0 AMOD1 Mode
0 0 YO/CO/CVO
01 RGB
10 Y/U/V
11 RGB
40 HSHP Function Sharpness level selection
0: Select normal sharpness
1: Select x2 sharpness
41 DEVDD VIN Analog power
42 DEGND VIN Analog ground
43 SCL I/O SCCB control
44 SDA I/O SCCB data/address
45 VREF1 VREF Internal reference - must be decoupled with 0.1 µF capacitor to analog
ground
46 VREF2 VREF Internal reference - must be decoupled with 0.1 µF capacitor to analog
ground
47 VREF3 VREF Internal reference - must be decoupled with 0.1 µF capacitor to analog
ground
48 VREF4 VREF Internal reference - must be decoupled with 0.1 µF capacitor to analog
ground
Table 3 Pin Description (Continued)
Pin
Number Name Pin
Type Function/Description
Electrical Characteristics
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Electrical Characteristics
Table 4 Operating Conditions
Parameter Min Max Unit
Operatin g te mperature 0 40 °C
Storage temperature -40 125 °C
Operating humidity TBD TBD
Storage humidity TBD TBD
Table 5 Electrical Characteristics (0°C to 70°C, all voltages referenced to GND)
Symbol Parameter Min Typ Max Unit
Supply
VDD Supply voltage (VDD, DVDD) 4.75 5.0 5.25 V
VDDO Supply voltage (DOVDD) 3 5.25 V
IDD1 Supply current in VDDs 25 mA
IDD2 Supply current in DOVDD with 50 pF load at
digital output TBD mA/MHz
IDD3 Standby supply current (CMOS level at inputs) 100 µA
Digital Input Pin
VIL Input voltage LOW 0.8 V
VIH Input voltage HIGH 2.0 V
CIN Input capacitor 10 pF
tr, t fDigital input rise/fal l time 25 ns
Digital Output - Standard Load 50 pF, 1.2 K to 3.0 V
VOH Output voltage HIGH 2.4 V
VOL Output voltage LOW 0.6 V
Video Bus - at 60Hz fps
tPCLK PCLK cycle time 74 ns
tPPCLK pulse width 32 ns
tDS Data to PCLK setup time tP - 10 ns
tDH Data to PCLK hold time tP - 10 ns
SCCB
fscl SCL clock frequency 400 KHz
tfSDA fall time 20 + 0.1Csda 300 ns
tidle Bus idle time 1.3 µs
10 Proprietary to OmniVision Technologies Version 1.6, December 1, 2003
OV7910/OV7411 CMOS NTSC/PAL CAMERACHIPOmni ision
thdsta START hold time 0.6 µs
tstps STOP setup time 0.6 µs
tds SDA setup time 100 µs
tdh SDA hold time 0 µs
Clock Input/Crystal Oscillator
fOSC Resonator frequency TBD TBD TBD MHz
Load capacitor 10 pF
Parallel resistance 1M
Rise/fall time for external clock input 5 ns
Duty cycle for external clock input 40 60 %
Miscellaneous T iming
tSYNC External FSI cycle time 2 frame
tPU Chip power up time 100 µs
tPD Power up delay time 10 µs
tPZ Power up low-z delay 1000 ns
VTO Analog Video Output Parameters
VTO-P Video peak signal level 2.8 V
VTO-B Video black signal level 0.7 V
VSYNC Y video sync pulse amplitude 0.7 V
Ro Video output load 75
tHHorizontal line width pclk
tHSYNC Horizontal sync wid th pclk
tHBK Horizontal blank width pclk
tVVertical field width 262.5 tH
tVSYNC Vertical sync wid th tH
tVF1 Field 1 vertical front equalization width tH
tVB1 Field 1 vertical back equalization width tH
tVBK1 Field 1 blank line outside equalization region tH
tVF2 Field 2 vertical front equalization width tH
tVB2 Field 2 vertical back equalization width tH
tVBK2 Field 2 blank line outside equalization region tH
Table 5 Electrical Characteristics (0°C to 70°C, all voltages referenced to GND)
Symbol Parameter Min Typ Max Unit
Electrical Characteristics
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Table 6 Sensor Characteristics (temp 27°C, illumination 3200°K, AEC maximum, AGC off, γ = 1)
Parameter Value Unit Description
Dark current 50 mV/sec Photo diode leakage induced signal - the
leakage roughly doubles for every 10°C
temperature rise
Sensitivity 1 V/lux.sec
Random noise TBD Measured rms value at 75% signal
illumination level versus full scale
Fix pattern noise < 0.03 % Measured rms value at 75% signal
illumination level versus full scale
Smear < 0.01 %
Blooming TBD %
Uniformity 1 % Average signal variation over 9 equal size
blocks at 50% signal illumination level
12 Proprietary to OmniVision Technologies Version 1.6, December 1, 2003
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Timing Specifications
Figure 6 Video Timing Diagram
(B) VERTICAL TIMING
(A) HORIZONTAL TIMING
tV
tVSYNC
1234525524523 261 262 263 264 265 266 267
VSYNC
HREF
CHSYNC
CHSYNC
(Composite)
(H-Sync)
HREF
CHSYNC
VTO
tHBK
tSYNC
tHREFD
tH
tHREF
Timing Specifications
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OV7910/OV7411 Light Response
Figure 7 OV7910/OV7411 Light Response
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OV7910/OV7411 CMOS NTSC/PAL CAMERACHIPOmni ision
Register Set
Table 7 pro vides a list and description of the Device Control registers contained in the OV7910 /OV7411. The device slave
addresses are 80 for write and 81 for read.
Table 7 Device Control Register List
Address
(Hex) Register
Name Default
(Hex) R/W Description
00 GAIN 00 RW
AGC Gain Setting
Bit[7]: Reserved
Bit[6:0]: Storage for current AGC gain setting
This register is updated automatically. If AGC is enabled, the internal
control stores the optimal gain value in this register. If AGC is not
enabled, a "00" is stored in this register.
01 BLUE 80 RW
Storage for the current blue channel setting for whi te balance control
Bit[7]: Adjustment dire cti o n
0: Decrease gain
1: Increase gain
Bit[6:0]: Blue channel gain balance value
02 RED 80 RW
Storage for the current red channel setting for white balance control
Bit[7]: Adjustment dire cti o n
0: Decrease gain
1: Increase gain
Bit[6:0]: Red channel gain balance value
03 SAT D0 RW Saturation Control
Bit[7:0]: Saturation adjustment
Range: [00] lowest to [FF] highest
04 CNT 00 RW Contrast Control
Bit[7:0]: Contrast adjustment
Range: [00] lowest to [FF] highest
05 BRT 80 RW Brightness Control
Bit[7:0]: Brightness adjustment
Range: [00] lowest to [FF] highest
06 RSVD XX Reserved
07 BBS 20 RW
B Channel Offset
Bit[7:6]: Reserved (BBS[7:6] = 00)
Bit[5:0]: Blue channel bias value
This value defines the fine tune adjustment for the blue tint in the white
balance control. This register is the manual control portion of the AWB
control.
08 RBS 20 RW
R Channel Offset
Bit[7:6]: Reserved (RBS[7:6] = 00)
Bit[5:0]: Red channel bias value
This value defines the fine tune adjustment for the red tint in the white
balance control. This register is the manual control portion of the AWB
control.
09-0F RSVD XX Reserved
Register Set
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10 VER 03 R Version number
11 MIDH 7F R Manufacturer ID Byte -- High (Read only = 0x7F)
12 MIDL A2 R Manufacturer ID Byte – Low (Read only = 0xA2)
13 AEC 82 RW Exposure Control Value
Bit[7:0]: Manual exposure setting
Range: [00] lowest to [82] highest
14 COMA 9F RW
Common Control A
Bit[7]: CEXP
0: Selects central exposure
Bit[6:4]: Reserved
Bit[3]: GAMMA selection
0: Select GAMMA = 1.0
1: Select GAMMA = 0.45
Bit[2]: AGC enable
1: Enable auto gain control
Bit[1]: AWB enable
1: Enable auto channel balance
Bit[0]: AEC enable - if AEC[0] = 1, AEC[7:0] (register 0x13) is
updated automatically. If AEC[0] = 0, AEC[7:0] remains
unchanged.
0: Disable
1: Enable
15 COMB 00 RW
Common Control B
Bit[7]: SRST
1: Initiates soft reset. All registers are set to default
values after which the chip resumes normal
operation.
Bit[6]: Mirror image selection
0: Normal
1: Output mirror image
Bit[5]: VSFR
0: Enables field sync output to VSYNC (pin 32)
1: Enables frame sync output to VSYNC
Bit[4]: B acklight exposure mode selection
0: OFF
1: ON
Bit[3]: FREX
0: Exposure and gain values automatically updated
1: Disable update of expo sure and gain values
Bit[2]: HGAIN, AGC gain range selection
0: AGC normal range
1: Enable AGC 2x gain boost
Bit[1:0]: AMOD - selects video output modes
00: S-Video and CVBS
01: RGB
10: YUV (for OV7410/OV741 1, bit[1:0] must be set to 10)
11: RGB
Table 7 Device Control Register List
Address
(Hex) Register
Name Default
(Hex) R/W Description
16 Proprietary to OmniVision Technologies Version 1.6, December 1, 2003
OV7910/OV7411 CMOS NTSC/PAL CAMERACHIPOmni ision
16 COMC 20 RW
Common Control C
Bit[7]: Smart AWB selection
0: Disabled SMTAWB
1: Enables SMTAWB
Bit[6]: Reserved
Bit[5]: Automatic level control (ALC)
0: Disabled
1: Enabled
Bit[4:0]: Reserved
17 COMD 34 RW
Common Control D
Bit[7:4]: Reserved
Bit[3]: BPSHP
0: Enables sharpness control
1: Disables sharpness control
Bit[2]: Reserved
Bit[1]: AWBTM
1: Selects "fast" AWB update
Bit[0]: Reserved
18-1C RSVD XX Reserved
1D COME 34 RW
Common Control E
Bit[7]: Reserved
Bit[6]: G2XA
1: Enables additional 2x gain (not controlled by AGC)
Bit[5:0]: Reserved
1E-3B RSVD XX Reserved
NOTE: All other registers are factory-reserved. Please contact OmniVision Technologies for reference register settings.
Table 7 Device Control Register List
Address
(Hex) Register
Name Default
(Hex) R/W Description
Package Specifications
Version 1.6, Dece mb er 1, 20 03 Proprietary to OmniVision Technologies 17
Omni ision
Package Specifications
The OV7910/OV7411 uses 48-pin ceramic package. Refer to Figure 8 for ceramic package information and Figure 9 for the
array center on the chip.
Figure 8 OV7910/OV7411 Package Specifications
Table 8 OV7910/OV7411 Package Dimensions
Dimensions Millimeters (mm) Inches (in.)
Package Size 14.22 + 0.30 / -0.13 SQ .560 + .012 / - .005 SQ
Package Height 2.23 + 0.28 .088 + .011
Substrate Height 0.51 + 0.05 .020 + .002
Cavity Size 8.89 + 0.13 SQ .350 + .005 SQ
Castellation Height 1.14 + 0.13 .045 + .005
Pin #1 Pad Size 0.51 x 2.16 .020 x .085
Pad Size 0.51 x 1.02 .020 x .040
Pad Pitch 1.02 + 0.08 .040 + .003
Package Edge to First Lead Center 1.524 + 0.25 / -0.13 .06 + .010 / - .005
End-to-End Pad Center-Center 11.18 + 0.13 .440 + .005
Glass Size 12.40 + 0.10 SQ / 13.00 + 0.10 SQ .488 + .004 SQ / .512 + .004 SQ
Glass Height 0.55 + 0.05 .022 + .002
.022 ± .004
.001 to .005
TYP
.030 ± .002
.065 ± .007
.088 ± .011
.020 ± .002
.015 ± .002 .06 + .010 / - .005
.085 TYP
R .0075
(48 PLCS)
R .0075
(4 CORNERS)
.040 TYP
.040 ± .003
31
1
19
30
3142
.350 SQ ± .005
.430 SQ ± .005
30
42
.032 MIN
43
43
19
18
18
48
48 1
66
7
7
31 42
30
19
.440 ± .005
43
48
1
6
7
18
.560 SQ + .012 / - .005
Pin 1
Index
.020 TYP
.488
.012 TYP
REF
± .004
18 Proprietary to OmniVision Technologies Version 1.6, December 1, 2003
OV7910/OV7411 CMOS NTSC/PAL CAMERACHIPOmni ision
Mask Specifications
Figure 9 OV7910/OV7411 Mask Drawing
Glue Side
14.224
14.224
0
9.7453.745
9.590
4.590
6.000
5.000
R 0.500
NOTE:
Due to a stray light path in the OV7910, you may encounter situations where you will see a slight red flare
and or red flashes in the image. This behavior will be present in conditions of strong scene lighting such as
outdoors and with wider than standard FOV lenses. The remedy for this behavior is to shield the die from
strong oblique light rays by applying a mask to the window of the chip. Construct the mask to the dimensions
as shown in Figure 9 above using some opaque self-adhesive material. To apply the mask on the top window,
ensure that you have the pin one notch on th e mask aligned with pin one on the bottom of the package and
that the edges of the mask are even with the edges of the top window glass. This will ensure proper
alignment of the opening in the mask with the photo array on the die. Lightly adhere the mask in place and
double check the alignment before applying firm even pressure to the adhesive to achieve a permanent bond.
Package Specifications
Version 1.6, Dece mb er 1, 20 03 Proprietary to OmniVision Technologies 19
Omni ision
Sensor Array Center
Figure 10 OV7910/OV7411 Sensor Array Center
Sensor
Array
Package Center
(0,0)
Array Center
(367µm, 22µm)
1
Die shift (x,y) = 0.15 mm (6 mils) max.
Die tilt = 1 degrees max.
Die rotation = 3 degrees max.
Positional Tolerances
NOTES: 1. This drawing is not to scale and is for reference only.
2. As most optical assemblies invert and mirror the image, the chip is typically mounted
with pin one oriented down on the PCB.
Die
Scan Origin
20 Proprietary to OmniVision Technologies Version 1.6, December 1, 2003
OV7910/OV7411 CMOS NTSC/PAL CAMERACHIPOmni ision
Note:
All information shown herein is current as of the revision and publication date. Please refer
to the OmniVision web site (http://www.ovt.com) to obtain the current versions of all
documentation.
OmniVision Technologies, Inc. reserves the right to make changes to their products or to
discontinue any product or service without further notice (It is advisable to obtain current pr oduct
documentation prior to placing orders).
Reproduction of information in OmniVision product documentation and specifications is
permissible only if reproduction is without alteration and is accompanied by all associated
warranties, conditions, limitations and notices. In such cases, OmniVision is not responsible
or liable for any information reproduced.
This document is provided with no warranties whatsoever, including any warranty of
merchantability, non-infringement, fitness for any particular purpose, or any warranty
otherwise arising out of any proposal, specification or sample. Furthermore, OmniVision
Technologies Inc. disclaims all liability, including liability for infringement of any proprietary
rights, relating to use of information in this document. No license, expressed or implied, by
estoppels or otherwise, to any intellectual property rights is granted herein.
‘OmniVision’, ‘CameraChip’ are trademarks of OmniVision Technologies, Inc. All other trade,
pr oduct or service names refer enced in this release may be trademarks or r egister ed trademarks of
their respective holders. Third-party brands, names, and trademarks are the property of their
respective owners.
For further information, please feel free to contact OmniVision at info@ovt.com.
OmniVision Technologies, Inc.
1341 Orleans Drive
Sunnyvale, CA USA
(408) 542-3000