1
Motorola Small–Signal Transistors, FETs and Diodes Device Data
NPN Silicon
MAXIMUM RATINGS
Rating Symbol MMBTA42 MMBTA43 Unit
Collector–Emitter Voltage VCEO 300 200 Vdc
Collector–Base Voltage VCBO 300 200 Vdc
Emitter–Base Voltage VEBO 6.0 6.0 Vdc
Collector Current — Continuous IC500 mAdc
DEVICE MARKING
MMBTA42LT1 = 1D; MMBTA43LT1 = M1E
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Total Device Dissipation FR–5 Board,(1)
TA = 25°C
Derate above 25°C
PD225
1.8
mW
mW/°C
Thermal Resistance, Junction to Ambient R
q
JA 556 °C/W
Total Device Dissipation
Alumina Substrate,(2) TA = 25°C
Derate above 25°C
PD300
2.4
mW
mW/°C
Thermal Resistance, Junction to Ambient R
q
JA 417 °C/W
Junction and Storage Temperature TJ, Tstg –55 to +150 °C
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic Symbol Min Max Unit
OFF CHARACTERISTICS
Collector–Emitter Breakdown Voltage(3)
(IC = 1.0 mAdc, IB = 0) MMBTA42
MMBTA43
V(BR)CEO 300
200 —
—
Vdc
Collector–Base Breakdown Voltage
(IC = 100
m
Adc, IE = 0) MMBTA42
MMBTA43
V(BR)CBO 300
200 —
—
Vdc
Emitter–Base Breakdown Voltage
(IE = 100
m
Adc, IC = 0) V(BR)EBO 6.0 — Vdc
Collector Cutoff Current
(VCB = 200 Vdc, IE = 0) MMBTA42
(VCB = 160 Vdc, IE = 0) MMBTA43
ICBO —
—0.1
0.1
µAdc
Emitter Cutoff Current
(VEB = 6.0 Vdc, IC = 0) MMBTA42
(VEB = 4.0 Vdc, IC = 0) MMBTA43
IEBO —
—0.1
0.1
µAdc
1. FR–5 = 1.0 x 0.75 x 0.062 in.
2. Alumina = 0.4 x 0.3 x 0.024 in. 99.5% alumina.
3. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%.
Thermal Clad is a trademark of the Bergquist Company
Preferred devices are Motorola recommended choices for future use and best overall value.
Order this document
by MMBTA42LT1/D
SEMICONDUCTOR TECHNICAL DATA
*Motorola Preferred Device
12
3
CASE 318–08, STYLE 6
SOT–23 (TO–236AB)
Motorola, Inc. 1996
COLLECTOR
3
1
BASE
2
EMITTER
2 Motorola Small–Signal Transistors, FETs and Diodes Device Data
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued)
Characteristic Symbol Min Max Unit
ON CHARACTERISTICS(3)
DC Current Gain
(IC = 1.0 mAdc, VCE = 10 Vdc) Both Types
(IC = 10 mAdc, VCE = 10 Vdc) Both Types
(IC = 30 mAdc, VCE = 10 Vdc) MMBTA42
MMBTA43
hFE 25
40
40
40
—
—
—
—
—
Collector–Emitter Saturation Voltage
(IC = 20 mAdc, IB = 2.0 mAdc) MMBTA42
MMBTA43
VCE(sat) —
—0.5
0.5
Vdc
Base–Emitter Saturation Voltage
(IC = 20 mAdc, IB = 2.0 mAdc) VBE(sat) — 0.9 Vdc
SMALL–SIGNAL CHARACTERISTICS
Current–Gain — Bandwidth Product
(IC = 10 mAdc, VCE = 20 Vdc, f = 100 MHz) fT50 — MHz
Collector–Base Capacitance
(VCB = 20 Vdc, IE = 0, f = 1.0 MHz) MMBTA42
MMBTA43
Ccb —
—3.0
4.0
pF
3. Pulse Test: Pulse Width
v
300
m
s, Duty Cycle
v
2.0%.
3
Motorola Small–Signal Transistors, FETs and Diodes Device Data
Figure 1. DC Current Gain
IC, COLLECTOR CURRENT (mA)
200
1.0 2.0 3.0 5.0 7.0 10 20 30 50 70
100
50
30
20
hFE, DC CURRENT GAIN
TJ = +125
°
C
25
°
C
–55
°
C
VCE = 10 Vdc
100
C, CAPACITANCE (pF)
Figure 2. Capacitances
VR, REVERSE VOLTAGE (VOLTS)
0.2
100
50
20
1.0
Ccb
10
2.0
5.0
0.5 1.0 2.0 5.0 10 20 50 100 200
Ceb
Figure 3. Current–Gain — Bandwidth Product
IC, COLLECTOR CURRENT (mA) 10070503020107.05.03.02.0
100
70
50
30
20
10
TJ = 25
°
C
VCE = 20 V
f = 20 MHz
f, CURRENT–GAIN — BANDWIDTH PRODUCT (MHz)
T
1.0
IC, COLLECTOR CURRENT (mA)
Figure 4. “On” Voltages
V, VOLTAGE (VOLTS)
1.4
0
TJ = 25
°
C
VBE(on) @ VCE = 10 V
VCE(sat) @ IC/IB = 10
VBE(sat) @ IC/IB = 10
1.2
1.0
0.8
0.6
0.4
0.2
10070503020107.05.03.02.01.0
5.0
4 Motorola Small–Signal Transistors, FETs and Diodes Device Data
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
SOT–23
mm
inches
0.037
0.95
0.037
0.95
0.079
2.0
0.035
0.9
0.031
0.8
SOT–23 POWER DISSIPATION
The power dissipation of the SOT–23 is a function of the
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined
by TJ(max), the maximum rated junction temperature of the
die, RθJA, the thermal resistance from the device junction to
ambient, and the operating temperature, TA. Using the
values provided on the data sheet for the SOT–23 package,
PD can be calculated as follows:
PD = TJ(max) – TA
RθJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature T A of 25°C, one can
calculate the power dissipation of the device which in this
case is 225 milliwatts.
PD = 150°C – 25°C
556°C/W = 225 milliwatts
The 556°C/W for the SOT–23 package assumes the use
of the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 225 milliwatts. There
are other alternatives to achieving higher power dissipation
from the SOT–23 package. Another alternative would be to
use a ceramic substrate or an aluminum core board such as
Thermal Clad. Using a board material such as Thermal
Clad, an aluminum core board, the power dissipation can be
doubled using the same footprint.
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
•Always preheat the device.
•The delta temperature between the preheat and
soldering should be 100°C or less.*
•When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference shall be a maximum of 10°C.
•The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
•When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
•After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.
•Mechanical stress or shock should not be applied during
cooling.
* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.
5
Motorola Small–Signal Transistors, FETs and Diodes Device Data
PACKAGE DIMENSIONS
CASE 318–08
ISSUE AE
SOT–23 (TO–236AB)
DJ
K
L
A
C
BS
H
GV
3
12DIM
AMIN MAX MIN MAX
MILLIMETERS
0.1102 0.1197 2.80 3.04
INCHES
B0.0472 0.0551 1.20 1.40
C0.0350 0.0440 0.89 1.11
D0.0150 0.0200 0.37 0.50
G0.0701 0.0807 1.78 2.04
H0.0005 0.0040 0.013 0.100
J0.0034 0.0070 0.085 0.177
K0.0140 0.0285 0.35 0.69
L0.0350 0.0401 0.89 1.02
S0.0830 0.1039 2.10 2.64
V0.0177 0.0236 0.45 0.60
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIUMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
STYLE 6:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
6 Motorola Small–Signal Transistors, FETs and Diodes Device Data
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability , including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
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MMBTA42LT1/D
*MMBTA42LT1/D*
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