1
FEATURES
AM26LS32AC...D,N,NS,ORPWPACKAGE
AM26LS32AI, AM26LS33AC...D,ORNPACKAGE
AM26LS32AM, AM26LS33AM...JPACKAGE
(TOP VIEW)
DESCRIPTION
AM26LS32AC , , AM26LS32AI , , AM26LS33ACAM26LS32AM , AM26LS33AMQUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115E – OCTOBER 1980 – REVISED OCTOBER 2007www.ti.com
2
•AM26LS32A Devices Meet or Exceed theRequirements of ANSI TIA/EIA-422-B,TIA/EIA-423-B, and ITU Recommendations V.10and V.11•AM26LS32A Devices Have ± 7-VCommon-Mode Range With ± 200-mVSensitivity
•AM26LS33A Devices Have ± 15-VCommon-Mode Range With ± 500-mVSensitivity
•Input Hysteresis . . . 50 mV Typical•Operate From a Single 5-V Supply•Low-Power Schottky Circuitry•3-State Outputs•Complementary Output-Enable Inputs•Input Impedance . . . 12 k ΩMinimum•Designed to Be Interchangeable WithAdvanced Micro Devices AM26LS32™ andAM26LS33™
The AM26LS32A and AM26LS33A devices are quadruple differential line receivers for balanced and unbalanceddigital data transmission. The enable function is common to all four receivers and offers a choice of active-highor active-low input. The 3-state outputs permit connection directly to a bus-organized system. Fail-safe designensures that, if the inputs are open, the outputs always are high.
Compared to the AM26LS32 and the AM26LS33, the AM26LS32A and AM26LS33A incorporate an additionalstage of amplification to improve sensitivity. The input impedance has been increased, resulting in less loading ofthe bus line. The additional stage has increased propagation delay; however, this does not affectinterchangeability in most applications.
The AM26LS32AC and AM26LS33AC are characterized for operation from 0 °C to 70 °C. The AM26LS32AI ischaracterized for operation from – 40 °C to 85 °C. The AM26LS32AM and AM26LS33AM are characterized foroperation over the full military temperature range of – 55 °C to 125 °C.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2AM26LS32, AM26LS33 are trademarks of Advanced Micro Devices, Inc..
PRODUCTION DATA information is current as of publication date.
Copyright © 1980 – 2007, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
www.ti.com
4
12
2
1
3
6
7
5
10
9
11
14
15
13
G
G
1A
1B
2A
2B
3A
3B
4A
4B
1Y
2Y
3Y
4Y
AM26LS32AC , , AM26LS32AI , , AM26LS33ACAM26LS32AM , AM26LS33AMQUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115E – OCTOBER 1980 – REVISED OCTOBER 2007
FUNCTION TABLEEach Receiver
ENABLESDIFFERENTIAL OUTPUTA – B YG G
H X HV
ID
≥V
IT+
X L HH X ?V
IT –
≤V
ID
≤V
IT+
X L ?H X LV
ID
≤V
IT –
X L LX L H ZH X HOpen
X L H
LOGIC DIAGRAM (POSITIVE LOGIC)
Pin numbers are for D, N, NS, or PW packages only.
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Product Folder Link(s): AM26LS32AC AM26LS32AI AM26LS33AC AM26LS32AM AM26LS33AM
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100kΩ
100kΩ
8.3kΩ 85 Ω
20kΩ 960 Ω
960 Ω
ABSOLUTE MAXIMUM RATINGS
(1)
AM26LS32AC , , AM26LS32AI , , AM26LS33ACAM26LS32AM , AM26LS33AMQUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115E – OCTOBER 1980 – REVISED OCTOBER 2007
SCHEMATICS OF INPUTS AND OUTPUTS
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V
CC
Supply voltage
(2)
7 VAny differential input ± 25V
I
Input voltage VOther inputs 7V
ID
Differential input voltage
(3)
± 25 VContinuous total power dissipation See Dissipation Ratings TableD package 73N package 67θ
JA
Package thermal impedance
(4)
°C/WNS package 64PW package 108T
C
Case temperature for 60 seconds FK package 260 °CLead temperature 1.6 mm (1/16 inch) from case for 10
D or N package 260 °Cseconds
Lead temperature 1.6 mm (1/16 inch) from case for 60
J package 300 °CsecondsT
stg
Storage temperature range – 65 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operatingconditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) All voltage values, except differential voltages, are with respect to the network ground terminal.(3) Differential voltage values are at the noninverting (A) input terminals with respect to the inverting (B) input terminals.(4) The package thermal impedance is calculated in accordance with JESD 51-7.
Copyright © 1980 – 2007, Texas Instruments Incorporated Submit Documentation Feedback 3
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DISSIPATION RATINGS
RECOMMENDED OPERATING CONDITIONS
ELECTRICAL CHARACTERISTICS
AM26LS32AC , , AM26LS32AI , , AM26LS33ACAM26LS32AM , AM26LS33AMQUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115E – OCTOBER 1980 – REVISED OCTOBER 2007
DERATIONT
A
≤25 °C T
A
= 70 °C T
A
= 125 °CPACKAGE FACTORPOWER RATING POWER RATING POWER RATINGABOVE T
A
= 25 °C
FK 1375 mW 11.0 mW/ °C 880 mW 275 mWJ 1375 mW 11.0 mW/ °C 880 mW 275 mW
MIN NOM MAX UNIT
AM26LS32AC, AM26LS32AI,
4.75 5 5.25AM26LS33ACV
CC
Supply voltage VAM26LS32AM, AM26LS33AM 4.5 5 5.5V
IH
High-level input voltage 2 VV
IL
Low-level input voltage 0.8 VAM26LS32A ± 7V
IC
Common-mode input voltage VAM26LS33A ± 15I
OH
High-level output current – 440 μAI
OL
Low-level output current 8 mAAM26LS32AC, AM26LS33AC 0 70T
A
Operating free-air temperature AM26LS32AI – 40 85 °CAM26LS32AM, AM26LS33AM – 55 125
over recommended ranges of V
CC
, V
IC
, and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
AM26LS32A 0.2Positive-going
V
IT+
V
O
= V
OH
min, I
OH
= – 440 μA Vinput threshold voltage
AM26LS33A 0.5AM26LS32A – 0.2
(2)Negative-going
V
IT –
V
O
= 0.45 V , I
OL
= 8 mA Vinput threshold voltage
AM26LS33A – 0.5
(2)
Hysteresis voltageV
hys
50 mV(V
IT+
– V
IT –
)V
IK
Enable-input clamp voltage V
CC
= MIN, I
I
= – 18 mA – 1.5 VAM26LS32AC,
2.7AM26LS33ACV
CC
= MIN, V
ID
= 1 V,V
OH
High-level output voltage VAM26LS32AM,V
I(G)
= 0.8 V, I
OH
= – 440 μA
AM26LS32AI, 2.5AM26LS33AM
I
OL
= 4 mA 0.4V
CC
= MIN, V
ID
= – 1 V,V
OL
Low-level output voltage VV
I(G)
= 0.8 V
I
OL
= 8 mA 0.45Off-state V
O
= 2.4 V 20I
OZ
(high-impedance state) V
CC
= MAX μAV
O
= 0.4 V – 20output current
Other input at – 10 V toV
I
= 15 V, 1.215 VI
I
Line input current mAOther input at – 15 V toV
I
= – 15 V, – 1.710 VI
I(EN)
Enable input current V
I
= 5.5 V 100 μAI
H
High-level enable current V
I
= 2.7 V 20 μA
(1) All typical values are at V
CC
= 5 V, T
A
= 25 °C, and V
IC
= 0.(2) The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet forthreshold levels only.
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Product Folder Link(s): AM26LS32AC AM26LS32AI AM26LS33AC AM26LS32AM AM26LS33AM
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SWITCHING CHARACTERISTICS
AM26LS32AC , , AM26LS32AI , , AM26LS33ACAM26LS32AM , AM26LS33AMQUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115E – OCTOBER 1980 – REVISED OCTOBER 2007
ELECTRICAL CHARACTERISTICS (continued)over recommended ranges of V
CC
, V
IC
, and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
I
L
Low-level enable current V
I
= 0.4 V – 0.36 mAr
i
Input resistance V
IC
= – 15 V to 15 V, One input to ac ground 12 15 k Ω
Short-circuit outputI
OS
V
CC
= MAX – 15 – 85 mAcurrent
(3)
I
CC
Supply current V
CC
= MAX, All outputs disabled 52 70 mA
(3) Not more than one output should be shorted to ground at a time, and duration of the short circuit should not exceed one second.
V
CC
= 5 V, T
A
= 25 °C
PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
Propagation delay time, low-to-high-levelt
PLH
20 35output
C
L
= 15 pF, See Figure 1 nsPropagation delay time, high-to-low-levelt
PHL
22 35outputt
PZH
Output enable time to high level 17 22C
L
= 15 pF, See Figure 1 nst
PZL
Output enable time to low level 20 25t
PHZ
Output disable time from high level 21 30C
L
= 15 pF, See Figure 1 nst
PLZ
Output disable time from low level 30 40
(1) All typical values are at V
CC
= 5 V, T
A
= 25 °C, and V
IC
= 0.
Copyright © 1980 – 2007, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): AM26LS32AC AM26LS32AI AM26LS33AC AM26LS32AM AM26LS33AM
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PARAMETER MEASUREMENT INFORMATION
S1Open
S2Closed
5kΩ
S1
RL=2kΩ
VCC
FromOutput
UnderTest
CL
(seeNote A) SeeNoteB
S2
tPHL
VOH
VOL
2.5V
–2.5V
tPLH
S1andS2Closed
VOLTAGEWAVEFORMSFORtPLH,tPHL
TESTCIRCUIT
10%
90%
10%
90%
0
3V
10%
10%
90% 90%
1.3V1.3V
1.3V 1.3V
3V
0
≤5ns
10%
90%
10%
90%
0
3V
10%
10%
90% 90%
1.3V1.3V
1.3V 1.3V
3V
0
EnableG
EnableG
tPZH
1.3V
Output
VOH
0.5V
≈1.4V
tPHZ S1Closed
S2Closed
tPZL
1.3V
S1Closed
S2Open
S1Closed
S2Closed
VOL
0.5V
tPLZ
VOLTAGEWAVEFORMSFORtPHZ,tPZH VOLTAGEWAVEFORMSFORtPLZ,tPZL
Test
Point
Output
SeeNoteCSeeNoteC
Input
Output
EnableG
EnableG
≤5ns ≤5ns ≤5ns
≈1.4V
NOTES: A.CLincludesprobeandjigcapacitance.
B. Alldiodesare1N3064orequivalent.
C.EnableGistestedwith G high; istestedwithGlow.G
00
1.3V 1.3V
AM26LS32AC , , AM26LS32AI , , AM26LS33ACAM26LS32AM , AM26LS33AMQUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115E – OCTOBER 1980 – REVISED OCTOBER 2007
Figure 1. Test Circuit and Voltage Waveforms
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Product Folder Link(s): AM26LS32AC AM26LS32AI AM26LS33AC AM26LS32AM AM26LS33AM
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TYPICAL CHARACTERISTICS
Free-AirTemperature,T (
A°C)
High-LevelOutputVoltage,V (
OH V)
I = 440 A
OH –μ
High-LevelOutputCurrent,I (mA)
OH
High-LevelOutputVoltage,V (V)
OH
Low-LevelOutputCurrent,I (mA)
OL
Low-LevelOutputVoltage,V (V)
OL
AM26LS32AC , , AM26LS32AI , , AM26LS33ACAM26LS32AM , AM26LS33AMQUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115E – OCTOBER 1980 – REVISED OCTOBER 2007
HIGH-LEVEL OUTPUT VOLTAGE HIGH-LEVEL OUTPUT VOLTAGEvs vsHIGH-LEVEL OUTPUT CURRENT FREE-AIR TEMPERATURE
Figure 2. Figure 3.
LOW-LEVEL OUTPUT VOLTAGE LOW-LEVEL OUTPUT VOLTAGEvs vsLOW-LEVEL OUTPUT CURRENT FREE-AIR TEMPERATURE
Figure 4. Figure 5.
Copyright © 1980 – 2007, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): AM26LS32AC AM26LS32AI AM26LS33AC AM26LS32AM AM26LS33AM
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Load=8k toGNDΩ
EnableGVoltage(V)
OutputVoltage,V (V)
O
OutputVoltage,V (V)
O
EnableGVoltage(V)
Load=8k toGNDΩ
OutputVoltage,V (V)
O
EnableGVoltage(V)
Load=1k toΩ VCC
Load=1k toΩ VCC
OutputVoltage,V (V)
O
EnableGVoltage(V)
AM26LS32AC , , AM26LS32AI , , AM26LS33ACAM26LS32AM , AM26LS33AMQUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115E – OCTOBER 1980 – REVISED OCTOBER 2007
TYPICAL CHARACTERISTICS (continued)
OUTPUT VOLTAGE OUTPUT VOLTAGEvs vsENABLE G VOLTAGE ENABLE G VOLTAGE
Figure 6. Figure 7.
OUTPUT VOLTAGE OUTPUT VOLTAGEvs vsENABLE G VOLTAGE ENABLE G VOLTAGE
Figure 8. Figure 9.
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DifferentialInputVoltage,V (mV)
ID
OutputVoltage,V (V)
O
OutputVoltage,V (V)
O
DifferentialInputVoltage,V (mV)
ID
InputVoltage,V (V)
I
InputCurrent,I (mA)
I
AM26LS32AC , , AM26LS32AI , , AM26LS33ACAM26LS32AM , AM26LS33AMQUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115E – OCTOBER 1980 – REVISED OCTOBER 2007
TYPICAL CHARACTERISTICS (continued)
AM26LS32A AM26LS33AOUTPUT VOLTAGE OUTPUT VOLTAGEvs vsDIFFERENTIAL INPUT VOLTAGE DIFFERENTIAL INPUT VOLTAGE
Figure 10. Figure 11.
INPUT CURRENT
vsINPUT VOLTAGE
The unshaded area shows requirements ofparagraph 4.2.1 of ANSI StandardsEIA/TIA-422-B and EIA/TIA-423-B.
Figure 12.
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APPLICATION INFORMATION
AM26LS32AC , , AM26LS32AI , , AM26LS33ACAM26LS32AM , AM26LS33AMQUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115E – OCTOBER 1980 – REVISED OCTOBER 2007
Figure 13. Circuit with Multiple Receivers
10 Submit Documentation Feedback Copyright © 1980 – 2007, Texas Instruments Incorporated
Product Folder Link(s): AM26LS32AC AM26LS32AI AM26LS33AC AM26LS32AM AM26LS33AM
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
5962-7802003M2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
5962-7802003MEA ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type
5962-7802003MFA ACTIVE CFP W 16 1 TBD A42 N / A for Pkg Type
5962-7802004M2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
5962-7802004MEA ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type
5962-7802004MFA ACTIVE CFP W 16 1 TBD A42 N / A for Pkg Type
AM26LS32ACD ACTIVE SOIC D 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
AM26LS32ACDE4 ACTIVE SOIC D 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
AM26LS32ACDG4 ACTIVE SOIC D 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
AM26LS32ACDR ACTIVE SOIC D 16 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
AM26LS32ACDRE4 ACTIVE SOIC D 16 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
AM26LS32ACDRG4 ACTIVE SOIC D 16 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
AM26LS32ACN ACTIVE PDIP N 16 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
AM26LS32ACNE4 ACTIVE PDIP N 16 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
AM26LS32ACNSR ACTIVE SO NS 16 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
AM26LS32ACNSRG4 ACTIVE SO NS 16 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
AM26LS32ACPW ACTIVE TSSOP PW 16 90 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
AM26LS32ACPWE4 ACTIVE TSSOP PW 16 90 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
AM26LS32ACPWG4 ACTIVE TSSOP PW 16 90 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
AM26LS32ACPWR ACTIVE TSSOP PW 16 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
AM26LS32ACPWRE4 ACTIVE TSSOP PW 16 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
AM26LS32ACPWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
AM26LS32AID ACTIVE SOIC D 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
AM26LS32AIDE4 ACTIVE SOIC D 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
AM26LS32AIDG4 ACTIVE SOIC D 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
AM26LS32AIDR ACTIVE SOIC D 16 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
AM26LS32AIDRE4 ACTIVE SOIC D 16 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
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Addendum-Page 1
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
AM26LS32AIDRG4 ACTIVE SOIC D 16 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
AM26LS32AIN ACTIVE PDIP N 16 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
AM26LS32AINE4 ACTIVE PDIP N 16 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
AM26LS32AMFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
AM26LS32AMJ ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type
AM26LS32AMJB ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type
AM26LS32AMWB ACTIVE CFP W 16 1 TBD A42 N / A for Pkg Type
AM26LS33ACD ACTIVE SOIC D 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
AM26LS33ACDE4 ACTIVE SOIC D 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
AM26LS33ACDG4 ACTIVE SOIC D 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
AM26LS33ACDR ACTIVE SOIC D 16 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
AM26LS33ACDRE4 ACTIVE SOIC D 16 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
AM26LS33ACDRG4 ACTIVE SOIC D 16 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
AM26LS33ACN ACTIVE PDIP N 16 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
AM26LS33ACNE4 ACTIVE PDIP N 16 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
AM26LS33AMFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
AM26LS33AMJ ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type
AM26LS33AMJB ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type
AM26LS33AMWB ACTIVE CFP W 16 1 TBD A42 N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
PACKAGE OPTION ADDENDUM
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Addendum-Page 2
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF AM26LS32A, AM26LS32AM, AM26LS33A, AM26LS33AM :
•Enhanced Product: AM26LS32AM-EP
NOTE: Qualified Version Definitions:
•Enhanced Product - Supports Defense, Aerospace and Medical Applications
PACKAGE OPTION ADDENDUM
www.ti.com 8-Jan-2010
Addendum-Page 3
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm) W
(mm) Pin1
Quadrant
AM26LS32ACDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
AM26LS32ACDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
AM26LS32ACNSR SO NS 16 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1
AM26LS32ACPWR TSSOP PW 16 2000 330.0 12.4 7.0 5.6 1.6 8.0 12.0 Q1
AM26LS32AIDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
AM26LS33ACDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 19-Mar-2008
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
AM26LS32ACDR SOIC D 16 2500 333.2 345.9 28.6
AM26LS32ACDR SOIC D 16 2500 346.0 346.0 33.0
AM26LS32ACNSR SO NS 16 2000 346.0 346.0 33.0
AM26LS32ACPWR TSSOP PW 16 2000 346.0 346.0 29.0
AM26LS32AIDR SOIC D 16 2500 333.2 345.9 28.6
AM26LS33ACDR SOIC D 16 2500 333.2 345.9 28.6
PACKAGE MATERIALS INFORMATION
www.ti.com 19-Mar-2008
Pack Materials-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER
4040140/D 10/96
28 TERMINAL SHOWN
B
0.358
(9,09)
MAX
(11,63)
0.560
(14,22)
0.560
0.458
0.858
(21,8)
1.063
(27,0)
(14,22)
A
NO. OF
MINMAX
0.358
0.660
0.761
0.458
0.342
(8,69)
MIN
(11,23)
(16,26)
0.640
0.739
0.442
(9,09)
(11,63)
(16,76)
0.962
1.165
(23,83)
0.938
(28,99)
1.141
(24,43)
(29,59)
(19,32)(18,78)
**
20
28
52
44
68
84
0.020 (0,51)
TERMINALS
0.080 (2,03)
0.064 (1,63)
(7,80)
0.307
(10,31)
0.406
(12,58)
0.495
(12,58)
0.495
(21,6)
0.850
(26,6)
1.047
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.035 (0,89)
0.010 (0,25)
12
1314151618 17
11
10
8
9
7
5
432
0.020 (0,51)
0.010 (0,25)
6
12826 27
19
21
B SQ
A SQ 22
23
24
25
20
0.055 (1,40)
0.045 (1,14)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,65 M
0,10
0,10
0,25
0,50
0,75
0,15 NOM
Gage Plane
28
9,80
9,60
24
7,90
7,70
2016
6,60
6,40
4040064/F 01/97
0,30
6,60
6,20
80,19
4,30
4,50
7
0,15
14
A
1
1,20 MAX
14
5,10
4,90
8
3,10
2,90
A MAX
A MIN
DIM PINS **
0,05
4,90
5,10
Seating Plane
0°–8°
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
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