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QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 481
1.5A, 200KHZ STEP-DOWN CONVERTER WITH BURST MODE
3
output. The feedback resistors (R2, R3) can be
changed to adjust the output voltage according to
the following equation:
V
OUT
= 1.24
×
(1 + R2/R3)
For output voltages below 3V, the boost pin re-
quires a higher voltage than the output can supply.
An alternate source for boost such as the input
voltage, a bias supply, or an external supply is re-
quired on the boost pin. Please see the datasheet
for details.
For output voltages greater than 5V, the optional
‘blocking’ zener diode D3 can be used to reduce
the boost voltage across C4 to some lower voltage
between 3V and 5V. The diode transfers power
dissipation from inside the LT1976 to the diode on
the demonstration circuit, outside the LT1976, al-
lowing higher ambient temperature operation of
the part. Maintaining boost voltage between 3V
and 5V maximizes efficiency and optimizes control
of the power switch. It is recommended that a
CMHZ5236B zener diode is used in D3 when
V
OUT
= 12V. To properly install D3, the small trace
shorting the anode to the cathode of D3 on the
board must be opened (an Exacto knife works
well) before D3 is soldered to the board. In the
‘Thermal Calculations’ section of the datasheet,
the new value for boost voltage (V
OUT
–V
Z
) should
be accounted for when calculating junction tem-
perature.
P
BOOST
= (V
OUT
-V
Z
)*V
OUT
*(I
OUT
/36)/V
IN
POWER GOOD FEEDBACK OPTION
For systems that rely upon having a well-regulated
power source or follow a particular power-up se-
quence, the LT1976 provides a power good flag
with timed delay programmed by C8 when the
power good feedback pin (PGFB) exceeds 90% of
V
REF
(1.25V). R10 (0 ohm short) ties PGFB and
the feedback pin (FB) together. Therefore, the
power good (PG) pin returns a ‘good’ signal when
the output voltage has reached 90% of its final
value. Figure 11 and Figure 12 show the power
good logic output turning on after a programmed
delay during startup.
The power good feedback pin can also be tied to
the input voltage, an external source, or a resistor
divider on any of these sources. Removing R10
breaks the connection between PGFB and FB.
The Power Good Feedback (PGFB Option) termi-
nal is optional and is not stuffed on the board. The
power good terminal node can be connected to
the power good feedback (PGFB) pin by placing a
0
Ω
resistor in R11. The PGFB Option should be
used when Power Good Feedback is required
from a source other than the feedback pin. Be
sure to remove the connection between PGFB
and FB by removing R10 as mentioned above.
Connect the desired Power Good Feedback
source to the PGFB Option terminal and either
short the terminal to PGFB pin with a 0
Ω
resistor
in R11 or place a resistor divider from PGFB to
GND with R11 and R12.
SHUTDOWN AND UNDERVOLTAGE LOCKOUT
The SHDN pin has a 200k pull-up resistor (R9)
tied to V
IN
. For normal operation, the SHDN
terminal can be left floating. However, connecting
the SHDN terminal to GND will place the IC in mi-
cropower shutdown. If the shutdown function is
not being used, the pull-up resistor can be re-
placed with a 0
Ω
resistor.
For undervoltage lockout, the two-resistor divider
network must be placed between V
IN
and SHDN
and between SHDN and GND. The top resistor
can be placed in R9. The bottom resistor can be
placed to the right of the SHDN terminal (the sol-
der mask may have to be removed.
Please see the data sheet section ‘Shutdown
Function and Undervoltage Lockout’ for more de-
tails.
SOFT START
Soft start removes the inrush current surge and
limits output voltage overshoot by controlling the
output voltage ramp-up rate. A single capacitor,
C7, holds the peak current level clamp low, allow-
ing it to slowly rise upon startup. When a short cir-
cuit, overload, or shutdown condition occurs, the