JFET Input
Operational Amplifiers
These low cost JFET input operational amplifiers combine two
state–of–the–art analog technologies on a single monolithic integrated
circuit. Each internally compensated operational amplifier has well matched
high voltage JFET input devices for low input offset voltage. The JFET
technology provides wide bandwidths and fast slew rates with low input bias
currents, input offset currents, and supply currents.
These devices are available in single, dual and quad operational
amplifiers which are pin–compatible with the industry standard MC1741,
MC1458, and the MC3403/LM324 bipolar devices.
•Input Offset Voltage of 5.0 mV Max (LF347B)
•Low Input Bias Current: 50 pA
•Low Input Noise Voltage: 16 nV/ Hz
•Wide Gain Bandwidth: 4.0 MHz
•High Slew Rate: 13V/µs
•Low Supply Current: 1.8 mA per Amplifier
•High Input Impedance: 1012 Ω
•High Common Mode and Supply Voltage Rejection Ratios: 100 dB
MAXIMUM RATINGS
Rating Symbol Value Unit
Supply Voltage VCC +18 V
VEE –18
Differential Input Voltage VID ±30 V
Input Voltage Range (Note 1) VIDR ±15 V
Output Short Circuit Duration (Note 2) tSC Continuous
Power Dissipation at TA = +25°C PD900 mW
Derate above TA =+25°C 1/θJA 10 mW/°C
Operating Ambient Temperature Range TA0 to +70 °C
Operating Junction Temperature Range TJ115 °C
Storage Temperature Range Tstg – 65 to
+150 °C
NOTES: 1.Unless otherwise specified, the absolute maximum negative input voltage is
limited to the negative power supply.
2.Any amplifier output can be shorted to ground indefinitely. However, if more than
one amplifier output is shorted simultaneously, maximum junction temperature
rating may be exceeded.
ON Semiconductor
Semiconductor Components Industries, LLC, 2002
March, 2002 – Rev. 1 1Publication Order Number:
LF347/D
LF347, B
LF351
LF353
FAMILY OF JFET
OPERATIONAL AMPLIFIERS
D SUFFIX
PLASTIC PACKAGE
CASE 751
(SO–8)
N SUFFIX
PLASTIC PACKAGE
CASE 626
1
1
8
8
Output A
Inputs A
VEE
VCC
Output B
Inputs B
LF351
(Top View)
LF353
(Top View)
Offset Null
Invt Input
Noninvt Input
VEE
NC
VCC
Output
Offset Null
1
2
3
4
8
7
6
5
+
-
-
-
+
+
A
B
1
2
3
4
8
7
6
5
PIN CONNECTIONS
N SUFFIX
PLASTIC PACKAGE
CASE 646
14
1
(Top View)
Out 1
Inputs 1
VCC
Inputs 2
Out 2
Out 4
Inputs 4
VEE
Inputs 3
Out 3
1
2
3
4
5
6
78
9
10
11
12
13
14
4
23
++
++
1
--
--
PIN CONNECTIONS
ORDERING INFORMATION
FunctionDevice Package
Operating
Temperature Range
LF351D
LF351N Single
Single
TA = 0° to +70°C
SO–8
Plastic DIP
LF353D
LF353N Dual
Dual SO–8
Plastic DIP
LF347BN
LF347N Quad
Quad Plastic DIP
Plastic DIP
LF347, B LF351 LF353
http://onsemi.com
2
ELECTRICAL CHARACTERISTICS (VCC = +15 VEE = –15 V, TA = 25°C, unless otherwise noted.)
LF347B LF347, LF351, LF353
Characteristic Symbol Min Typ Max Min Typ Max Unit
Input Offset Voltage (RS ≤ 10 k, VCM = 0) VIO mV
TA = +25°C – 1.0 5.0 – 5.0 10
0°C ≤ TA ≤ +70°C – – 8.0 – – 13
Avg. Temperature Coefficient of Input Offset Voltage ∆VIO/∆TµV/°C
RS ≤ 10 k, 0°C ≤ TA ≤ +70°C – 10 – – 10 –
Input Offset Current (VCM = 0, Note 3) IIO
TA = +25°C – 25 100 – 25 100 pA
0°C ≤ TA ≤ +70°C – – 4.0 – – 4.0 nA
Input Bias Current (VCM = 0, Note 3) IIB
TA = +25°C – 50 200 – 50 200 pA
0°C ≤ TA ≤ +70°C – – 8.0 – – 8.0 nA
Input Resistance ri– 1012 – – 1012 –Ω
Common Mode Input Voltage Range VICR ±11 +15 – ±11 +15 – V
–12 –12
Large–Signal Voltage Gain (VO = ±10 V, RL = 2.0 k) AVOL V/mV
TA = +25°C 50 100 – 25 100 –
0°C ≤ TA ≤ +70°C 25 – – 15 – –
Output Voltage Swing (RL = 10 k) VO±12 ±14 – ±12 ±14 – V
Common Mode Rejection (RS ≤ 10 k) CMR 80 100 – 70 100 – dB
Supply Voltage Rejection (RS ≤ 10 k) PSRR 80 100 – 70 100 – dB
Supply Current IDmA
LF347 – 7.2 11 – 7.2 11
LF351 – – – – 1.8 3.4
LF353 – – – – 3.6 6.5
Short Circuit Current ISC – 25 – – 25 – mA
Slew Rate (AV = +1) SR – 13 – – 13 – V/µs
Gain–Bandwidth Product BWp – 4.0 – – 4.0 – MHz
Equivalent Input Noise Voltage en– 24 – – 24 – nV/ Hz√
(RS = 100 Ω, f = 1000 Hz)
Equivalent Input Noise Current (f = 1000 Hz) in– 0.01 – – 0.01 – pA/ Hz√
Channel Separation (LF347, LF353) – – –120 – – –120 – dB
1.0 Hz ≤ f ≤ 20 kHz (Input Referred)
For Typical Characteristic Performance Curves, refer to MC34001, 34002, 34004 data sheet.
NOTE: 3.Input bias currents of JFET input op amps approximately double for every 10°C rise in junction temperature. To maintain junction temperatures as
close to ambient as is possible, pulse techniques are utilized during test.
LF347, B LF351 LF353
http://onsemi.com
3
OUTLINE DIMENSIONS
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
14
58
F
NOTE 2 –A–
–B–
–T–
SEATING
PLANE
H
J
GDK
N
C
L
M
M
A
M
0.13 (0.005) B M
T
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A9.40 10.16 0.370 0.400
B6.10 6.60 0.240 0.260
C3.94 4.45 0.155 0.175
D0.38 0.51 0.015 0.020
F1.02 1.78 0.040 0.070
G2.54 BSC 0.100 BSC
H0.76 1.27 0.030 0.050
J0.20 0.30 0.008 0.012
K2.92 3.43 0.115 0.135
L7.62 BSC 0.300 BSC
M--- 10 --- 10
N0.76 1.01 0.030 0.040
D SUFFIX
PLASTIC PACKAGE
CASE 751–05
(SO–8)
ISSUE R
N SUFFIX
PLASTIC PACKAGE
CASE 626–05
ISSUE K
SEATING
PLANE
1
4
58
A0.25 MCB SS
0.25 MBM
h
C
X 45
L
DIM MIN MAX
MILLIMETERS
A1.35 1.75
A1 0.10 0.25
B0.35 0.49
C0.18 0.25
D4.80 5.00
E
1.27 BSCe
3.80 4.00
H5.80 6.20
h
0 7
L0.40 1.25
0.25 0.50
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. DIMENSIONS ARE IN MILLIMETERS.
3. DIMENSION D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE MOLD
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS
OF THE B DIMENSION AT MAXIMUM MATERIAL
CONDITION.
D
EH
A
Be
B
A1
CA
0.10
LF347, B LF351 LF353
http://onsemi.com
4
OUTLINE DIMENSIONS
NOTES:
1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
4. ROUNDED CORNERS OPTIONAL.
17
14 8
B
A
F
HG D K
C
N
L
J
M
SEATING
PLANE
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.715 0.770 18.16 19.56
B0.240 0.260 6.10 6.60
C0.145 0.185 3.69 4.69
D0.015 0.021 0.38 0.53
F0.040 0.070 1.02 1.78
G0.100 BSC 2.54 BSC
H0.052 0.095 1.32 2.41
J0.008 0.015 0.20 0.38
K0.115 0.135 2.92 3.43
L0.300 BSC 7.62 BSC
M0 10 0 10
N0.015 0.039 0.39 1.01
N SUFFIX
PLASTIC PACKAGE
CASE 646–06
ISSUE L
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to make changes without further notice to any products herein. SCILLC makes no warranty , representation or guarantee regarding the suitability of its products
for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any
and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must
be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
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4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031
Phone: 81–3–5740–2700
Email: r14525@onsemi.com
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For additional information, please contact your local
Sales Representative.
LF347/D
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