1. Product profile
1.1 General description
A 120 W LDMOS power transistor for broadcast and industrial applications in the HF to
1000 MHz band.
1.2 Features and benefits
Easy power control
Integrated dual sided ESD protection enables class C operation and complete switch
off of the transistor
Excellent ruggedness
High efficiency
Excellent thermal stability
Designed for broadband operation (HF to 1000 MHz)
Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS)
1.3 Applications
Industrial, scientific and medical applications
Broadcast transmitter applications
BLP10H6120P; BLP10H6120PG
Power LDMOS transistor
Rev. 1 — 20 December 2016 Product data sheet
Table 1. Application information
Test signal f VDS PLGpD
(MHz) (V) (W) (dB) (%)
pulsed RF 720 50 120 18 72
pulsed RF 915 50 160 14.9 70.2
CW 915 50 143 15.1 62.3
BLP10H6120P_BLP10H6120PG All information provided in this document is subject to legal disclaimers. © Ampleon Netherlands B.V. 2016. All rights reserved.
Product data sheet Rev. 1 — 20 December 2016 2 of 15
BLP10H6120P; BLP10H6120PG
Power LDMOS transistor
2. Pinning information
[1] Connected to flange.
3. Ordering information
4. Limiting values
[1] Continuous use at maximum temperature will affect the reliability, for details refer to the online MTF
calculator.
Table 2. Pinning
Pin Description Simplified outline Graphic symbol
BLP10H6120P (SOT1223-2)
1gate 2
2gate 1
3drain 1
4drain 2
5source [1]
BLP10H6120PG (SOT1224-2)
1gate 2
2gate 1
3drain 1
4drain 2
5source [1]
12
43
pin 1 index
2
1
5
4
3
aaa-003574
12
43
pin 1 index
2
1
5
4
3
aaa-003574
Table 3. Ordering information
Type number Package
Name Description Version
BLP10H6120P HSOP4F plastic, heatsink small outline package; 4 leads (flat) SOT1223-2
BLP10H6120PG HSOP4 plastic, heatsink small outline package; 4 leads SOT1224-2
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDS drain-source voltage - 110 V
VGS gate-source voltage 6+11V
Tstg storage temperature 65 +150 C
Tjjunction temperature [1] - 225 C
BLP10H6120P_BLP10H6120PG All information provided in this document is subject to legal disclaimers. © Ampleon Netherlands B.V. 2016. All rights reserved.
Product data sheet Rev. 1 — 20 December 2016 3 of 15
BLP10H6120P; BLP10H6120PG
Power LDMOS transistor
5. Thermal characteristics
[1] Tj is the junction temperature.
[2] Rth(j-c) is measured under RF conditions.
[3] See Figure 1.
6. Characteristics
Table 5. Thermal characteristics
Symbol Parameter Conditions Typ Unit
Rth(j-c) thermal resistance from junction to case Tj = 125 C[1][2] 0.6 K/W
Zth(j-c) transient thermal impedance from junction
to case
Tj=150C; tp=100s;
=20%
[3] 0.21 K/W
(1) = 1 %
(2) = 2 %
(3) = 5 %
(4) = 10 %
(5) = 20 %
(6) = 50 %
(7) = 100 % (DC)
Fig 1. Transient thermal impedance from junction to case as a function of pulse
duration
amp00146
10-7 10-6 10-5 10-4 10-3 10-2 10-1 1
0
0.2
0.4
0.6
0.8
tp (s)
Zth(j-c)th(j-c)
Zth(j-c)
(K/W)(K/W)(K/W)
(7)(7)(7)
(6)(6)(6)
(5)(5)(5)
(4)(4)(4)
(3)(3)(3)
(2)(2)(2)
(1)(1)(1)
Table 6. DC characteristics
Tj = 25
C; per section unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
V(BR)DSS drain-source breakdown voltage VGS =0V; I
D=500A110-- V
VGS(th) gate-source threshold voltage VDS = 10 V; ID= 50 mA 1.25 1.9 2.25 V
VGSq gate-source quiescent voltage VDS = 50 V; ID=20mA - 1.7 - V
IDSS drain leakage current VGS =0V; V
DS =50V - - 1.4 A
BLP10H6120P_BLP10H6120PG All information provided in this document is subject to legal disclaimers. © Ampleon Netherlands B.V. 2016. All rights reserved.
Product data sheet Rev. 1 — 20 December 2016 4 of 15
BLP10H6120P; BLP10H6120PG
Power LDMOS transistor
IDSX drain cut-off current VGS =V
GS(th) + 3.75 V;
VDS =10V
-7.8- A
IGSS gate leakage current VGS =11V; V
DS = 0 V - - 140 nA
RDS(on) drain-source on-state resistance VGS =V
GS(th) + 3.75 V;
ID=1.75A
-0.6-
Table 7. AC characteristics
Tj = 25
C; per section unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Crs feedback capacitance VGS =0V; V
DS = 50 V; f = 1 MHz - 0.31 - pF
Ciss input capacitance VGS =0V; V
DS = 50 V; f = 1 MHz - 55.1 - pF
Coss output capacitance VGS =0V; V
DS = 50 V; f = 1 MHz - 16.8 - pF
Table 8. RF characteristics
Test signal: pulsed RF; tp = 100
s;
= 20 %; f = 720 MHz; RF performance at VDS =50V;
IDq =80mA; T
case = 25
C; unless otherwise specified; in a class-AB production test circuit.
Symbol Parameter Conditions Min Typ Max Unit
Gppower gain PL = 120 W 16.8 18 - dB
RLin input return loss PL = 120 W - 20 - dB
Ddrain efficiency PL = 120 W 70 72 - %
VGS =0V; f= 1MHz.
Fig 2. Output capacitance as a function of drain-source voltage; typical values per
section
Table 6. DC characteristics …continued
Tj = 25
C; per section unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
amp00005
0 102030405060
0
20
40
60
80
VDS (V)
Coss
(pF)
BLP10H6120P_BLP10H6120PG All information provided in this document is subject to legal disclaimers. © Ampleon Netherlands B.V. 2016. All rights reserved.
Product data sheet Rev. 1 — 20 December 2016 5 of 15
BLP10H6120P; BLP10H6120PG
Power LDMOS transistor
7. Test information
7.1 Ruggedness in class-AB operation
The BLP10H6120P and BLP10H6120PG are capable of withstanding a load mismatch
corresponding to VSWR > 40 : 1 through all phases under the following conditions:
VDS =50V; I
Dq =80mA; P
L= 120 W pulsed; f = 720 MHz.
7.2 Impedance information
Fig 3. Definition of transistor impedance
Table 9. Typical push-pull impedance
Simulated Zi and ZL device impedance; impedance info at VDS = 50 V and PL=120W.
f ZiZL
(MHz) () ()
720 4.4 j6.4 10 + j11.2
001aan207
gate 1
gate 2
drain 2
drain 1
Z
i
Z
L
BLP10H6120P_BLP10H6120PG All information provided in this document is subject to legal disclaimers. © Ampleon Netherlands B.V. 2016. All rights reserved.
Product data sheet Rev. 1 — 20 December 2016 6 of 15
BLP10H6120P; BLP10H6120PG
Power LDMOS transistor
7.3 Test circuit
Printed-Circuit Board (PCB): RF-35; r = 3.5 F/m; thickness = 0.765 mm; thickness copper plating = 35 m.
See Table 10 for a list of components.
Fig 4. Component layout for class-AB production test circuit
80 mm
amp00147
C19
C20
R3 C6
R4
C2
C3
R2
R1 C5
C7
C8
L1
C13
C4
C1
C11
C10
R8
L4
C18
L3
L2
C16
R7
C14
R5
C9 C12
C15 C17
R6
Table 10. List of components
For test circuit see Figure 4.
Component Description Value Remarks
C1, C2 multilayer ceramic chip capacitor 15 pF ATC 800B
C3 multilayer ceramic chip capacitor 4.3 pF ATC 100A
C4 multilayer ceramic chip capacitor 9.1 pF ATC 100A
C5, C6 multilayer ceramic chip capacitor 150 pF ATC 100A
C7, C8 electrolytic capacitor 1 F, 50 V GRM32RR71H105KA01L
C9 multilayer ceramic chip capacitor 11 pF ATC 800B
C10, C11 multilayer ceramic chip capacitor 10 pF ATC 800B
C12 multilayer ceramic chip capacitor 6.2 pF ATC 800B
C13, C14 multilayer ceramic chip capacitor 33 pF ATC 800B
C15, C16 multilayer ceramic chip capacitor 150 pF ATC 800B
C17, C18 multilayer ceramic chip capacitor 4.7 F, 100 V TDK: C5750X7R2A475KT/A
C19, C20 electrolytic capacitor 1000 F, 63 V Vishay
L1 coaxial balun L = 64.8 mm EZ_86_TP_M17
L2 coaxial balun L = 64.8 mm EZ_86_TP_M17
L3, L4 inductor 90 nH 132-9SMGL
R1, R2, R3, R4 resistor 4.7 SMD 1206
R5, R6 resistor 10 m, 5 W FCL4L110R010FER
R7, R8 resistor 7.5 SMD 1206
BLP10H6120P_BLP10H6120PG All information provided in this document is subject to legal disclaimers. © Ampleon Netherlands B.V. 2016. All rights reserved.
Product data sheet Rev. 1 — 20 December 2016 7 of 15
BLP10H6120P; BLP10H6120PG
Power LDMOS transistor
7.4 Graphical data
VDS =50V; I
Dq = 80 mA; f = 720 MHz; tp= 100 s;
=20%.
VDS =50V; I
Dq = 80 mA; f = 720 MHz; tp= 100 s;
=20%.
(1) PL(1dB) = 50.8 dBm (120 W) at Pi= 33 dBm
(2) PL(3dB) = 51.3 dBm (135.7 W) at Pi= 35.6 dBm
Fig 5. Power gain and drain efficiency as function of
output power; typical values
Fig 6. Output power as a function of input power;
typical values
amp00148
0 20 40 60 80 100 120 140 160
12 0
14 20
16 40
18 60
20 80
PL (W)
Gp
Gp
(dB)(dB)(dB)
ηD
ηD
(%)(%)(%)
Gp
Gp
ηD
ηD
26 28 30 32 34 36 38
42
46
50
54
58
Pi (dBm)
PL
PL
(dBm)
(dBm)
PL
PL
Ideal PIdeal PL
Ideal PL
(1)(1)
(2)(2)
amp00149
BLP10H6120P_BLP10H6120PG All information provided in this document is subject to legal disclaimers. © Ampleon Netherlands B.V. 2016. All rights reserved.
Product data sheet Rev. 1 — 20 December 2016 8 of 15
BLP10H6120P; BLP10H6120PG
Power LDMOS transistor
VDS = 50 V; f = 720 MHz; tp= 100 s; =20%.
(1) IDq = 20 mA
(2) IDq = 40 mA
(3) IDq = 80 mA
(4) IDq = 160 mA
(5) IDq = 240 mA
(6) IDq = 320 mA
(7) IDq = 400 mA
(8) IDq = 480 mA
VDS = 50 V; f = 720 MHz; tp= 100 s; =20%.
(1) IDq = 20 mA
(2) IDq = 40 mA
(3) IDq = 80 mA
(4) IDq = 160 mA
(5) IDq = 240 mA
(6) IDq = 320 mA
(7) IDq = 400 mA
(8) IDq = 480 mA
Fig 7. Power gain as a function of output power;
typical values
Fig 8. Drain efficiency as a function of output power;
typical values
amp00150
0 20 40 60 80 100 120 140 160
10
12
14
16
18
20
22
PL (W)
Gp
Gp
(dB)(dB)(dB)
(8)(8)(8)
(7)(7)(7)
(6)(6)(6)
(5)(5)(5)
(4)(4)(4)
(3)(3)(3)
(2)(2)(2)
(1)(1)(1)
amp00151
0 20 40 60 80 100 120 140 160
0
20
40
60
80
PL (W)
ηD
ηD
(%)(%)(%)
(1)(1)(1)
(2)(2)(2)
(3)(3)(3)
(4)(4)(4)
(5)(5)(5)
(6)(6)(6)
(7)(7)(7)
(8)(8)(8)
BLP10H6120P_BLP10H6120PG All information provided in this document is subject to legal disclaimers. © Ampleon Netherlands B.V. 2016. All rights reserved.
Product data sheet Rev. 1 — 20 December 2016 9 of 15
BLP10H6120P; BLP10H6120PG
Power LDMOS transistor
IDq = 80 mA; f = 720 MHz; tp= 100 s; =20%.
(1) VDS = 50 V
(2) VDS = 45 V
(3) VDS = 40 V
(4) VDS = 35 V
(5) VDS = 30 V
(6) VDS = 25 V
(7) VDS = 20 V
IDq = 80 mA; f = 720 MHz; tp= 100 s; =20%.
(1) VDS = 50 V
(2) VDS = 45 V
(3) VDS = 40 V
(4) VDS = 35 V
(5) VDS = 30 V
(6) VDS = 25 V
(7) VDS = 20 V
Fig 9. Power gain as a function of output power;
typical values
Fig 10. Drain efficiency as a function of output power;
typical values
amp00152
0 20 40 60 80 100 120 140 160
10
12
14
16
18
20
22
PL (W)
Gp
Gp
(dB)(dB)(dB)
(1)(1)(1)
(2)
(2)(2)
(3)
(3)(3)
(4)
(4)(4)
(5)
(5)(5)
(6)
(6)(6)
(7)
(7)(7)
amp00153
0 20 40 60 80 100 120 140 160
0
20
40
60
80
PL (W)
ηD
ηD
(%)(%)(%) (1)(1)(1)
(2)
(2)(2)
(3)
(3)(3)
(4)
(4)(4)
(5)
(5)(5)
(6)
(6)(6)
(7)
(7)(7)
BLP10H6120P_BLP10H6120PG All information provided in this document is subject to legal disclaimers. © Ampleon Netherlands B.V. 2016. All rights reserved.
Product data sheet Rev. 1 — 20 December 2016 10 of 15
BLP10H6120P; BLP10H6120PG
Power LDMOS transistor
8. Package outline
Fig 11. Package outline SOT1223-2 (HSOP4F)
References
Outline
version
European
projection Issue date
IEC JEDEC JEITA
SOT1223-2
sot1223-2_po
15-01-12
15-06-04
Unit
mm
max
nom
min
3.9 0.2 3.90 0.27 20.62 19.00
9.96 8.13 8.85
A
Dimensions (mm are the original dimensions)
HSOP4F: plastic, heatsink small outline package; 4 leads(flat) SOT1223-2
A1A2
3.65
bcD
(1) D1D2
16.00
E(1) E1E2
5.84
ee
1
8.45
10.01 8.1816.05 5.89
e2e3
0.1 3.85 0.22 20.57 18.95 4.07 0.43.60 9.55 2.97
e4F
9.91 8.0815.95
D3
20.39
20.44
20.34 5.79
E3
9.78
9.83
9.730 3.80 0.17 20.52 18.903.55
Q1
1.62
v
0.25
0.1
1.57 0.25
wy
1.52
HE
15.96
16.16
15.76
0 10 mm
scale
detail X
D E
c
HE
D3E3
E1A2
A1Q1
A
12
43
E2
D1
D2
y
B A
vA
X
wBb
pin 1 index
F (4x)
Note
1. Package body dimensions “D and “E do not include mold and metal protrusions. Allowable protrusion is 0.25 mm per side.
2. Lead width dimension “b does not include dambar protrusions. Allowable dambar protrusion is 0.25 mm in total per lead.
(8x) METAL
PROTRUSIONS (SOURCE)
(2x)
e3
(2x)
e4
e
(2x)
e1
(2x)
e2
BLP10H6120P_BLP10H6120PG All information provided in this document is subject to legal disclaimers. © Ampleon Netherlands B.V. 2016. All rights reserved.
Product data sheet Rev. 1 — 20 December 2016 11 of 15
BLP10H6120P; BLP10H6120PG
Power LDMOS transistor
Fig 12. Package outline SOT1224-2 (HSOP4)
References
Outline
version
European
projection Issue date
IEC JEDEC JEITA
SOT1224-2
sot1224-2_po
15-01-13
15-06-04
HSOP4: plastic, heatsink small outline package; 4 leads SOT1224-2
E1
12
43
E2
D1
D2
wBb
pin 1 index
0 10 mm
scale
E
c
X
detail X
(A3)
Q
A2
A1A4
A
Lp
D
E3
HE
D3B A
vA
y
(8x) METAL
PROTRUSIONS (SOURCE)
e
(2x)
e1
(2x)
e2
(2x)
e3
(2x)
e4
Unit
mm
max
nom
min
3.9 0.2 3.90 0.27 20.62 19.00
9.96 8.13 8.85
A
Dimensions (mm are the original dimensions)
A1A2
3.65
bcD
(1) D1D2
16.00
E(1) E1E2
5.84
ee
1
8.45
10.01 8.1816.05 5.89
e2e3
0.1 3.85 0.22 20.57 18.95 4.073.60 9.55 2.97
e4
9.91 8.0815.95
D3
20.39
20.44
20.34 5.79
E3
9.78
9.83
9.730 3.80 0.17 20.52 18.903.55
A3A4
0.06
0.35 0
-0.02
Q
2.07
v
0.25
0.1
2.02 0.25
wy
1.97
θ
7°
3°
0°
Lp
1.10
0.95
0.80
HE
13.5
13.2
12.9
Note
1. Package body dimensions “D and “E do not include mold and metal protrusions. Allowable protrusion is 0.25 mm per side.
2. Lead width dimension “b does not include dambar protrusions. Allowable dambar protrusion is 0.25 mm in total per lead.
3. Dimension A4 is measured with respect to bottom of the heatsink DATUM H. Positive value means that the bottom of the heatsink
is higher than the bottom of the lead.
H
θ
BLP10H6120P_BLP10H6120PG All information provided in this document is subject to legal disclaimers. © Ampleon Netherlands B.V. 2016. All rights reserved.
Product data sheet Rev. 1 — 20 December 2016 12 of 15
BLP10H6120P; BLP10H6120PG
Power LDMOS transistor
9. Handling information
[1] CDM classification C1 is granted to any part that passes after exposure to an ESD pulse of 250 V, but fails
after exposure to an ESD pulse of 500 V.
[2] HBM classification 1C is granted to any part that passes after exposure to an ESD pulse of 1000 V, but fails
after exposure to an ESD pulse of 2000 V.
10. Abbreviations
11. Revision history
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Observe precautions for handling
electrostatic sensitive devices.
Such precautions are described in the ANSI/ESD S20.20, IEC/ST 61340-5, JESD625-A or
equivalent standards.
Table 11. ESD sensitivity
ESD model Class
Charged Device Model (CDM); According to ANSI/ESDA/JEDEC standard JS-002 C1 [1]
Human Body Model (HBM); According to ANSI/ESDA/JEDEC standard JS-001 1C [2]
Table 12. Abbreviations
Acronym Description
CW Continuous Wave
ESD ElectroStatic Discharge
HF High Frequency
LDMOS Laterally Diffused Metal-Oxide Semiconductor
MTF Median Time to Failure
SMD Surface Mounted Device
VSWR Voltage Standing-Wave Ratio
Table 13. Revision history
Document ID Release date Data sheet status Change notice Supersedes
BLP10H6120P_BLP10H6120PG v.1 20161220 Product data sheet - -
BLP10H6120P_BLP10H6120PG All information provided in this document is subject to legal disclaimers. © Ampleon Netherlands B.V. 2016. All rights reserved.
Product data sheet Rev. 1 — 20 December 2016 13 of 15
BLP10H6120P; BLP10H6120PG
Power LDMOS transistor
12. Legal information
12.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.ampleon.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Ampleon does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local Ampleon sales office. In
case of any inconsistency or conflict with the short data sheet, the full data
sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Ampleon and its customer, unless Ampleon and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be valid
in which the Ampleon product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
12.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, Ampleon does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. Ampleon takes no responsibility for
the content in this document if provided by an information source outside of
Ampleon.
In no event shall Ampleon be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost profits,
lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Ampleon’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Ampleon.
Right to make changes — Ampleon reserves the right to make changes to
information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Suitability for use — Ampleon products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
systems or equipment, nor in applications where failure or malfunction of an
Ampleon product can reasonably be expected to result in personal injury,
death or severe property or environmental damage. Ampleon and its
suppliers accept no liability for inclusion and/or use of Ampleon products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Ampleon makes no representation
or warranty that such applications will be suitable for the specified use without
further testing or modification.
Customers are responsible for the design and operation of their applications
and products using Ampleon products, and Ampleon accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Ampleon product is suitable and
fit for the customer’s applications and products planned, as well as for the
planned application and use of customer’s third party customer(s). Customers
should provide appropriate design and operating safeguards to minimize the
risks associated with their applications and products.
Ampleon does not accept any liability related to any default, damage, costs or
problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Ampleon products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Ampleon does not accept any
liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Ampleon products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.ampleon.com/terms, unless otherwise agreed in a valid written
individual agreement. In case an individual agreement is concluded only the
terms and conditions of the respective agreement shall apply. Ampleon
hereby expressly objects to applying the customer’s general terms and
conditions with regard to the purchase of Ampleon products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
BLP10H6120P_BLP10H6120PG All information provided in this document is subject to legal disclaimers. © Ampleon Netherlands B.V. 2016. All rights reserved.
Product data sheet Rev. 1 — 20 December 2016 14 of 15
BLP10H6120P; BLP10H6120PG
Power LDMOS transistor
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Ampleon product is automotive qualified, the product
is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Ampleon
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without Ampleon’ warranty of the product for such
automotive applications, use and specifications, and (b) whenever customer
uses the product for automotive applications beyond Ampleon’ specifications
such use shall be solely at customer’s own risk, and (c) customer fully
indemnifies Ampleon for any liability, damages or failed product claims
resulting from customer design and use of the product for automotive
applications beyond Ampleon’ standard warranty and Ampleon’ product
specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Any reference or use of any ‘NXP’ trademark in this document or in or on the
surface of Ampleon products does not result in any claim, liability or
entitlement vis-à-vis the owner of this trademark. Ampleon is no longer part of
the NXP group of companies and any reference to or use of the ‘NXP’
trademarks will be replaced by reference to or use of Ampleon’s own
trademarks.
13. Contact information
For more information, please visit: http://www.ampleon.com
For sales office addresses, please visit: http://www.ampleon.com/sales
BLP10H6120P; BLP10H6120PG
Power LDMOS transistor
© Ampleon Netherlands B.V. 2016. All rights reserved.
For more information, please visit: http://www.ampleon.com
For sales office addresses, please visit: http://www.ampleon.com/sales
Date of release: 20 December 2016
Document identifier: BLP10H6120P_BLP10H6120PG
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
14. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Thermal characteristics . . . . . . . . . . . . . . . . . . 3
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 3
7 Test information. . . . . . . . . . . . . . . . . . . . . . . . . 5
7.1 Ruggedness in class-AB operation . . . . . . . . . 5
7.2 Impedance information . . . . . . . . . . . . . . . . . . . 5
7.3 Test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
7.4 Graphical data . . . . . . . . . . . . . . . . . . . . . . . . . 7
8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
9 Handling information. . . . . . . . . . . . . . . . . . . . 12
10 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 12
11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12
12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13
12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13
12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
12.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14
13 Contact information. . . . . . . . . . . . . . . . . . . . . 14
14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15