FEATURES
DHIGH-FREQUENCY OPERATION:
4MHz FS max
DEXCELLENT LINEARITY:
±0.02% typ at 2MHz
DPRECISION 5V REFERENCE
DDISABLE PIN
DLOW JITTER
APPLICATIONS
DINTEGRATING A/D CONVERSION
DPROCESS CONTROL
DVOLTAGE ISOLATION
DVOLTAGE-CONTROLLED OSCILLATOR
DFM TELEMETRY
DESCRIPTION
The VFC110 voltage-to-frequency converter is a
third-generation VFC offering improved features and
performance. These include higher frequency operation,
an onboard precision 5V reference, and a Disable
function.
The precision 5V reference can be used for offsetting the
VFC transfer function, as well as exciting transducers or
bridges. The Enable pin allows several VFCs’ outputs to
be paralleled, multiplexed, or simply to shut off the VFC.
The open-collector frequency output is TTL-/
CMOS-compatible. The output may be isolated by using
an opto-coupler or transformer.
Internal input resistor, one-shot and integrator capacitors
simplify applications circuits. These components are
trimmed for a full-scale output frequency of 4MHz at 10V
input. No additional components are required for many
applications.
The VFC110 is packaged in a plastic 14-pin DIP. Industrial
and military temperature range gradeouts are available.
2
14
Input Common
VIN
112
IIN VOUT 11
Comparator
One−Shot
VREF
−VSAnalog Ground
413
5V
3COS
6
8
Digital Ground
fOUT
10
+VS
7
Enable
5
VFC110
SBVS021A − OCTOBER 1988 − REVISED APRIL 2007
High-Frequency
VOLTAGE-T O-FREQUENCY CONVERTER
! !
www.ti.com
Copyright 1998−2007, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments Incorporated. All other trademarks are the property of their respective owners.
"#$$%
SBVS021A − OCTOBER 1988 − REVISED APRIL 2007
www.ti.com
2
ABSOLUTE MAXIMUM RATINGS(1)
Power Supply Voltages (+VS to −VS) 40V. . . . . . . . . . . . . . . . . . . . .
fOUT Sink Current 50mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Comparator In Voltage −5V to +VS
. . . . . . . . . . . . . . . . . . . . . . . . . .
Enable Input +VS to −VS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Integrator Common-Mode Voltage −1.5V to +1.5V. . . . . . . . . . . . .
Integrator Differential Input Voltage +0.5V to −0.5V. . . . . . . . . . . . .
Integrator Out (short-circuit) Indefinite. . . . . . . . . . . . . . . . . . . . . . .
VREF Out ( s h o r t - c i r c u i t ) Indefinite. . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Temperature Range
P Package −40°C to +85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage Temperature
P Package −40°C to +125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods
may degrade device reliability. These are stress ratings only, a nd
functional operation of the device at these or any other conditions
beyond those specified is not supported.
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be
handled with appropriate precautions. Failure to observe
proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
ORDERING INFORMATION(1)
PRODUCT PACKAGE-LEAD PACKAGE DESIGNATOR SPECIFIED TEMPERATURE
RANGE
VFC110AP 14-Pin Plastic DIP N −25°C to +85°C
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site
at www.ti.com.
PIN CONFIGURATION
Top View P-DIP
Input Common
Analog Common
VOUT
Comparator In
+VS
NC
fOUT
Enable
Digital Ground
1
2
3
4
5
6
7
14
13
12
11
10
9
8
IIN
VIN
+5VREF Out
−VS
COS
"#$$%
SBVS021A − OCTOBER 1988 − REVISED APRIL 2007
www.ti.com
3
ELECTRICAL CHARACTERISTICS
At TA = +25°C and VS = ±15V, unless otherwise noted.
VFC110AP
PARAMETER CONDITIONS MIN TYP MAX UNITS
VOLTAGE-TO-FREQUENCY OPERATION
Nonlinearity(1): fFS = 100kHz COS = 2.2nF, RIN = 44kΩ0.01 0.05 %FS
fFS = 1MHz COS = 150pF, RIN = 40kΩ0.1 %FS
fFS = 2MHz COS = 56pF, RIN = 34kΩ0.02 %FS
fFS = 4MHz COS = (Int), RIN = (Int) 1 %FS
Gain Error, f = 1MHz COS = 150pF, RIN = 40kΩ5 %
Gain Drift, f = 1MHz Specified Temp Range 100 ppm/°C
Relative to VREF Specified Temp Range 100 ppm/°C
PSRR VS = ±8V to ±18V 0.1 %/V
INPUT
Full-Scale Input Current 250 500 µA
IB− (Inverting Input) 20 100 nA
IB+ (Noninverting Input) 250 nA
VOS 3 mV
VOS Drift Specified Temp Range 35 µV/°C
INTEGRATOR AMPLIFIER OUTPUT
Output Voltage Range RL = 2kΩ−0.2 +VS − 4 V
Output Current Drive 5 20 mA
Capacitive Load No Oscillations 10 nF
COMPARATOR INPUT
IB (Input Bias Current) −5 µA
Trigger Voltage ±50 mV
Input Voltage Range −5 +VSV
OPEN COLLECTOR OUTPUT
VO Low 0.4 V
ILEAKAGE 0.1 1 µA
Fall Time 25 ns
Delay to Rise 25 ns
Settling Time To Specified Linearity for a
Full-Scale Input Step One Pulse of New Frequency Plus 1µs
REFERENCE VOLTAGE
Voltage 4.97 5 5.03 V
Voltage Drift 50 ppm/°C
Load Regulation IO = 0 to 10mA 2 10 mV
PSRR VS = ±8V to ±18V 5 mV/V
Current Limit Short Circuit 15 20 mA
ENABLE INPUT
VHIGH (fOUT Enabled) Specified Temp Range 2 V
VLOW (fOUT Disabled) Specified Temp Range 0.4 V
IHIGH 0.1 µA
ILOW 1µA
POWER SUPPLY
Voltage, ±VS±8±15 ±18 V
Current 13 16 mA
TEMPERATURE RANGE
Specified
AP −25 +85 °C
Storage
AP −40 +125 °C
(1) Nonlinearity measured from 1V to 10V input.
"#$$%
SBVS021A − OCTOBER 1988 − REVISED APRIL 2007
www.ti.com
4
TYPICAL CHARACTERISTICS
At TA = +25°C and VS = ±15V, unless otherwise noted.
10pF
External One−Shot Capacitor
FULL−SCALE FREQUENCY
vs EXTERNAL ONE−SHOT CAPACITOR
100pF 1nF 10nF 100nF
10M
1M
100k
10k
Full−Scale Frequency (Hz)
RIN =40k
Ω
−50
Temperature (_C)
QUIESCENT CURRENT vs TEMPERATURE
18
16
14
12
10
8
6
4
2
0
Quiescent Current (mA)
IQ+
−25 0 25 50 75 100 125
IQ−
0
Output Current (mA)
REFERENCE VOLTAGE
vs REFERENCE LOAD CURRENT
5.01
5.00
4.99
4.98
4.97
4.96
VREF (V)
2 4 6 8 10 12 14 16 18 20 22
Short−Circuit
Current Limit
10k Full−Scale Frequency (Hz)
TYPICAL FULL−SCALE GAIN DRIFT
vs FULL−SCALE FREQUENCY
1000
100
10
Full−Scale Frequency (ppm/_C)
100k 1M 10M
AGrade
10k Full−Scale Frequency (Hz)
JITTER vs FULL−SCALE FREQUENCY
500
400
300
200
100
0
Jitter (ppm)
100k 1M 10M
Jitteristheratioofthe1σvalue ofthe distribution ofthe period
(1/fOUT, max) to the mean of the period.
FREQUENCY COUNT REPEATABILITY
vs COUNTER GATE TIME
1ms Time
0.001
Frequency Repeatability (%)
0.0001
0.0002
0.0004
0.0006
0.0008
10ms 100ms 1s
17
Repeatability (Bits)
18
19
Thisgraph describesthelowfrequencystabilityoftheVFC110:
the ratioofthe 1σpoint of the distribution of 100 runs (where
each mean frequency came from 1000readings for each gate
time) to the overall mean frequency.
fFS = 100kHz
fFS =1MHz
"#$$%
SBVS021A − OCTOBER 1988 − REVISED APRIL 2007
www.ti.com
5
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C and VS = ±15V, unless otherwise noted.
NONLINEARITY vs INPUT VOLTAGE
0Input Voltage (V)
0.02
0.01
0
−0.01
−0.02
1MHz FS Linearity Error (% of FSR)
12345678910
1.0
0.8
0.6
0.4
0.2
0
−0.2
−0.4
−0.6
−0.8
−1.0
4MHz FS Linearity Error (% of FSR)
fFS =4MHz
fFS =1MHz
NONLINEARITY vs FULL−SCALE FREQUENCY
104
Full−Scale Frequency (Hz)
1
0.1
0.01
0.001
Typical Nonlinearity (% of FSR)
105106107
"#$$%
SBVS021A − OCTOBER 1988 − REVISED APRIL 2007
www.ti.com
6
OPERATION
Figure 1 shows the connections required for operation at
a full-scale output frequency of 4MHz. Only power supply
bypass capacitors and an output pull-up resistor, RPU, are
required for this mode of operation. A 0V to 10V input
voltage produces a 0Hz to 4MHz output frequency. The
internal input resistor, one-shot and integrator capacitors
set the full-scale output frequency. The input is applied to
the summing junction of the integrator amplifier through
the 25kΩ internal input resistor. Pin 14 (the noninverting
amplifier input) should be referred directly to the negative
side of VIN. The common-mode range of the integrating
amplifier is limited to approximately −1V to +1V referred to
analog ground. This allows the noninverting input to
Kelvin-sense the common connection of VIN, easily
accommodating any ground-drop errors. The input
impedance loading VIN is equal to the input
resistor—approximately 25kΩ.
OPERATION AT LOWER FREQUENCIES
The VFC110 can be operated at lower frequencies simply
by limiting the input voltage to less than the nominal 10V
full-scale input. To maintain a 10V FS input and highest
accuracy, however, external components are required
(see Table 1). Small adjustments may be required in the
nominal values indicated. Integrator and one-shot
capacitors are added in parallel to internal capacitors.
Figure 2 illustrates the connections required for 100kHz
full-scale output. The one-shot capacitor, COS, should be
connected to logic ground. The one-shot connection
(pin 6) is not short-circuit protected. Short-circuits to
ground may damage the device.
The integrator capacitor’s value does not directly affect the
output frequency, but determines the magnitude of the
voltage swing on the integrator’s output. Using a CINT
equal to C OS provides an integrator output swing from 0V
to approximately 1.5V.
COMPONENT SELECTION
Selection of the external resistor and capacitor type is
important. Temperature drift of an external input resistor
and one-shot capacitor will affect temperature stability of
the output frequency. NPO ceramic capacitors will
normally produce the best results. Silver-mica types will
result in slightly higher drift, but may be adequate in many
applications. A low temperature coefficient film resistor
should be used for RIN.
The integrator capacitor serves as a charge bucket, where
charge is accumulated from the input, VIN, and that charge
is drained during the one-shot period. While the size of the
bucket (capacitor value) is not critical, it must not leak.
Capacitor leakage or dielectric absorption can affect the
linearity and offset of the transfer function. High-quality
ceramic capacitors can be used for values less than
0.01µF. Use caution with higher value ceramic capacitors.
High-k ceramic capacitors may have voltage
nonlinearities which can degrade overall linearity.
Polystyrene, polycarbonate, or mylar film capacitors are
superior for high values.
2
14
VIN
11211
One−Shot
VREF
−VSAnalog Ground
413
NC
36
8
Logic Ground
fOUT
0MHz to 4MHz
10
+VS
7
NC5
NC
50pF(1)
NC
RPU
680Ω
−15V
+15V VL+5V
25kΩ
(1)
0V to
+10V
NOTE: (1) Nominal values (±20%).
Figure 1. 4MHz Full-Scale Operation
"#$$%
SBVS021A − OCTOBER 1988 − REVISED APRIL 2007
www.ti.com
7
Table 1. Component Selection Table
FULL-SCALE
FREQUENCY,
EXTERNAL COMPONENTS
FREQUENCY,
fFS RIN COS CINT
4MHz ∗ ∗ ∗
2MHz 34kΩ56pF ∗
1MHz 40kΩ150pF ∗
500kHz 58kΩ330pF 2nF
100kHz 44kΩ2.2nF 10nF
50kHz 88kΩ2.2nF 0.1µF
10kHz 44kΩ22nF 0.1µF
* Use internal component only.
The values given were determined empirically to give the optimal
performance, taking into consideration tradeoffs between linearity
and jitter for each given full-scale frequency of operation. The
capacitors listed were chosen from standard values of NPO ceramic
type capacitors while the resistor values were rounded off. Larger
CINT values may improve linearity, but may also increase frequency
noise.
PULL-UP RESISTOR
The VFC110 frequency output is an open-collector
transistor. A pull-up resistor should be connected from fOUT
to the logic supply voltage, +VL. The output transistor is On
during the one-shot period, causing the output to be a logic
Low. The current flowing in this resistor should be limited
to 8mA to assure a 0.4V maximum logic Low. The value
chosen for the pull-up resistor may depend on the
full-scale frequency and capacitance on the output line.
Excessive capacitance on fOUT will cause a slow, rounded
rising edge at the end of an output pulse. This effect can
be minimized by using a pull-up resistor which sets the
output current to its maximum of 8mA. The logic power
supply can be any positive voltage up to +VS.
ENABLE PIN
If left unconnected, the Enable input will assume a logic
High level, enabling operation. Alternatively, the Enable
input may be connected directly to +VS. Since an internal
pull-up current is included, the Enable input may be driven
by an open-collector logic signal.
A logic Low at the Enable input causes output pulses to
cease. This is accomplished by interrupting the signal path
through the one-shot circuitry. While disabled, all circuitry
remains active and quiescent current is unchanged. Since
no reset current pulses can occur while disabled, any
positive input voltage will cause the integrator op amp to
ramp negatively and saturate at its most negative output
swing of approximately −0.7V.
When the Enable input receives a logic High (greater than
+2V), a reset current cycle is initiated (causing fOUT to go
Low). The integrator ramps positively and normal
operation is established. The time required for the output
frequency to stabilize is equal to approximately one cycle
of the final output frequency plus 1µs.
2
VIN
11211
One−Shot
VREF
−VS
413
NC
3 6
8fOUT
0kHz to 100kHz
10
+VS
7
5
RPU
+VL
COS
2.2nF High = Enable
Low = Disable
CINT
10nF
0V to
+10V
5kΩ
Gain Trim 44kΩ
RIN
NC
14
Figure 2. 100kHz Full-Scale Operation
"#$$%
SBVS021A − OCTOBER 1988 − REVISED APRIL 2007
www.ti.com
8
Using the Enable input, several VFCs’ outputs can be
connected to a single output line. All disabled VFCs will
have a high output impedance; one active VFC can then
transmit on the output line. Since the disabled VFCs are
not oscillating, they cannot interfere or lock with the
operating VFC. Locking can occur when one VFC
operates at nearly the same frequency as—or a multiple
of—a nearby VFC. Coupling between the two may cause
them to lock to the same or exact multiple frequency. It then
takes a small incremental input voltage change to unlock
them. Locking cannot occur when unneeded VFCs are
disabled.
REFERENCE VOLTAGE
The V REF output is useful for offsetting the transfer function
and exciting sensors. Figure 3 shows VREF used to offset
the transfer function of the VFC110 to achieve a bipolar
input voltage range. Sub-surface zener reference circuitry
is used for low noise and excellent temperature drift.
Output current is specified to 10mA and current-limited to
approximately 20mA. Excessive or variable loads on VREF
can decrease frequency stability due to internal heating.
2
NC
VIN
11211
One−Shot
VREF
413
5V
3 6
8fOUT
7
5
RPU
COS
R1
14
NC
+5V+15V
10
−15V
R2
IREF (∼1mA)
Figure 3. Offsetting the Frequency Output
PRINCIPLE OF OPERATION
The VFC110 uses a charge-balance technique to
achieve high accuracy. The heart of this technique is
an analog integrator formed by the integrator op amp,
feedback capacitor CINT, and input resistor RIN. The
integrator’s output voltage is proportional to the
charge stored in CINT. An input voltage develops an
input current of VIN/RIN, which is forced to flow
through CINT. This current charges CINT, causing the
integrator output voltage to ramp negatively.
When the output of the integrator ramps to 0V, the
comparator trips, triggering the one-shot. This
connects the reference current, IREF, (approximately
1mA) to the integrator input during the one-shot
period, TOS. This switched current causes the
integrator output to ramp positively until the one-shot
period ends. Then the cycle starts again.
The oscillation is regulated by the balance of current
(or charge) between the input current and the
time-averaged reset current. The equation of current
balance is:
where TO is the one-shot period and fOUT is the
oscillation frequency.
IIN +IIREF Duty Cycle
VIN
RIN
+IREF fOUT TO
Integrator
Output
(Pin 12)
0V
fOUT
1/fOUT
TOS
Effect of
Smaller CINT
"#$$%
SBVS021A − OCTOBER 1988 − REVISED APRIL 2007
www.ti.com
9
MEASURING THE OUTPUT FREQUENCY
To complete an integrating A/D conversion, the output
frequency of the VFC110 must be counted. Simple
frequency counting is accomplished by counting output
pulses for a reference time (usually derived from a crystal
oscillator). This can be implemented with counter/timer
peripheral chips available for many popular
microprocessor families. Many microcontrollers have
counter inputs that can be programmed for frequency
measurement.
Since fOUT is an open-collector device, the negative-going
edge provides the fastest logic transition. Clocking the
counter on the falling edge will provide the best results in
noisy environments.
Frequency can also be measured by accurately timing the
period of one or more cycles of the VFC output. Frequency
must then be computed since it is inversely proportional to
the measured period. This measurement technique can
provide higher measurement resolution in short
conversion times. It is the method used in most
high-performance laboratory frequency counters. It is
usually necessary to offset the transfer function so 0V
input causes a finite frequency out. Otherwise the output
period (and therefore the conversion time) approaches
infinity.
FREQUENCY NOISE
Frequency noise (small random variation in the output
frequency) limits the useful resolution of fast frequency
measurement techniques. Long measurement time
averages the effect of frequency noise and achieves the
maximum useful resolution. The VFC110 is designed to
minimize frequency noise and allows improved useful
resolution with short measurement times. The typical
characteristic curve Frequency Count Repeatability vs
Counter Gate Time shows the effect of noise as the
counter gate time is varied. It shows the one standard
deviation (1σ) count variation (as a percentage of FS
counts) versus counter gate time.
FREQUENCY-TO-VOLTAGE CONVERSION
The VFC110 can also be connected as a
frequency-to-voltage converter (Figure 4). Input
frequency pulses are applied to the comparator input. A
negative-going pulse crossing 0V initiates a reference
current pulse which is averaged by the integrator op amp.
The values of the one-shot capacitor and feedback resistor
(same as RIN) are determined with Table 1. The input
frequency pulse must not remain negative for longer than
the duration of the one-shot period. Figure 4 shows the
required timing to assure this. If the negative-going input
frequency pulses are longer in duration, the capacitive
coupling circuit shown can be used. Level shift or
capacitive coupling circuitry should not provide pulses
which go lower than −5V or damage to the comparator
input may occur.
This frequency-to-voltage converter operates by
averaging (filtering) the reference current pulses triggered
on every falling edge at the frequency input. Voltage ripple
with a frequency equal to the input will be present in the
output voltage. The magnitude of this ripple voltage is
inversely proportional to the integrator capacitor. The
ripple can be made arbitrarily small with a large capacitor,
but at the sacrifice of settling time. The R-C time constant
of CINT and RIN determine the settling behavior. A better
compromise between output ripple and settling time can
be achieved by adding a low-pass filter following the
voltage output.
2
11211
One−Shot
VREF
413
NC
3 6
7
5
COS
14
NC
10
CINT
RIN
VOUT = 0 to 10V
NC
−VS
8NC
+VS
2.2kΩ
4.7kΩ
−VS
1kΩ
fIN
fIN
1nF
12kΩ
+VS
Long Pulses OK
TTL
1/10fFS max
Figure 4. Frequency-to-Voltage Conversion
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
VFC110AG OBSOLETE CDIP SB JD 14 TBD Call TI Call TI
VFC110AG2 OBSOLETE CDIP SB JD 14 TBD Call TI Call TI
VFC110AP ACTIVE PDIP N 14 25 Green (RoHS &
no Sb/Br) CU NIPDAU N / A for Pkg Type
VFC110APG4 ACTIVE PDIP N 14 25 Green (RoHS &
no Sb/Br) CU NIPDAU N / A for Pkg Type
VFC110BG OBSOLETE CDIP SB JD 14 TBD Call TI Call TI
VFC110BG1 OBSOLETE CDIP SB JD 14 TBD Call TI Call TI
VFC110SG OBSOLETE CDIP SB JD 14 TBD Call TI Call TI
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 5-Feb-2007
Addendum-Page 1
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and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be
provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in
such safety-critical applications.
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
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specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at
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TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are
designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated
products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products Applications
Amplifiers amplifier.ti.com Audio www.ti.com/audio
Data Converters dataconverter.ti.com Automotive www.ti.com/automotive
DSP dsp.ti.com Broadband www.ti.com/broadband
Clocks and Timers www.ti.com/clocks Digital Control www.ti.com/digitalcontrol
Interface interface.ti.com Medical www.ti.com/medical
Logic logic.ti.com Military www.ti.com/military
Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork
Microcontrollers microcontroller.ti.com Security www.ti.com/security
RFID www.ti-rfid.com Telephony www.ti.com/telephony
RF/IF and ZigBee® Solutions www.ti.com/lprf Video & Imaging www.ti.com/video
Wireless www.ti.com/wireless
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