PD - 95149 IRL2910S/LPbF Logic-Level Gate Drive l Surface Mount l Advanced Process Technology l Ultra Low On-Resistance l Dynamic dv/dt Rating l Fast Switching l Fully Avalanche Rated l Lead-Free Description HEXFET(R) Power MOSFET l D VDSS = 100V RDS(on) = 0.026 G Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible onresistance in any existing surface mount package. The D2Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRL2910L) is available for lowprofile applications. ID = 55A S D 2 P ak T O -26 2 Absolute Maximum Ratings ID @ TC = 25C ID @ TC = 100C IDM PD @TA = 25C PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG Parameter Max. Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds 55 39 190 3.8 200 1.3 16 520 29 20 5.0 -55 to + 175 Units A W W W/C V mJ A mJ V/ns C 300 (1.6mm from case ) Thermal Resistance Parameter RJC RJA Junction-to-Case Junction-to-Ambient ( PCB Mounted,steady-state)** Typ. Max. Units --- --- 0.75 40 C/W 04/19/04 IRL2910S/LPbF Electrical Characteristics @ TJ = 25C (unless otherwise specified) V(BR)DSS/TJ Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Qg Qgs Qgd td(on) tr td(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Min. 100 --- --- --- --- 1.0 28 --- --- --- --- --- --- --- --- --- --- --- RDS(on) Static Drain-to-Source On-Resistance VGS(th) gfs Gate Threshold Voltage Forward Transconductance IDSS Drain-to-Source Leakage Current LS Internal Source Inductance --- Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance --- --- --- V(BR)DSS IGSS Typ. --- 0.12 --- --- --- --- --- --- --- --- --- --- --- --- 11 100 49 55 Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 0.026 VGS = 10V, ID = 29A 0.030 VGS = 5.0V, ID = 29A 0.040 VGS = 4.0V, ID = 24A 2.0 V VDS = VGS, ID = 250A --- S VDS = 50V, ID = 29A 25 VDS = 100V, VGS = 0V A 250 VDS = 80V, VGS = 0V, TJ = 150C 100 VGS = 16V nA -100 VGS = -16V 140 ID = 29A 20 nC VDS = 80V 81 VGS = 5.0V, See Fig. 6 and 13 --- VDD = 50V --- ID = 29A ns --- RG = 1.4, VGS = 5.0V --- RD = 1.7, See Fig. 10 Between lead, 7.5 --- nH and center of die contact 3700 --- VGS = 0V 630 --- pF VDS = 25V 330 --- = 1.0MHz, See Fig. 5 Source-Drain Ratings and Characteristics IS ISM VSD trr Qrr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol --- --- 55 showing the A G integral reverse --- --- 190 S p-n junction diode. --- --- 1.3 V TJ = 25C, IS = 29A, VGS = 0V --- 240 350 ns TJ = 25C, IF = 29A --- 1.8 2.7 C di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes: Repetitive rating; pulse width limited by Pulse width 300s; duty cycle 2%. max. junction temperature. ( See fig. 11 ) Uses IRL2910 data and test conditions VDD = 25V, starting TJ = 25C, L = 1.2mH RG = 25, IAS = 29A. (See Figure 12) ISD 29A, di/dt 490A/s, VDD V(BR)DSS, TJ 175C ** When mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. IRL2910S/LPbF 1000 1000 VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V TOP ID , Drain-to-Source Current (A ) ID , Drain-to-Source Current (A ) TOP 100 10 2.5 V 2 0 s P U LS E W ID TH T J = 2 5C 1 0.1 1 10 100 10 2.5 V 2 0 s P U LS E W ID TH T J = 1 75 C 1 A 100 0.1 1 V D S , D rain-to-S ource V oltage (V ) Fig 2. Typical Output Characteristics 3.0 R D S (on) , Drain-to-S ource O n Resistance (N orm alized) I D , D ra in -to-S ourc e C urrent (A) 1000 TJ = 2 5 C TJ = 17 5 C 10 V D S = 5 0V 2 0 s P U L S E W ID TH 1 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 A 100 V D S , D rain-to-S ource V oltage (V ) Fig 1. Typical Output Characteristics 100 10 6.0 V G S , G ate-to -Sou rce Voltage (V) Fig 3. Typical Transfer Characteristics A I D = 4 8A 2.5 2.0 1.5 1.0 0.5 V G S = 10 V 0.0 -60 -40 -20 0 20 40 60 80 A 100 120 140 160 180 T J , Junction T em perature (C ) Fig 4. Normalized On-Resistance Vs. Temperature IRL2910S/LPbF V GS C iss C rs s C iss C o ss C , Capacitance (pF) 5000 = = = = 15 0V , f = 1MHz C g s + C g d , C d s S H O R TE D C gd C ds + C g d V G S , G a te-to-S ou rc e V o ltag e (V ) 6000 3000 C o ss C rss 1000 0 1 10 V D S = 80 V V D S = 50 V V D S = 20 V 12 4000 2000 I D = 2 9A 100 9 6 3 FO R TE S T CIR C U IT S E E FIG U R E 1 3 0 A 0 80 120 160 A 200 Q G , T otal G ate C harge (nC ) V D S , D rain-to-S ourc e V oltage (V ) Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 1000 1000 O P E R A T IO N IN T H IS A R E A L IM ITE D B Y R D S (o n) I D , D rain Current (A ) I S D , R everse Drain C urrent (A ) 40 100 T J = 1 75 C T J = 25 C V G S = 0V 10 0.4 0.8 1.2 1.6 V S D , S ourc e-to-D rain V oltage (V ) Fig 7. Typical Source-Drain Diode Forward Voltage A 2.0 10 s 100 100 s 1m s 10 10m s T C = 25 C T J = 17 5C S ing le P u lse 1 1 10 100 A 1000 V D S , D rain-to-S ource V oltage (V ) Fig 8. Maximum Safe Operating Area IRL2910S/LPbF 50 RD VDS VGS I D , D rain Current (A m ps) 40 D.U.T. RG 30 + -VDD 5.0V Pulse Width 1 s Duty Factor 0.1 % 20 Fig 10a. Switching Time Test Circuit 10 VDS 90% A 0 25 50 75 100 125 150 175 TC , C as e T em perature (C ) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms Therm al R es ponse (Z thJ C ) 10 1 D = 0 .5 0 0 .2 0 0.1 PD M 0 .1 0 t 0 .0 5 0 .0 2 0 .0 1 0.01 0.00001 1 t2 N o te s: 1 . D u ty fa c tor D = t S IN G L E P U L S E (T H E R M A L R E S P O N S E ) 1 /t 2 2 . P e a k TJ = P D M x Z th J C + T C 0.0001 0.001 0.01 0.1 1 t 1 , R e ctan g u lar P u lse D u ra tio n (s e c ) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case A 10 IRL2910S/LPbF 1 5V L VDS D .U .T RG 20V IA S D R IV E R + V - DD 0 .0 1 tp Fig 12a. Unclamped Inductive Test Circuit V (B R )D SS A E A S , S ingle P ulse A valanche E nergy (m J) 1400 TO P 1200 B O TTO M ID 12 A 2 0A 29 A 1000 800 600 400 200 0 V D D = 25 V 25 50 75 100 125 150 S tarting T J , J unc tion T em perature (C ) tp Fig 12c. Maximum Avalanche Energy Vs. Drain Current IAS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50K QG 12V .2F .3F 5.0 V QGS D.U.T. QGD + V - DS VGS VG 3mA Charge Fig 13a. Basic Gate Charge Waveform IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit A 175 IRL2910S/LPbF Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer + - - + RG * * * * Driver Gate Drive Period P.W. + dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test D= - VDD P.W. Period VGS=10V D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple 5% * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS ISD * IRL2910S/LPbF D2Pak Package Outline Dimensions are shown in millimeters (inches) D2Pak Part Marking Information (Lead-Free) T H IS IS AN IR F 5 30 S WIT H L OT COD E 80 24 AS S E MB L E D ON WW 0 2, 200 0 IN T H E AS S E MB L Y L INE "L " IN T E R N AT ION AL R E CT IF IE R L OGO N ote: "P " in as s embly line pos ition indicates "L ead-F ree" P AR T N U MB E R F 530 S AS S E MB L Y L OT COD E OR INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE P AR T N U MB E R F 530S DAT E CODE P = DE S IGN AT E S L E AD-F R E E P R ODU CT (OPT IONAL ) YE AR 0 = 2000 WE E K 02 A = AS S E MB L Y S IT E CODE D AT E COD E YE AR 0 = 2 000 WE E K 0 2 L IN E L IRL2910S/LPbF TO-262 Package Outline TO-262 Part Marking Information E XAMP L E : T H IS IS AN IR L 3103L L OT CODE 1789 AS S E MB L E D ON WW 19, 1997 IN T H E AS S E MB L Y L INE "C" Note: "P " in as s embly line pos ition indicates "L ead-F ree" INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE P AR T NU MB E R DAT E CODE YE AR 7 = 1997 WE E K 19 L INE C OR INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE P AR T NU MB E R DAT E CODE P = DE S IGNAT E S L E AD-F R E E P R ODU CT (OP T IONAL ) YE AR 7 = 1997 WE E K 19 A = AS S E MB L Y S IT E CODE IRL2910S/LPbF D2Pak Tape & Reel Information Dimensions are shown in millimeters (inches) TR R 1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 4 .1 0 (.1 6 1 ) 3 .9 0 (.1 5 3 ) F E E D D IR E CT IO N 1 .8 5 (.0 7 3 ) 1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 1 1 .6 0 (.4 5 7 ) 1 1 .4 0 (.4 4 9 ) 1 .6 5 (.0 6 5 ) 0 .3 6 8 (.0 1 4 5 ) 0 .3 4 2 (.0 1 3 5 ) 1 5 .4 2 (.6 0 9 ) 1 5 .2 2 (.6 0 1 ) 2 4 .3 0 (.9 5 7 ) 2 3 .9 0 (.9 4 1 ) TRL 1 .7 5 (.0 6 9 ) 1 .2 5 (.0 4 9 ) 1 0 .9 0 (.4 2 9 ) 1 0 .7 0 (.4 2 1 ) 4 .7 2 (.1 3 6 ) 4 .5 2 (.1 7 8 ) 1 6 .1 0 (.6 3 4 ) 1 5 .9 0 (.6 2 6 ) F E E D D IR E CT IO N 1 3.5 0 (.5 3 2) 1 2.8 0 (.5 0 4) 27 .4 0 (1 .0 79 ) 23 .9 0 (.94 1) 4 3 3 0 .00 (14 .1 7 3) M AX . 60 .00 (2 .36 2) M IN . N O TES : 1 . C O M F O R M S T O E IA -4 18 . 2 . C O N T R O L L IN G D IM E N S IO N : M IL LIM E T E R . 3 . D IM E N S IO N M E A S U R E D @ H U B . 4 . IN C L U D E S F L A N G E D IS T O R T IO N @ O U T E R E D G E . 3 0 .40 (1 .19 7 ) M AX . 2 6 .4 0 (1 .03 9 ) 2 4 .4 0 (.9 61 ) 3 4 Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.04/04 Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/