Semiconductor Components Industries, LLC, 2002
January, 2002 – Rev. 7 1Publication Order Number:
MC10186/D
MC10186
Hex D Master-Slave
Flip-Flop with Reset
The MC10186 contains six high–speed, master slave type “D”
flip–flops. Clocking is common to all six flip–flops. Data is entered
into the master when the clock is low. Master to slave data transfer
takes place on the positive–going Clock transition. Thus, outputs may
change only on a positive–going Clock transition. A change in the
information present at the data (D) input will not affect the output
information any other time due to the master–slave construction of this
device. A COMMON RESET IS INCLUDED IN THIS CIRCUIT.
RESET ONLY FUNCTIONS WHEN CLOCK IS LOW.
•PD = 460 mW typ/pkg (No Load)
•ftoggle = 150 MHz (typ)
•tr, tf = 2.0 ns typ (20%–80%)
LOGIC DIAGRAM
VCC = PIN 16
VEE = PIN 8
2 5
CLOCK
RESET 1
9
Q0
3 Q1
4 Q2
13 Q3
14 Q4
15 Q5
D0
6D1
7D2
10D3
11D4
D5 12
CLOCKED TRUTH TABLE
R C D Qn + 1
L L X Qn
L H* L L
L H* H H
H L X L
*A clock H is a clock transition
from a low to a high state.
http://onsemi.com
Device Package Shipping
ORDERING INFORMATION
MC10186L CDIP–16 25 Units / Rail
MC10186P PDIP–16 25 Units / Rail
MC10186FN PLCC–20 46 Units / Rail
MARKING
DIAGRAMS
1
16
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
CDIP–16
L SUFFIX
CASE 620
MC10186L
AWLYYWW
PDIP–16
P SUFFIX
CASE 648
PLCC–20
FN SUFFIX
CASE 775
10186
AWLYYWW
1
1
16
MC10186P
AWLYYWW
DIP PIN ASSIGNMENT
RESET
Q0
Q1
Q2
D0
D1
D2
VEE
VCC
Q5
Q4
Q3
D5
D4
D3
CLOCK
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables
on page 18 of the ON Semiconductor MECL Data Book
(DL122/D).
MC10186
http://onsemi.com
2
ELECTRICAL CHARACTERISTICS
Test Limits
Pin
Under
–30°C +25°C +85°C
Characteristic Symbol
U
n
d
er
Test Min Max Min Typ Max Min Max Unit
Power Supply Drain Current IE8 121 88 110 121 mAdc
Input Current IinH 5
9
1
350
495
920
220
310
575
220
310
575
µAdc
IinL 5 0.5 0.5 0.3 µAdc
Output Voltage Logic 1 VOH 2
15
–1.060
–1.060 –0.890
–0.890 –0.960
–0.960 –0.810
–0.810 –0.890
–0.890 –0.700
–0.700 Vdc
Output Voltage Logic 0 VOL 2
15
–1.890
–1.890 –1.675
–1.675 –1.850
–1.850 –1.650
–1.650 –1.825
–1.825 –1.615
–1.615 Vdc
Threshold Voltage Logic 1 VOHA 2
15
–1.080
–1.080 –0.980
–0.980 –0.910
–0.910 Vdc
Threshold Voltage Logic 0 VOLA 2
15
–1.655
–1.655 –1.630
–1.630 –1.595
–1.595 Vdc
Switching Times (50Ω Load) ns
Propagation Delay t1+3–
t1+4–
t9+2+
t9+2–
3
4
2
2
1.6
1.6
1.6
1.6
4.6
4.6
4.6
4.6
1.6
1.6
1.6
1.6
2.5
2.5
3.5
3.5
4.5
4.5
4.5
4.5
1.6
1.6
1.6
1.6
5.0
5.0
5.0
5.0
Rise Time (20 to 80%) t2+ 2 1.0 4.1 1.1 1.8 4.0 1.1 4.4
Fall Time (20 to 80%) t2– 2 1.0 4.1 1.1 1.8 4.0 1.1 4.4
Setup Time tsetup 2 2.5 2.5 2.5 2.5 ns
Hold Time thold 2 1.5 1.5 –1.5 1.5 ns
Toggle Frequency (Max) ftog 2 125 125 150 125 MHz
Output level to be measured after clock pulse. VIH
VIL appears at clock input (Pin 9).
MC10186
http://onsemi.com
3
ELECTRICAL CHARACTERISTICS (continued)
TEST VOLTAGE VALUES (Volts)
@ Test Temperature VIHmax VILmin VIHAmin VILAmax VEE
–30°C–0.890 –1.890 –1.205 –1.500 –5.2
+25°C–0.810 –1.850 –1.105 –1.475 –5.2
+85°C–0.700 –1.825 –1.035 –1.440 –5.2
Pin
Under
TEST VOLTAGE APPLIED TO PINS LISTED BELOW
(V )
Characteristic Symbol Under
Test VIHmax VILmin VIHAmin VILAmax VEE (VCC)
Gnd
Power Supply Drain Current IE8 8 16
Input Current IinH 5
9
1
5
9
1
8
8
8
16
16
16
IinL 5 5 8 16
Output Voltage Logic 1 VOH 2
155
12 8
816
16
Output Voltage Logic 0 VOL 2
155
12 8
816
16
Threshold Voltage Logic 1 VOHA 2
155
12 8
816
16
Threshold Voltage Logic 0 VOLA 2
155
12 8
816
16
Switching Times (50Ω Load) +1.11Vdc +0.31V Pulse In Pulse Out –3.2 V +2.0 V
Propagation Delay t1+3–
t1+4–
t9+2+
t9+2–
3
4
2
2
6
71, 9
1, 9
5, 9
5, 9
3
4
2
2
8
8
8
8
16
16
16
16
Rise Time (20 to 80%) t2+ 25, 9 2 8 16
Fall Time (20 to 80%) t2– 25, 9 2 8 16
Setup Time tsetup 25, 9 2 8 16
Hold Time thold 25, 9 2 8 16
Toggle Frequency (Max) ftog 2 8 16
Output level to be measured after clock pulse. VIH
VIL appears at clock input (Pin 9).
Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained.
Outputs are terminated through a 50–ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the
same manner.
MC10186
http://onsemi.com
4
PACKAGE DIMENSIONS
PLCC–20
FN SUFFIX
PLASTIC PLCC PACKAGE
CASE 775–02
ISSUE C
NOTES:
1. DATUMS -L-, -M-, AND -N- DETERMINED
WHERE TOP OF LEAD SHOULDER EXITS PLASTIC
BODY AT MOLD PARTING LINE.
2. DIMENSION G1, TRUE POSITION TO BE
MEASURED AT DATUM -T-, SEATING PLANE.
3. DIMENSIONS R AND U DO NOT INCLUDE MOLD
FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250)
PER SIDE.
4. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
5. CONTROLLING DIMENSION: INCH.
6. THE PACKAGE TOP MAY BE SMALLER THAN THE
PACKAGE BOTTOM BY UP TO 0.012 (0.300).
DIMENSIONS R AND U ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY
EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS,
GATE BURRS AND INTERLEAD FLASH, BUT
INCLUDING ANY MISMATCH BETWEEN THE TOP
AND BOTTOM OF THE PLASTIC BODY.
7. DIMENSION H DOES NOT INCLUDE DAMBAR
PROTRUSION OR INTRUSION. THE DAMBAR
PROTRUSION(S) SHALL NOT CAUSE THE H
DIMENSION TO BE GREATER THAN 0.037 (0.940).
THE DAMBAR INTRUSION(S) SHALL NOT CAUSE
THE H DIMENSION TO BE SMALLER THAN 0.025
(0.635).
–M–
–N–
–L–
Y BRK
W
V
D
D
S
L-M
M
0.007 (0.180) N S
T
S
L-M
M
0.007 (0.180) N S
T
S
L-M
S
0.010 (0.250) N S
T
XG1
B
U
Z
VIEW D–D
20 1
S
L-M
M
0.007 (0.180) N S
T
S
L-M
M
0.007 (0.180) N S
T
S
L-M
S
0.010 (0.250) N S
T
C
G
VIEW S
E
J
R
Z
A
0.004 (0.100)
–T– SEATING
PLANE
S
L-M
M
0.007 (0.180) N S
T
S
L-M
M
0.007 (0.180) N S
T
H
VIEW S
K
K1
F
G1 DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.385 0.395 9.78 10.03
B0.385 0.395 9.78 10.03
C0.165 0.180 4.20 4.57
E0.090 0.110 2.29 2.79
F0.013 0.019 0.33 0.48
G0.050 BSC 1.27 BSC
H0.026 0.032 0.66 0.81
J0.020 --- 0.51 ---
K0.025 --- 0.64 ---
R0.350 0.356 8.89 9.04
U0.350 0.356 8.89 9.04
V0.042 0.048 1.07 1.21
W0.042 0.048 1.07 1.21
X0.042 0.056 1.07 1.42
Y--- 0.020 --- 0.50
Z2 10 2 10
G1 0.310 0.330 7.88 8.38
K1 0.040 --- 1.02 ---
MC10186
http://onsemi.com
5
PACKAGE DIMENSIONS
CDIP–16
L SUFFIX
CERAMIC DIP PACKAGE
CASE 620–10
ISSUE T
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
–A–
–B–
–T–
FE
G
NK
C
SEATING
PLANE
16 PL
D
S
A
M
0.25 (0.010) T
16 PLJ
S
B
M
0.25 (0.010) T
M
L
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.750 0.785 19.05 19.93
B0.240 0.295 6.10 7.49
C--- 0.200 --- 5.08
D0.015 0.020 0.39 0.50
E0.050 BSC 1.27 BSC
F0.055 0.065 1.40 1.65
G0.100 BSC 2.54 BSC
H0.008 0.015 0.21 0.38
K0.125 0.170 3.18 4.31
L0.300 BSC 7.62 BSC
M0 15 0 15
N0.020 0.040 0.51 1.01
16 9
18
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
–A–
B
FC
S
HGD
J
L
M
16 PL
SEATING
18
916
K
PLANE
–T–
M
A
M
0.25 (0.010) T
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.740 0.770 18.80 19.55
B0.250 0.270 6.35 6.85
C0.145 0.175 3.69 4.44
D0.015 0.021 0.39 0.53
F0.040 0.70 1.02 1.77
G0.100 BSC 2.54 BSC
H0.050 BSC 1.27 BSC
J0.008 0.015 0.21 0.38
K0.110 0.130 2.80 3.30
L0.295 0.305 7.50 7.74
M0 10 0 10
S0.020 0.040 0.51 1.01
PDIP–16
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648–08
ISSUE R
MC10186
http://onsemi.com
6
Notes
MC10186
http://onsemi.com
7
Notes
MC10186
http://onsemi.com
8
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or
death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold
SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable
attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
JAPAN: ON Semiconductor, Japan Customer Focus Center
4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031
Phone: 81–3–5740–2700
Email: r14525@onsemi.com
ON Semiconductor Website: http://onsemi.com
For additional information, please contact your local
Sales Representative.
MC10186/D
Literature Fulfillment:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver , Colorado 80217 USA
Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada
Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada
Email: ONlit@hibbertco.com
N. American Technical Support: 800–282–9855 Toll Free USA/Canada
