LP3983
LP3983 Micropower, Low Quiescent Current, CMOS Voltage Regulator in micro
SMD Package
Literature Number: SNVS213
LP3983
Micropower, Low Quiescent Current, CMOS Voltage
Regulator in micro SMD Package
General Description
The LP3983 is a fixed voltage low current regulator.
The LP3983 is ideally suited to standby type applications in
battery powered equipment, it allows the lifetime of the bat-
tery to be maximized. The device can be controlled via an
Enable(disable) control and can thus be used by the system
to further extend the battery lifetime by reducing the power
consumption to virtually zero.
Performance is specified for a -40˚C to 125˚C temperature
range.
For output voltages other than those stated and alternative
package options, please contact your local NSC sales office.
Features
nMiniature 5 pin package
nLogic Controlled Enable
nNo Noise Bypass Capacitor Required
nStable with Low ESR Ceramic Capacitors
nFast turn ON
nShort Circuit Protection
Package
nTiny 5 Pin micro SMD 828µm by 1387µm
Key Specifications
nInput Voltage Range 2.5 to 6.0V
nOutput Voltages 1.6, 1.8, & 2.5
nOutput Current 5mA
nOutput Capacitors 1µF Low ESR
nVirtually Zero I
Q
(Disabled) 1.0µA
nLow I
Q
(Enabled) 14µA
nPSRR 10dB
nFast Start Up 170µs
Applications
nGSM Portable Phones
nCDMA Cellular Handsets
nBluetooth Devices
nPortable Information Appliances
Typical Application Circuit
20057601
May 2003
LP3983 Micropower, Low Quiescent Current, CMOS Voltage Regulator in micro SMD Package
© 2003 National Semiconductor Corporation DS200576 www.national.com
Block Diagram
LP3983
20057602
Connection Diagrams
5 Pin micro SMD Package 5 Pin micro SMD Package
20057603
Top View
See NS Package Number TLA05
20057604
Bottom View
See NS Package Number TLA05
LP3983
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Pin Descriptions
Name Pin No. Name and Function
V
EN
A1 Enable Input Logic,
Enables regulator when ≥1.2V. Disables regulator when ≤0.5V
GND B2 Common Ground
V
OUT
C1 Voltage Output. Connect this Output to the Load Circuit.
V
IN
C3 Unregulated supply Input.
N/C A3 No Connection. There should be no electrical connection made to
this pin.
Ordering Information
TL refers as 0.300mm bump size with package height of 0.6mm
Output
Voltage (V) Grade LP3983 Supplied as 250
Units, Tape and Reel
LP3983 Supplied as 3000
Units, Tape and Reel
1.6 STD LP3983ITL-1.6 LP3983ITLX-1.6
1.8 STD LP3983ITL-1.8 LP3983ITLX-1.8
2.5 STD LP3983ITL-2.5 LP3983ITLX-2.5
* Please contact National Semiconductor for availability
LP3983
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Absolute Maximum Ratings (Notes 1,
2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
V
IN
−0.3 to 6.5V
V
EN
−0.3 to (V
IN
+ 0.3V) to
6.5V(max)
V
OUT
−0.3V to(V
IN
+ 0.3V) to
6.5V(max)
Junction Temperature 150˚C
Storage Temperature −65˚C to +150˚C
Pad Temperature
(Soldering, 10 sec.)
265˚C
ESD (Note 4)
Human Body Model 2KV
Machine Model 100V
Operating Ratings (Notes 1, 2)
V
IN
(Note 9) V
IN(MIN)
to 6V
V
EN
, 0 to 6.0V
Recommended Load Current 0 to 5mA
Junction Temperature −40˚C to +125˚C
Ambient Temperature
(Note 3)
−40˚C to +119˚C
Thermal Properties (Note 3)
Junction to Ambient Thermal
Resistance (θ
JA
)
255˚C/W
Electrical Characteristics
Unless otherwise specified: V
EN
= 1.8V,V
IN
=V
OUT(nom)
+ 1.0V, C
IN
= 1.0 µF, I
OUT
= 1.0mA, C
OUT
= 1.0 µF. Typical values
and limits appearing in standard typeface are for T
J
= 25˚C. Limits appearing in boldface type apply over the entire junction
temperature range for operation, −40˚C to +125˚C. (Note 10) (Note 11)
Symbol Parameter Conditions Typ Limit Units
Min Max
∆V
OUT
Output Voltage
Tolerance
I
OUT
= 0mA to 5mA -55 +55 mV from
V
OUT(nom)
-96 +96
−6 +6 %of
V
OUT(nom)
PSRR Power Supply Rejection
Ratio
V
IN
=V
OUT(nom)
+ 1V,
f≤10 kHz, I
OUT
= 1mA 10 dB
I
Q
Quiescent Current I
OUT
= 50µA, V
IN
= 4.2V 14 21 µA
V
EN
= 0.4V, V
IN
= 4.2V 1 3
I
SC
Short Circuit Current
Limit (Note 7)
Output Grounded 28 35 mA
I
OUT
Maximum Output
Current (Note 6) 5mA
Logic Control Characteristics
I
EN
Maximum Input Current
at V
EN
input
V
EN
= 0.4 and V
IN
= 6.0V 0.02 µA
V
IL
Logic Low Input
Threshold
V
IN
=V
IN(MIN)
to 6.0V 0.5 V
V
IH
Logic High Input
Threshold
V
IN
=V
IN(MIN)
to 6.0V 1.2 V
Timing Characteristics
T
ON
Turn on Time(Note 7) (Note 8) 170 250 µs
Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device
is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical
Characteristics tables.
Note 2: All voltages are with respect to the potential at the GND pin.
Note 3: The maximum ambient temperature (TA(max)) is dependant on the maximum operating junction temperature (TJ(max-op) = 125˚C), the maximum power
dissipation of the device in te application (PD(max)), and the junction to ambient thermal resistance of the part/package in the application (θJA), as given by the
following equation: TA(max) =T
J(max-op) -(θJA xP
D(max)).
Note 4: The human body model is 100pF discharged through a 1.5kΩresistor into each pin. The machine model is a 200pF capacitor discharged directly into each
pin.
Note 5: Junction to ambient thermal resistance is dependant on the application and board layout. In applications where high maximum power dissipation is possible,
special care must be paid to thermal dissipation issues in board design.
Note 6: The device maintains the regulated output voltage without load.
LP3983
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Electrical Characteristics (Continued)
Note 7: This electrical specification is guaranteed by design.
Note 8: Time from VEN = 1.2V to VOUT = 95% of VOUT(NOM)
Note 9: The minimum VIN is dependant on the device output option.
For VOUT(NOM) ≤2.7V, VIN(MIN) will equal 2.5V. For VOUT(NOM) >2.7V, VIN(MIN) will equal VOUT(NOM) + 200mV.
Note 10: All limits are guaranteed. All electrical characteristics having room-temperature limits are tested during production with TJ= 25˚C or correlated using
Statistical Quality Control methods. Operation over the temperature specification is guaranteed by correlating the electrical characteristics to process and
temperature variations and applying statistical process control.
Note 11: The target output voltage which is labelled VOUT(NOM) is the desired voltage option.
Output Capacitor, Recommended Specifications
Symbol Parameter Conditions Value Limit Units
Min Max
C
o
Output Capacitor Capacitance(Note 12) 1.0 0.75 µF
ESR 5 500 mΩ
Note 12: The capacitor tolerance should be ±25% or better over the temperature range. Capacitor types recommended are X7R, Y5V, and Z5U.
LP3983
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Typical Performance Characteristics Unless otherwise specified, C
IN
=C
OUT
= 1 µF Ceramic, V
IN
=V
OUT(nom)
+ 1.0V, T
A
= 25˚C, Enable pin is tied to V
IN
.
Ground Current @T
A
= 25˚C Ground Current vs V
IN
.I
OUT
= 7mA
20057626 20057628
Ripple Rejection (C
IN
=C
OUT
= 1µF, I
L
= 100µA) Start Up Time. V
OUT
= 1.8V
20057627
20057608
Turn-Off Time. V
OUT
= 1.8V Load Transient Response. V
OUt
= 1.8V
20057615 20057616
LP3983
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Typical Performance Characteristics Unless otherwise specified, C
IN
=C
OUT
= 1 µF Ceramic, V
IN
=
VOUT(nom) + 1.0V, T
A
= 25˚C, Enable pin is tied to V
IN
. (Continued)
Line Transient Response
20057636
LP3983
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Application Hints
POWER DISSIPATION AND DEVICE OPERATION
The permissible power dissipation for any package is a
measure of the capability of the device to pass heat from the
power source, the junctions of the IC, to the ultimate heat
sink, the ambient environment. Thus the power dissipation is
dependent on the ambient temperature and the thermal
resistance across the various interfaces between the die and
ambient air.
As stated in note 3 in the electrical specification section, the
allowable power dissipation for the device in a given pack-
age can be calculated using the equation
P
D
=(T
J
-T
A
)/θ
JA
With a θ
JA
= 255˚C/W, the device in the micro SMD package
returns a value of 392mW with a maximum junction tempera-
ture of 125˚C and an ambient temperature of 25˚C. The
actual power dissipation across the device can be repre-
sented by the following equation;
P
D
=(V
IN
-V
OUT
)*I
OUT
This establishes the relationship between the power dissipa-
tion allowed due to thermal considerations, the voltage drop
across the device, and the continuous current capability of
the device. These two equations should be used to deter-
mine the optimum operating conditions for the device in the
application.
EXTERNAL CAPACITORS
In common with most low-dropout regulators, the LP3983
requires external capacitors to ensure stable operation. The
LP3983 is specifically designed for portable applications
requiring minimum board space and smallest components.
These capacitors must be correctly selected for good perfor-
mance.
INPUT CAPACITOR
An input capacitor is required for stability. It is recommended
that a 1.0uF capacitor be connected between the LP3983
input pin and ground (this capacitance value may be in-
creased without limit).
This capacitor must be located a distance of not more than
1cm from the input pin and returned to a clean analog
ground. Any good quality ceramic, tantalum, or film capacitor
may be used at the input.
Important: Tantalum capacitors can suffer catastrophic fail-
ures due to surge current when connected to a low-
impedance source of power (like a battery or a very large
capacitor). If a tantalum capacitor is used at the input, it must
be guaranteed by the manufacturer to have a surge current
rating sufficient for the application.
There are no requirements for the ESR (Equivalent Series
Resistance) on the input capacitor, but tolerance and tem-
perature coefficient must be considered when selecting the
capacitor to ensure the capacitance will be )1µF over the
entire operating temperature range.
OUTPUT CAPACITOR
The LP3983 is designed specifically to work with very small
ceramic output capacitors. A ceramic capacitor (dielectric
types Z5U, Y5V or X7R), recommended value 2.2µF and
with ESR between 5mΩto 500mΩ, is suitable in the LP3983
application circuit.
For this device the output capacitor should be connected
between the VOUT pin and ground.
It may also be possible to use tantalum or film capacitors at
the output, but these are not as attractive for reasons of size
and cost (see the section Capacitor Characteristics).
NO-LOAD STABILITY
The LP3983 will remain stable and in regulation with no
external load. This is specially important in CMOS RAM
keep-alive applications.
CAPACITOR CHARACTERISTICS
The LP3983 is designed to work with ceramic capacitors on
the output to take advantage of the benefits they offer. For
capacitance values in the range of 1µF to 4.7µF range,
ceramic capacitors are the smallest, least expensive and
have the lowest ESR values (which makes them best for
eliminating high frequency noise). The ESR of a typical 1µF
ceramic capacitor is in the range of 20 mΩto 40 mΩ, which
easily meets the ESR requirement for stability by the
LP3983.
The temperature performance of ceramic capacitors varies
by type. Larger value ceramic capacitors may be manufac-
tured with Z5U or Y5V temperature characteristics, which
results in the capacitance dropping by more than 50% as the
temperature goes from 25˚C to 85˚C.
A better choice for temperature coefficient in a ceramic
capacitor is X7R, which holds the capacitance within ±15%
over the temperature range. Tantalum capacitors are less
desirable than ceramic for use as output capacitors because
they are more expensive when comparing equivalent capaci-
tance and voltage ratings in the 1µF to 4.7µF range.
Another important consideration is that tantalum capacitors
have higher ESR values than equivalent size ceramics. This
means that while it may be possible to find a tantalum
capacitor with an ESR value within the stable range, it would
have to be larger in capacitance (which means bigger and
more costly ) than a ceramic capacitor with the same ESR
value. It should also be noted that the ESR of a typical
tantalum will increase about 2:1 as the temperature goes
from 25˚C down to −40˚C, so some guard band must be
allowed.
ENABLE OPERATION
The LP3983 may be switched ON or OFF by a logic input at
the ENABLE pin, V
EN
. A high voltage at this pin will turn the
device on. When the enable pin is low, the regulator output is
off and the device typically consumes <1µA. If the applica-
tion does not require the shutdown feature, the V
EN
pin
should be tied to V
IN
to keep the regulator output perma-
nently on. To ensure proper operation, the signal source
used to drive the V
EN
input must be able to swing above and
below the specified turn-on/off voltage thresholds listed in
the Electrical Characteristics section under V
IL
and V
IH
.
MICRO SMD MOUNTING
The micro SMD package requires specific mounting tech-
niques which are detailed in National Semiconductor Appli-
cation Note (AN-1112).
Referring to the section Surface Mount Technology (SMT)
Assembly Considerations, it should be noted that the pad
style which must be used with the 5 pin package is NSMD
(non-solder mask defined) type.
For best results during assembly, alignment ordinals on the
PC board may be used to facilitate placement of the micro
SMD device.
LP3983
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Application Hints (Continued)
MICRO SMD LIGHT SENSITIVITY
Exposing the micro SMD device to direct sunlight may cause
mis-operation of the device. Light sources such as Halogen
lamps can effect electrical performance if brought near to the
device.
Light with wavelengths in the red and infra-red part of the
spectrum have the most detrimental effect thus the fluores-
cent lighting used inside most buildings has very little effect
on the output voltage of the device. Tests carried out on a
micro SMD test board showed a negligible effect on the
regulated output voltage when brought within 1cm of a fluo-
rescent lamp. A deviation of less than 0.1% from nominal
output voltage was observed.
LP3983
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Physical Dimensions inches (millimeters) unless otherwise noted
micro SMD, 5 Bump, Package (TLA05)
NS Package Number TLA05ADA
The dimensions for X1, X2 and X3 are given as:
X1 = 1006 +/− 0.03mm
X2 = 1438 +/− 0.03mm
X3 = 0.600 +/− 0.075mm
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LP3983 Micropower, Low Quiescent Current, CMOS Voltage Regulator in micro SMD Package
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