2002 Microchip Technology Inc. DS21733C-page 1
MMCP6001/2/4
Features
• Available in SC-70-5 and SOT-23-5 packages
• 1 MHz Gain Bandwidth Product (typ.)
• Rail-to-Rail Input/Output
• Supply Voltage: 1.8V to 5.5V
• Supply Current: IQ = 100 µA (typ.)
• 90° Phase Margin (typ.)
• Industrial Temperature Range: -40°C to +85°C
• Available in Single, Dual and Quad Packages
Applications
• Portable Equipment
• Photodiode Pre-amps
• Analog Filters
• Notebooks and PDAs
• Battery-Powered Systems
Available Tools
Spice Macromodels (at www.microchip.com)
FilterLab® Software (at www.microchip.com)
Typical Application
Description
The Microchip Technology Inc. MCP6001/2/4 family of
operational amplifiers (op amps) is specifically
designed for general-purpose applications. This family
has a 1 MHz gain bandwidth product and 90° phase
margin (typ.). It also maintains 45° phase margin (typ.)
with 500 pF capacitive load. This family operates from
a single supply voltage as low as 1.8V, while drawing
100 µA (typ.) quiescent current. In addition, the
MCP6001/2/4 supports rail-to-rail input and output
swing, with a common mode input voltage range of
VDD + 300 mV to VSS - 300 mV. This family of opera-
tional amplifiers is designed with Microchip’s
advanced CMOS process.
The MCP6001/2/4 family is specified from -40°C to
+85°C, with a power supply range of 1.8V to 5.5V.
Package Types
R1
VOUT
R2
VIN
VDD
+
-
Gain 1 R1
R2
------
+=
Non-Inverting Amplifier
1
5
2
3
4MCP6001
VREF
VSS
4
MCP6001
1
2
3
-
+
5VDD
VIN-
VOUT
VSS
VIN+
SC-70-5, SOT-23-5
MCP6002
PDIP, SOIC, MSOP
MCP6004
VINA+
VINA-
VSS
1
2
3
4
14
13
12
11
-
VOUTA
+-
+
AD
VDD
VOUTD
VIND-
VIND+
10
9
8
5
6
7
VOUTB
VINB-
VINB+ VINC+
VINC-
VOUTC
+
-BC
-
+
PDIP, SOIC, TSSOP
VINA+
VINA-
VSS
1
2
3
4
8
7
6
5
-
VOUTA
+-
+
A
B
VDD
VOUTB
VINB-
VINB+
4
1
2
3
-
+
5VDD
VIN-
VOUT
VSS
VIN+
MCP6001R
SOT-23-5
4
1
2
3
-
+
5VSS
VIN-
VOUT
VDD
VIN+
MCP6001U
SOT-23-5
4
1
2
3
-
+
5VDD
VOUT
VIN+
VSS
VIN-
1 MHz Bandwidth Low Power Op Amp
MCP6001/2/4
DS21733C-page 2 2002 Microchip Technology Inc.
1.0 ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings †
VDD - VSS .........................................................................7.0V
All Inputs and Outputs ...................... VSS -0.3V to VDD +0.3V
Difference Input Voltage ....................................... |VDD - VSS|
Output Short Circuit Current ..................................continuous
Current at Input Pins ....................................................±2 mA
Current at Output and Supply Pins ............................±30 mA
Storage Temperature ....................................-65°C to +150°C
Junction Temp. (TJ) ........ ............................................+150°C
ESD Protection On All Pins (HBM/MM) ................ ≥ 4kV/200V
† Notice: Stresses above those listed under “Maximum Rat-
ings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied. Expo-
sure to maximum rating conditions for extended periods may
affect device reliability.
PIN FUNCTION TABLE
DC ELECTRICAL SPECIFICATIONS
Name Function
VIN+/VINA+/VINB+/VINC+/VIND+ Non-inverting Inputs
VIN-/VINA-/VINB-/VINC-/VIND- Inverting Inputs
VDD Positive Power Supply
VSS Negative Power Supply
VOUT/VOUTA/VOUTB/VOUTC/VOUTD Outputs
Electrical Characteristics: Unless otherwise indicated, TA = 25°C, VDD = +1.8V to +5.5V, VSS = GND,
VCM = VDD/2, RL = 10 kΩ to VDD/2, and VOUT ~V
DD/2.
Parameters Sym Min Typ Max Units Conditions
Input Offset
Input Offset Voltage VOS -7.0 — +7.0 mV VCM = VSS
Input Offset Voltage Drift with
Temperature
∆VOS/∆T— ±2.0 — µV/°CT
A= -40°C to +85°C,
VCM = VSS
Power Supply Rejection PSRR — 86 — dB VCM = VSS
Input Bias Current and Impedance
Input Bias Current IB—±1.0—pA
Input Bias Current IB—19—pAT
A = +85°C
Input Offset Current IOS —±1.0—pA
Common Mode Input Impedance ZCM —10
13||6 — Ω||pF
Differential Input Impedance ZDIFF —10
13||3 — Ω||pF
Common Mode
Common Mode Input Range VCMR VSS − 0.3 — VDD + 0.3 V
Common Mode Rejection Ratio CMRR 60 76 — dB VCM = -0.3V to 5.3V, VDD = 5V
Open Loop Gain
DC Open-Loop Gain
(large signal)
AOL 88 112 — dB VOUT = 0.3V to VDD - 0.3V,
VCM =V
SS
Output
Maximum Output Voltage Swing VOL, VOH VSS + 25 — VDD − 25 mV VDD = 5.5V
Output Short-Circuit Current ISC —±23—mAV
DD = 5.5V
Power Supply
Supply Voltage VDD 1.8 — 5.5 V
Quiescent Current per Amplifier IQ50 100 170 µA IO = 0, VDD = 5.5V, VCM = 5V
2002 Microchip Technology Inc. DS21733C-page 3
MCP6001/2/4
AC ELECTRICAL SPECIFICATIONS
TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = 25°C, VDD = +5.0V, VSS = GND, VCM = VDD/2,
VOUT ~V
DD/2, RL = 10 kΩ to VDD/2, and CL = 60 pF.
Parameters Sym Min Typ Max Units Conditions
AC Response
Gain Bandwidth Product GBWP — 1.0 — MHz
Phase Margin at Unity Gain PH — 90 — degrees G = +1
Slew Rate SR — 0.6 — V/µs
Noise
Input Noise Voltage Eni — 6.0 — µVp-p f = 0.1 Hz to 10 Hz
Input Noise Voltage Density eni —28—nV/√Hz f = 1 kHz
Input Noise Current Density ini —0.6—fA/√Hz f = 1 kHz
Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +5.5V, and VSS = GND.
Parameters Sym Min Typ Max Units Conditions
Temperature Ranges
Specified Temperature Range TA-40 — +85 °C
Operating Temperature Range TA-40 — +125 °C (Note)
Storage Temperature Range TA-65 — +150 °C
Thermal Package Resistances
Thermal Resistance, 5L-SC70 θJA —331 —°C/W
Thermal Resistance, 5L-SOT-23 θJA —256 —°C/W
Thermal Resistance, 8L-PDIP θJA —85—°C/W
Thermal Resistance, 8L-SOIC (150 mil) θJA — 163 — °C/W
Thermal Resistance, 8L-SOIC (208 mil) θJA —118—°C/W
Thermal Resistance, 8L-MSOP θJA — 206 — °C/W
Thermal Resistance, 14L-PDIP θJA —70 —°C/W
Thermal Resistance, 14L-SOIC θJA —120 —°C/W
Thermal Resistance, 14L-TSSOP θJA —100 —°C/W
Note: The MCP6001/2/4 operates over this extended temperature range, but with reduced performance. In any
case, the Junction Temperature (TJ) must not exceed the Absolute Maximum specification of +150°C.
MCP6001/2/4
DS21733C-page 4 2002 Microchip Technology Inc.
2.0 TYPICAL PERFORMANCE CURVES
Note: Unless otherwise indicated, TA = 25°C, VDD = +5.0V, VSS = GND, VCM = VDD/2, VOUT ~V
DD/2, RL = 10 kΩ to VDD/2, and
CL = 60 pF.
FIGURE 2-1: Histogram of Input Offset
Voltage with VCM = VSS.
FIGURE 2-2: Common Mode Rejection
Ratio, Power Supply Rejection Ratio vs.
Frequency.
FIGURE 2-3: Input Bias Current
Histogram with Temperature = 85°C.
FIGURE 2-4: Common Mode Rejection
Ratio, Power Supply Rejection Ratio vs.
Temperature.
FIGURE 2-5: Open-Loop Gain, Phase vs.
Frequency.
FIGURE 2-6: Input Bias Current
Histogram with Temperature = 125°C.
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
0%
2%
4%
6%
8%
10%
12%
14%
16%
18%
20%
22%
-7
-6
-4
-3
-1
1
2
4
5
7
Input Offset Voltage (mV)
Percentage of Occurrences
1225 Samples
VCM = VSS
20
30
40
50
60
70
80
90
100
10 100 1000 10000 100000
Frequency (Hz)
PSRR, CMRR (dB)
PSRR+
CMRR
PSRR-
VCM = VSS
10 100 1k 10k 100k
0%
2%
4%
6%
8%
10%
12%
14%
0
3
6
9
12
15
18
21
24
27
30
Input Bias Current (pA)
Percentage of Occurrences
1230 Samples
VDD = 5.5 V
VCM = VDD
TA = +85°C
70
80
90
100
-40-20 0 20406080100120
Ambient Temperature (°C)
CMRR, PSRR (dB)
PSRR (VCM = VSS)
CMRR (VCM = -0.3 V to +5.3 V)
-20
0
20
40
60
80
100
120
0
1
10
100
1000
10000
100000
1000000
10000000
Frequency (Hz)
Open-Loop Gain (dB)
-210
-180
-150
-120
-90
-60
-30
0
Open-Loop Phase (°)
Phase
Gain
VCM = VSS
10
100
1M
10M
1k
100
10
1
0.1
0%
10%
20%
30%
40%
50%
60%
70%
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
Input Bias Current (nA)
Percentage of Occurrences
1210 Samples
VDD = 5.5V
VCM = VDD
TA = +125°C
2002 Microchip Technology Inc. DS21733C-page 5
MCP6001/2/4
Note: Unless otherwise indicated, TA = 25°C, VDD = +5.0V, VSS = GND, VCM = VDD/2, VOUT ~V
DD/2, RL = 10 kΩ to VDD/2, and
CL = 60 pF.
FIGURE 2-7: Input Noise Voltage Density
vs. Frequency.
FIGURE 2-8: Input Offset Voltage vs.
Common Mode Input Voltage vs. Temperature
with VDD = 1.8V.
FIGURE 2-9: Input Offset Voltage vs.
Common Mode Input Voltage vs. Temperature
with VDD = 5.5V.
FIGURE 2-10: Histogram of Input Offset
Voltage Drift with VCM = VSS.
FIGURE 2-11: Input Offset Voltage vs.
Output Voltage vs. Power Supply Voltage.
FIGURE 2-12: Output Short-Circuit Current
vs. Temperature vs. Power Supply Voltage.
10
100
1,000
1.E-01 1.E+00 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05
Frequency (Hz)
Input Noise Voltage Density
(nV/Hz)
E
ni
= 6.1 µVp-p, f = 0.1 to 10 Hz
0.1 101 100 10k
1k 100k
-700
-600
-500
-400
-300
-200
-100
0
-0.4
-0.2
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
Common Mode Input Voltage (V)
Input Offset Voltage (µV)
VDD = 1.8 V
TA = -40°C
TA = +25°C
TA = +85°C
TA = +125°C
-700
-600
-500
-400
-300
-200
-100
0
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Common Mode Input Voltage (V)
Input Offset Voltage (µV)
VDD = 5.5 V
TA = -40°C
TA = +25°C
TA = +85°C
TA = +125°C
0%
2%
4%
6%
8%
10%
12%
14%
16%
18%
-13
-11
-9
-7
-5
-3
-1
1
3
5
7
9
11
13
Input Offset Voltage Drift (µV/°C)
Percentage of Occurrences
1225 Samples
VCM = VSS
TA = -40°C to +125°C
-200
-150
-100
-50
0
50
100
150
200
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Output Voltage (V)
Input Offset Voltage (µV)
VDD = 1.8 V
VCM = VSS
VDD = 5.5 V
0
5
10
15
20
25
30
35
-40 -20 0 20 40 60 80 100 120
Ambient Temperature (°C)
Output Short-Circuit Curren
t
(mA)
-ISC, VDD = 1.8 V
+ISC, VDD = 1.8 V
+ISC, VDD = 5.5 V
-ISC, VDD = 5.5 V
MCP6001/2/4
DS21733C-page 6 2002 Microchip Technology Inc.
Note: Unless otherwise indicated, TA = 25°C, VDD = +5.0V, VSS = GND, VCM = VDD/2, VOUT ~V
DD/2, RL = 10 kΩ to VDD/2, and
CL = 60 pF.
FIGURE 2-13: Slew Rate vs. Temperature
vs. Power Supply Voltage.
FIGURE 2-14: Output Voltage Headroom
vs. Output Current Magnitude.
FIGURE 2-15: Output Voltage Swing vs.
Frequency vs. Power Supply Voltage.
FIGURE 2-16: Small Signal Non-Inverting
Pulse Response.
FIGURE 2-17: Large Signal Non-Inverting
Pulse Response.
FIGURE 2-18: Quiescent Current vs.
Power Supply Voltage vs. Temperature.
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
-40-20 0 20406080100120
Ambient Temperature (°C)
Slew Rate (V/µs)
Falling Edge, VDD = 5.0 V
Rising Edge, VDD = 5.0 V
Rising Edge, VDD = 1.8 V
Falling Edge, VDD = 1.8 V
1
10
100
1,000
1.E-05 1.E-04 1.E-03 1.E-02
Output Current Magnitude (A)
Output Voltage Headroom (mV)
VDD - VOH
10µ 10m1m100µ
VOL - VSS
0.1
1
10
1000 10000 100000 1000000
Frequency (Hz)
Output Voltage Swing (Vp-p)
VDD = 5.5 V
1k 10k 100k 1M
VDD = 1.8 V
-0.08
-0.06
-0.04
-0.02
0.00
0.02
0.04
0.06
0.08
0.E+0 0 1.E- 06 2 .E- 06 3 .E- 06 4.E- 06 5 .E- 06 6 .E- 06 7.E- 06 8 .E- 06 9 .E- 06 1.E- 05
Time (1 µs/div)
Output Voltage (20 mV/div)
G = +1 V/V
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
0.E+00 1.E-05 2.E-05 3.E-05 4.E-05 5.E-05 6.E-05 7.E-05 8.E-05 9.E-05 1.E-04
Time (10 µs/div)
Output Voltage (V)
G = +1 V/V
0
20
40
60
80
100
120
140
160
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Power Supply Voltage (V)
Quiescent Current Per Amplifier
(µA)
TA = +85°C
TA = +25°C
TA = -40°C
VCM = VDD-0.5
TA = +125°C
2002 Microchip Technology Inc. DS21733C-page 7
MCP6001/2/4
3.0 APPLICATION INFORMATION
The MCP6001/2/4 family of op amps is manufactured
using Microchip’s state-of-the-art CMOS process and
is specifically designed for low cost, low power and
general-purpose applications. The low supply voltage,
low quiescent current and wide bandwidth makes the
MCP6001/2/4 ideal for battery-powered applications.
This device has high phase margin which makes it
stable for larger capacitive load applications.
3.1 Rail-to-Rail Input
The input stage of the MCP6001/2/4 op amp uses two
differential input stages in parallel; one operates at low
common mode input voltage (VCM) and the other at
high VCM. With this topology, the device operates with
VCM up to 300 mV above VDD and 300 mV below VSS.
The Input Offset Voltage is measured at
VCM =V
SS - 300 mV and VDD + 300 mV to ensure
proper operation.
3.2 Rail-to-Rail Output
The output voltage range of the MCP6001/2/4 op amp
is VDD - 25 mV (min.) and VSS + 25 mV (max.) when
RL=10kΩ is connected to VDD/2 and VDD = 5.5V.
Refer to Figure 2-14 for more information.
3.3 Phase Reversal and Input Voltage
The MCP6001/2/4 op amp is designed to prevent
phase reversal when the input pins exceed the supply
voltages. Figure 3-1 shows the input voltage exceeding
the supply voltage without any phase reversal. This
graph is created with a non-inverting circuit
configuration in a gain of +2 V/V.
FIGURE 3-1: The MCP6001/2/4 Shows
No Phase Reversal.
The maximum operating VCM that can be applied to the
inputs is VSS - 300 mV (min.) and VDD + 300 mV
(max.). Input voltages that exceed this absolute maxi-
mum rating can cause excessive current to flow into or
out of the input pins. Current beyond ±2 mA can cause
reliability problems. Applications that exceed this rating
must be externally limited with a resistor, as shown in
Figure 3-2.
FIGURE 3-2: Input Current Limiting
Resistor (RIN).
3.4 Capacitive Load and Stability
Capacitive loads can cause stability problems with volt-
age feedback op amps. A buffer configuration (G = +1)
is the most sensitive to capacitive loads. Figure 3-3
shows how increasing the load capacitance will
decrease the phase margin and reduce the bandwidth.
A phase margin of 60° has minimum overshoot, how-
ever, a 45° has over 25% overshoot on the step
response.
The MCP6001/2/4 op amp has a phase margin of 90°
(typ.) under the specified conditions in the AC electrical
specifications table. The device maintains greater than
60° phase margin (typ.), with 200 pF capacitive load.
The device also maintains stability at 45° phase margin
(typ.), with 500 pF capacitive load, as shown in
Figure 3-3.
FIGURE 3-3: Gain Bandwidth Product,
Phase Margin vs. Load Capacitance with Unity
Gain.
When the MCP6001/2/4 op amp is required to drive
large capacitive loads, a series resistor (RISO in
Figure 3-4) at the output of the amplifier improves the
phase margin. This resistor makes the output load
resistive at higher frequencies. However, the band-
width reduction caused by the capacitive load is not
changed. To select RISO, use the SPICE macro model
starting with 1 kΩ and adjust the resistor until the fre-
quency response shows low peaking.
-1
0
1
2
3
4
5
6
0.E+0 0 1.E-04 2.E-04 3.E- 04 4.E-04 5.E- 04 6 .E- 04 7.E-04 8.E- 04 9 .E- 04 1.E- 03
Time (1000 µs/div)
Input, Output Voltages (V)
VDD = 5.0 V
G = +2 V/V
VIN
VOUT
RIN
VSS Minimum expected VIN
()–
2 mA
----------------------------------------------------------------------------≥
RIN
Maximum expected VIN
()VDD
–
2 mA
-------------------------------------------------------------------------------≥
VIN
RIN VOUT
MCP600X
–
+
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
1.E-11 1.E-10 1.E-09
Load Capacitance (F)
Unity Loop Gain Frequency
(MHz)
0
10
20
30
40
50
60
70
80
90
100
Phase Margin (°)
Unity Loop Gain Frequency
Phase Margin
10p 1n
100p
G = +1 V/V
VDD = 5.0 V
RL = 100 k:
MCP6001/2/4
DS21733C-page 8 2002 Microchip Technology Inc.
FIGURE 3-4: Amplifier Circuit for Heavy
Capacitive Loads.
3.5 Application Circuits
3.5.1 UNITY GAIN BUFFER
The rail-to-rail input and output capability of the
MCP6001/2/4 op amp is ideal for unity gain buffer
applications. The low quiescent current and wide band-
width makes the device suitable for a buffer configura-
tion in an instrumentation amplifier circuit, as shown in
Figure 3-5.
FIGURE 3-5: Instrumentation Amplifier
with Unity Gain Buffer Inputs.
3.5.2 ACTIVE LOW-PASS FILTER
The MCP6001/2/4 op amp’s low input bias current
makes it possible for the designer to use larger resis-
tors and smaller capacitors for active low-pass filter
applications. However, as the resistances increase, the
noise generated also increases. Parasitic capacitances
and the large value resistors could also modify the fre-
quency response. These trade-offs need to be
considered when selecting circuit elements.
It is possible to have a filter cutoff frequency as high as
1/10th of the op amp bandwidth, or 100 kHz. Figure 3-6
shows a second-order butterworth filter with 100 kHz
cutoff frequency and a gain of +1 V/V.
FIGURE 3-6: Active Second Order Low
Pass Filter.
The component values in Figure 3-6 are selected using
Microchip’s FilterLab® software, which is a tool that
simplifies active filter design. This tool provides sche-
matic diagrams of filter circuits (up to the 8th order) with
resistor and capacitor values, and displays the
frequency response.
FilterLab software can be downloaded, free of charge,
from the Microchip web site (www.microchip.com).
VIN
RISO
VOUT
MCP600X
CL
–
+
VIN1
R2
MCP6002
VIN2
R2
MCP6002
VREF
MCP6001
VOUT
R1
R1
-
+
-
+
-
+
1/2
1/2
VOUT VIN2 VIN1
–()
R1
R2
------•VREF
+=
R1 = 20 kΩ
R2 = 10 kΩ
14.3 kΩ
MCP6002
VOUT
53.6 kΩ
100 pF
VIN
33 pF
+
-
2002 Microchip Technology Inc. DS21733C-page 9
MCP6001/2/4
3.5.3 PEAK DETECTOR
The MCP6001/2/4 op amp has a high input impedance,
rail-to-rail input and output and low input bias current,
which makes this device suitable for a peak detector
application. Figure 3-7 shows a peak detector circuit
with clear and sample switches. The peak-detection
cycle uses a clock (CLK), as shown in Figure 3-7.
At the rising edge of CLK, Sample Switch closes to
begin sampling. The peak voltage stored on C1 is sam-
pled to C2 for a sample time defined by tSAMP. At t he
end of the sample time (falling edge of Sample Signal),
Clear Signal goes high and closes the Clear Switch.
When the Clear Switch closes, C1 discharges through
R1 for a time defined by tCLEAR. At the end of the clear
time (falling edge of Clear Signal), op amp A begins to
store the peak value of VIN on C1 for a time defined by
tDETECT.
In order to define the tSAMP and tCLEAR, it is necessary
to determine the capacitor charging and discharging
period. The capacitor charging time is limited by the
amplifier source current, while the discharging time (τ)
is defined using R1 (τ = R1*C1). tDETECT is the time that
the input signal is sampled on C1, and is dependent on
the input voltage change frequency.
The op amp output current limit, and the size of the
storage capacitors (both C1 and C2), could create slew-
ing limitations as the input voltage (VIN) increases. Cur-
rent through a capacitor is dependent on the size of the
capacitor and the rate of voltage change. From this
relationship, the rate of voltage change or the slew rate
can be determined. For example, with op amp short-cir-
cuit current of ISC = 25 mA and load capacitor of
C1= 0.1 µF, then:
EQUATION
This voltage change rate is less than the MCP6001/2/4
slew rate of 600 mV/µs. When the input voltage swings
below the voltage across C1, D1 becomes reverse-
biased, which opens the feedback loop and rails the
amplifier. When the input voltage increases, the ampli-
fier recovers at its slew rate. Based on the rate of volt-
age change shown in the above equation, it takes an
extended period of time to charge a 0.1 µF capacitor.
The capacitors need to be selected so that the circuit is
not limited by the amplifier slew rate. Therefore, the
capacitors should be less than 40 µF and a stabilizing
resistor (RISO) needs to be properly selected. Refer to
Section 3.4, “Capacitive Load and Stability”, for op amp
stability.
FIGURE 3-7: Peak Detector with Clear and Sample CMOS Analog Switches.
dVC1
dt
-------------ISC
C1
--------
=
25mA
0.1µF
---------------
=
dVC1
dt
-------------250mV
µs
-----------------
=
ISC C1
dVC1
dt
-------------×=
VIN
MCP6002
VC1
MCP6002
D1
AB
VOUT
MCP6001
C
C2
Sample Signal
Clear Signal
Clear
RISO
Sample
–
+
–
+
–
+
CLK
tSAMP
tCLEAR
tDETECT
Switch
Switch
1/2
1/2
R1
RISO VC2
C1
MCP6001/2/4
DS21733C-page 10 2002 Microchip Technology Inc.
4.0 SPICE MACRO MODEL
The Spice macro model for the MCP6001/2/4 op amp
simulates the typical amplifier performance of: offset
voltage, DC power supply rejection, input capacitance,
DC common mode rejection, open-loop gain over fre-
quency, phase margin, output swing, DC power supply
current, power supply current change with supply volt-
age, input common mode range, output voltage range
vs. load and input voltage noise.
The listing for this macro model is shown on the next
page. The most recent revision of the model can be
downloaded from Microchip’s web site at
www.microchip.com.
2002 Microchip Technology Inc. DS21733C-page 11
MCP6001/2/4
Software License Agreement
The software supplied herewith by Microchip Technology Incorporated (the “Company”) is intended and supplied to you, the
Company’s customer, for use solely and exclusively on Microchip products manufactured by the company.
The software is owned by the Company and/or its supplier, and is protected under applicable copyright laws. All rights are reserved.
Any use in violation of the foregoing restrictions may subject the user to criminal sanctions under applicable laws, as well as to civil
liability for the breach of the terms and conditions of this license.
THIS SOFTWARE IS PROVIDED IN AN “AS IS” CONDITION. NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATU-
TORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICU-
LAR PURPOSE APPLY TO THIS SOFTWARE. THE COMPANY SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR
SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
.SUBCKT MCP6001 1 2 3 4 5
* | | | | |
* | | | | Output
* | | | Negative Supply
* | | Positive Supply
* | Inverting Input
* Non-inverting Input
*
* Macromodel for the MCP6001/2/4 op amp family:
* MCP6001 (single)
* MCP6002 (dual)
* MCP6004 (quad)
*
* Revision History:
* REV A: 21-Jun-02, KEB (created model)
* REV B: 16-Jul-02, KEB (improved output stage)
*
* Recommendations:
* Use PSPICE (or SPICE 2G6; other simulators may require translation)
* For a quick, effective design, use a combination of: data sheet
* specs, bench testing, and simulations with this macromodel
* For high impedance circuits, set GMIN=100F in the .OPTIONS
* statement
*
* Supported:
* Typical performance at room temperature (25 degrees C)
* DC, AC, Transient, and Noise analyses.
* Most specs, including: offsets, DC PSRR, DC CMRR, input impedance,
* open loop gain, voltage ranges, supply current, ... , etc.
*
* Not Supported:
* Variation in specs vs. Power Supply Voltage
* Distortion (detailed non-linear behavior)
* Temperature analysis
* Process variation
* Behavior outside normal operating region
*
* Input Stage
V10 3 10 -300M
R10 10 11 6.90K
R11 10 12 6.90K
C11 11 12 115E-15
C12 1 0 6.00P
E12 1 14 POLY(4) 20 0 21 0 26 0 27 0 1.00M 20.1 20.1 1 1
I12 14 0 1.50P
M12 11 14 15 15 NMI L=2.00U W=42.0U
C13 14 2 3.00P
M14 12 2 15 15 NMI L=2.00U W=42.0U
I14 2 0 500E-15
C14 2 0 6.00P
I15 15 4 50.0U
MCP6001/2/4
DS21733C-page 12 2002 Microchip Technology Inc.
V16 16 4 300M
D16 16 15 DL
V13 3 13 50M
D13 14 13 DL
*
* Noise, PSRR, and CMRR
I20 21 20 423U
D20 20 0 DN1
D21 0 21 DN1
G26 0 26 POLY(1) 3 4 110U -20.0U
R26 26 0 1
G27 0 27 POLY(2) 1 3 2 4 -440U 80.0U 80.0U
R27 27 0 1
*
* Open Loop Gain, Slew Rate
G30 0 30 POLY(1) 12 11 0 1.00K
R30 30 0 1
E31 31 0 POLY(1) 3 4 104 -2.33
D31 30 31 DL
E32 0 32 POLY(1) 3 4 140 -6.07
D32 32 30 DL
G33 0 33 POLY(1) 30 0 0 447
R33 33 0 1
C33 33 0 77.1M
G34 0 34 POLY(1) 33 0 0 1.00
R34 34 0 1.00
C34 34 0 50.2N
G35 0 35 POLY(2) 34 0 33 34 0 1.00 3.00
R35 35 0 1.00
*
* Output Stage
G50 0 50 POLY(1) 57 5 0 2.00
D51 50 51 DL
R51 51 0 1K
D52 52 50 DL
R52 52 0 1K
G53 3 0 POLY(1) 51 0 50.0U 1M
G54 0 4 POLY(1) 52 0 50.0U -1M
E55 55 0 POLY(2) 3 0 51 0 -10M 1 -40.0M
D55 57 55 DLS
E56 56 0 POLY(2) 4 0 52 0 10M 1 -40.0M
D56 56 57 DLS
G57 0 57 POLY(3) 3 0 4 0 35 0 0 1.00M 1.00M 2.00M
R57 57 0 500
R58 57 5 500M
C58 5 0 2.00P
*
* Models
.MODEL NMI NMOS
.MODEL DL D N=1 IS=1F
.MODEL DLS D N=10M IS=1F
.MODEL DN1 D IS=1F KF=146E-18 AF=1
*
.ENDS MCP6001
2002 Microchip Technology Inc. DS21733C-page 13
MCP6001/2/4
5.0 PACKAGING INFORMATION
5.1 Package Marking Information
XXXXXXXX
XXXXXNNN
YYWW
8-Lead PDIP (300 mil) Example:
8-Lead SOIC (150 mil) Example:
XXXXXXXX
XXXXYYWW
NNN
Legend: XX...X Customer specific information*
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line thus limiting the number of available characters
for customer specific information.
*Standard marking consists of Microchip part number, year code, week code, traceability code (facility
code, mask rev#, and assembly code). For marking beyond this, certain price adders apply. Please
check with your Microchip Sales Office.
MCP6002
I/P057
0222
MCP6002
I/SN0222
057
5-Lead SC-70 (MCP6001) Example:
123
54
5-Lead SOT-23 (MCP6001) Example:
XXNN
123
54
AA57
XNN
YWW
A57
222
8-Lead MSOP Example:
XXXXXX
YWWNNN
6002
222057
MCP6001 = AANN
MCP6001R = ADNN
MCP6001U = AFNN
MCP6001/2/4
DS21733C-page 14 2002 Microchip Technology Inc.
Package Marking Information (Continued)
14-Lead PDIP (300 mil) (MCP6004) Example:
14-Lead TSSOP (MCP6004) Example:
14-Lead SOIC (150 mil) (MCP6004) Example:
XXXXXXXXXXXXXX
XXXXXXXXXXXXXX
YYWWNNN
XXXXXXXXXX
YYWWNNN
XXXXXX
YYWW
NNN
MCP6004-I/P
0222057
6004ST
0222
057
XXXXXXXXXX
MCP6004ISL
0222057
2002 Microchip Technology Inc. DS21733C-page 15
MCP6001/2/4
0.300.15.012.006BLead Width
0.180.10.007.004
c
Lead Thickness
0.300.10.012.004LFoot Length
2.201.80.087.071DOverall Length
1.351.15.053.045
E1
Molded Package Width
2.401.80.094.071EOverall Width
0.100.00.004.000
A1
Standoff
1.000.80.039.031
A2
Molded Package Thickness
1.100.80.043.031AOverall Height
0.65 (BSC).026 (BSC)
p
Pitch
55
n
Number of Pins
MAX
NOM
MINMAX
NOM
MINDimension Limits
MILLIMETERS*INCHESUnits
exceed .005" (0.127mm) per side.
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not
Notes:
JEITA (EIAJ) Standard: SC-70
Drawing No. C04-061
*Controlling Parameter
L
E1
E
c
D
1
B
p
A2
A1
A
Q1
Top of Molded Pkg to Lead Shoulder
Q1 .004 .016 0.10 0.40
n
5-Lead Plastic Package (SC-70)
MCP6001/2/4
DS21733C-page 16 2002 Microchip Technology Inc.
5-Lead Plastic Small Outline Transistor (OT) (SOT23)
10501050
β
Mold Draft Angle Bottom
10501050
α
Mold Draft Angle Top
0.500.430.35.020.017.014BLead Width
0.200.150.09.008.006.004
c
Lead Thickness
10501050
φ
Foot Angle
0.550.450.35.022.018.014LFoot Length
3.102.952.80.122.116.110DOverall Length
1.751.631.50.069.064.059E1Molded Package Width
3.002.802.60.118.110.102EOverall Width
0.150.080.00.006.003.000A1Standoff §
1.301.100.90.051.043.035A2Molded Package Thickness
1.451.180.90.057.046.035AOverall Height
1.90.075
p1
Outside lead pitch (basic)
0.95.038
p
Pitch
55
n
Number of Pins
MAXNOMMINMAXNOMMINDimension Limits
MILLIMETERSINCHES*Units
1
p
D
B
n
E
E1
L
c
β
φ
α
A2
A
A1
p1
* Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MO-178
Drawing No. C04-091
§ Significant Characteristic
2002 Microchip Technology Inc. DS21733C-page 17
MCP6001/2/4
8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
B1
B
A1
A
L
A2
p
α
E
eB
β
c
E1
n
D
1
2
Units INCHES* MILLIMETERS
Dimension Limits MIN NOM MAX MIN NOM MAX
Number of Pins n88
Pitch p.100 2.54
Top to Seating Plane A .140 .155 .170 3.56 3.94 4.32
Molded Package Thickness A2 .115 .130 .145 2.92 3.30 3.68
Base to Seating Plane A1 .015 0.38
Shoulder to Shoulder Width E .300 .313 .325 7.62 7.94 8.26
Molded Package Width E1 .240 .250 .260 6.10 6.35 6.60
Overall Length D .360 .373 .385 9.14 9.46 9.78
Tip to Seating Plane L .125 .130 .135 3.18 3.30 3.43
Lead Thickness c.008 .012 .015 0.20 0.29 0.38
Upper Lead Width B1 .045 .058 .070 1.14 1.46 1.78
Lower Lead Width B .014 .018 .022 0.36 0.46 0.56
Overall Row Spacing § eB .310 .370 .430 7.87 9.40 10.92
Mold Draft Angle Top α51015 51015
Mold Draft Angle Bottom β51015 51015
* Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
JEDEC Equivalent: MS-001
Drawing No. C04-018
.010” (0.254mm) per side.
§ Significant Characteristic
MCP6001/2/4
DS21733C-page 18 2002 Microchip Technology Inc.
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)
Foot Angle φ048048
1512015120
β
Mold Draft Angle Bottom
1512015120
α
Mold Draft Angle Top
0.510.420.33.020.017.013BLead Width
0.250.230.20.010.009.008
c
Lead Thickness
0.760.620.48.030.025.019LFoot Length
0.510.380.25.020.015.010hChamfer Distance
5.004.904.80.197.193.189DOverall Length
3.993.913.71.157.154.146E1Molded Package Width
6.206.025.79.244.237.228EOverall Width
0.250.180.10.010.007.004A1Standoff §
1.551.421.32.061.056.052A2Molded Package Thickness
1.751.551.35.069.061.053AOverall Height
1.27.050
p
Pitch
88
n
Number of Pins
MAXNOMMINMAXNOMMINDimension Limits
MILLIMETERSINCHES*Units
2
1
D
n
p
B
E
E1
h
L
β
c
45°
φ
A2
α
A
A1
* Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
§ Significant Characteristic
2002 Microchip Technology Inc. DS21733C-page 19
MCP6001/2/4
8-Lead Plastic Micro Small Outline Package (MS) (MSOP)
p
A
A1
A2
D
L
c
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not
.037.035FFootprint (Reference)
exceed. 010" (0.254mm) per side.
Notes:
*Controlling Parameter
Mold Draft Angle Top
Mold Draft Angle Bottom
Foot Angle
Lead Width
Lead Thickness
β
α
c
B
φ
7
7
.004
.010
0
.006
.012
(F)
β
Dimension Limits
Overall Height
Molded Package Thickness
Molded Package Width
Overall Length
Foot Length
Standoff §
Overall Width
Number of Pins
Pitch
A
L
E1
D
A1
E
A2
.016
.114
.114
.022
.118
.118
.002
.030
.193
.034
MIN
p
n
Units
.026
NOM
8
INCHES
1.000.950.90.039
0.15
0.30
.008
.016
6
0.10
0.25
0
7
7
0.20
0.40
6
MILLIMETERS*
0.65
0.86
3.00
3.00
0.55
4.90
.044
.122
.028
.122
.038
.006
0.40
2.90
2.90
0.05
0.76
MINMAX NOM
1.18
0.70
3.10
3.10
0.15
0.97
MAX
8
α
E1
E
B
n 1
2
φ
§ Significant Characteristic
.184 .200 4.67 .5.08
Drawing No. C04-111
MCP6001/2/4
DS21733C-page 20 2002 Microchip Technology Inc.
14-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
E1
n
D
1
2
eB
β
E
c
A
A1
B
B1
L
A2
p
α
Units INCHES* MILLIMETERS
Dimension Limits MIN NOM MAX MIN NOM MAX
Number of Pins n14 14
Pitch p.100 2.54
Top to Seating Plane A .140 .155 .170 3.56 3.94 4.32
Molded Package Thickness A2 .115 .130 .145 2.92 3.30 3.68
Base to Seating Plane A1 .015 0.38
Shoulder to Shoulder Width E .300 .313 .325 7.62 7.94 8.26
Molded Package Width E1 .240 .250 .260 6.10 6.35 6.60
Overall Length D .740 .750 .760 18.80 19.05 19.30
Tip to Seating Plane L .125 .130 .135 3.18 3.30 3.43
Lead Thickness c.008 .012 .015 0.20 0.29 0.38
Upper Lead Width B1 .045 .058 .070 1.14 1.46 1.78
Lower Lead Width B .014 .018 .022 0.36 0.46 0.56
Overall Row Spacing § eB .310 .370 .430 7.87 9.40 10.92
Mold Draft Angle Top α5 10 15 5 10 15
β5 10 15 5 10 15
Mold Draft Angle Bottom
* Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-005
§ Significant Characteristic
2002 Microchip Technology Inc. DS21733C-page 21
MCP6001/2/4
14-Lead Plastic Small Outline (SL) – Narrow, 150 mil (SOIC)
Foot Angle φ048048
1512015120
β
Mold Draft Angle Bottom
1512015120
α
Mold Draft Angle Top
0.510.420.36.020.017.014BLead Width
0.250.230.20.010.009.008
c
Lead Thickness
1.270.840.41.050.033.016LFoot Length
0.510.380.25.020.015.010hChamfer Distance
8.818.698.56.347.342.337DOverall Length
3.993.903.81.157.154.150E1Molded Package Width
6.205.995.79.244.236.228EOverall Width
0.250.180.10.010.007.004A1Standoff §
1.551.421.32.061.056.052A2Molded Package Thickness
1.751.551.35.069.061.053AOverall Height
1.27.050
p
Pitch
1414
n
Number of Pins
MAXNOMMINMAXNOMMINDimension Limits
MILLIMETERSINCHES*Units
2
1
D
p
n
B
E
E1
h
L
c
β
45°
φ
α
A2
A
A1
* Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-065
§ Significant Characteristic
MCP6001/2/4
DS21733C-page 22 2002 Microchip Technology Inc.
14-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)
840840
φ
Foot Angle
10501050
β
Mold Draft Angle Bottom
10501050
α
Mold Draft Angle Top
0.300.250.19.012.010.007B1Lead Width
0.200.150.09.008.006.004
c
Lead Thickness
0.700.600.50.028.024.020LFoot Length
5.105.004.90.201.197.193DMolded Package Length
4.504.404.30.177.173.169E1Molded Package Width
6.506.386.25.256.251.246EOverall Width
0.150.100.05.006.004.002A1Standoff §
0.950.900.85.037.035.033A2Molded Package Thickness
1.10.043AOverall Height
0.65.026
p
Pitch
1414
n
Number of Pins
MAXNOMMINMAXNOMMINDimension Limits
MILLIMETERS*INCHESUnits
L
β
c
φ
2
1
D
n
B
p
E1
E
α
A2A1
A
* Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.005” (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-087
§ Significant Characteristic
2002 Microchip Technology Inc. DS21733C-page23
MCP6001/2/4
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom-
mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1. Your local Microchip sales office
2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
3. The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
PART NO. X/XX
PackageTemperature
Range
Device
Device:MCP6001T: 1 MHz Bandwidth, Low Power Op Amp
(Tape and Reel)(SC-70, SOT-23)
MCP6001RT: 1 MHz Bandwidth, Low Power Op Amp
(Tape and Reel)(SOT-23)
MCP6001UT: 1 MHz Bandwidth, Low Power Op Amp
(Tape and Reel)(SOT-23)
MCP6002: 1 MHz Bandwidth, Low Power Op Amp
MCP6002T: 1 MHz Bandwidth, Low Power Op Amp
(Tape and Reel)(SOIC, MSOP)
MCP6004: 1 MHz Bandwidth, Low Power Op Amp
MCP6004T: 1 MHz ,Bandwidth Low Power Op Amp
(Tape and Reel)(SOIC, MSOP)
Temperature Range: I = -40°C to +85°C
Package: LT = Plastic Package (SC-70), 5-lead (MCP6001 only)
OT = Plastic Small Outline Transistor (SOT-23), 5-lead
(MCP6001, MCP6001R, MCP6001U)
MS = Plastic MSOP, 8-lead
P = Plastic DIP (300 mil Body), 8-lead, 14-lead
SN = Plastic SOIC, (150 mil Body), 8-lead
SL = Plastic SOIC (150 mil Body), 14-lead
ST = Plastic TSSOP (4.4mm Body), 14-lead
Examples:
a) MCP6001T-I/LT: 5LD SC-70, Tape and Reel.
b) MCP6001T-I/OT: 5LD SOT-23, Tape and Reel.
c) MCP6001RT-I/OT: 5LD SOT-23, Tape and Reel.
d) MCP6001UT-I/OT: 5LD SOT-23, Tape and Reel.
a) MCP6002-I/MS: 8LD MSOP.
b) MCP6002-I/P: 8LD PDIP.
c) MCP6002-I/SN: 8LD SOIC.
d) MCP6002T-I/MS: 8LD MSOP, Tape and Reel.
e) MCP6002T-I/SN: 8LD SOIC, Tape and Reel.
a) MCP6004-I/P: 14LD PDIP.
b) MCP6004-I/SL: 14LD SOIC.
c) MCP6004-I/ST: 14LD TSSOP.
d) MCP6004T-I/SL: 14LD SOIC Tape and Reel.
e) MCP6004T-I/ST: 14LD TSSOP Tape and Reel.
MCP6001/2/4
DS21733C-page 24 2002 Microchip Technology Inc.
NOTES:
2002 Microchip Technology Inc. DS21733C - page 25
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical com-
ponents in life support systems is not authorized except with
express written approval by Microchip. No licenses are con-
veyed, implicitly or otherwise, under any intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, KEELOQ,
MPLAB, PIC, PICmicro, PICSTART and PRO MATE are
registered trademarks of Microchip Technology Incorporated
in the U.S.A. and other countries.
FilterLab, microID, MXDEV, MXLAB, PICMASTER, SEEVAL
and The Embedded Control Solutions Company are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.
dsPIC, dsPICDEM.net, ECONOMONITOR, FanSense,
FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP,
ICEPIC, microPort, Migratable Memory, MPASM, MPLIB,
MPLINK, MPSIM, PICC, PICDEM, PICDEM.net, rfPIC, Select
Mode and Total Endurance are trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2002, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999
and Mountain View, California in March 2002.
The Company’s quality system processes and
procedures are QS-9000 compliant for its
PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals,
non-volatile memory and analog products. In
addition, Microchip’s quality system for the
design and manufacture of development
systems is ISO 9001 certified.
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowl-
edge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products.
DS21733C-page 26 2002 Microchip Technology Inc.
M
AMERICAS
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200 Fax: 480-792-7277
Technical Support: 480-792-7627
Web Address: http://www.microchip.com
Rocky Mountain
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7966 Fax: 480-792-4338
Atlanta
3780 Mansell Road, Suite 130
Alpharetta, GA 30022
Tel: 770-640-0034 Fax: 770-640-0307
Boston
2 Lan Drive, Suite 120
Westford, MA 01886
Tel: 978-692-3848 Fax: 978-692-3821
Chicago
333 Pierce Road, Suite 180
Itasca, IL 60143
Tel: 630-285-0071 Fax: 630-285-0075
Dallas
4570 Westgrove Drive, Suite 160
Addison, TX 75001
Tel: 972-818-7423 Fax: 972-818-2924
Detroit
Tri-Atria Office Building
32255 Northwestern Highway, Suite 190
Farmington Hills, MI 48334
Tel: 248-538-2250 Fax: 248-538-2260
Kokomo
2767 S. Albright Road
Kokomo, Indiana 46902
Tel: 765-864-8360 Fax: 765-864-8387
Los Angeles
18201 Von Karman, Suite 1090
Irvine, CA 92612
Tel: 949-263-1888 Fax: 949-263-1338
San Jose
Microchip Technology Inc.
2107 North First Street, Suite 590
San Jose, CA 95131
Tel: 408-436-7950 Fax: 408-436-7955
Toronto
6285 Northam Drive, Suite 108
Mississauga, Ontario L4V 1X5, Canada
Tel: 905-673-0699 Fax: 905-673-6509
ASIA/PACIFIC
Australia
Microchip Technology Australia Pty Ltd
Suite 22, 41 Rawson Street
Epping 2121, NSW
Australia
Tel: 61-2-9868-6733 Fax: 61-2-9868-6755
China - Beijing
Microchip Technology Consulting (Shanghai)
Co., Ltd., Beijing Liaison Office
Unit 915
Bei Hai Wan Tai Bldg.
No. 6 Chaoyangmen Beidajie
Beijing, 100027, No. China
Tel: 86-10-85282100 Fax: 86-10-85282104
China - Chengdu
Microchip Technology Consulting (Shanghai)
Co., Ltd., Chengdu Liaison Office
Rm. 2401-2402, 24th Floor,
Ming Xing Financial Tower
No. 88 TIDU Street
Chengdu 610016, China
Tel: 86-28-86766200 Fax: 86-28-86766599
China - Fuzhou
Microchip Technology Consulting (Shanghai)
Co., Ltd., Fuzhou Liaison Office
Unit 28F, World Trade Plaza
No. 71 Wusi Road
Fuzhou 350001, China
Tel: 86-591-7503506 Fax: 86-591-7503521
China - Hong Kong SAR
Microchip Technology Hongkong Ltd.
Unit 901-6, Tower 2, Metroplaza
223 Hing Fong Road
Kwai Fong, N.T., Hong Kong
Tel: 852-2401-1200 Fax: 852-2401-3431
China - Shanghai
Microchip Technology Consulting (Shanghai)
Co., Ltd.
Room 701, Bldg. B
Far East International Plaza
No. 317 Xian Xia Road
Shanghai, 200051
Tel: 86-21-6275-5700 Fax: 86-21-6275-5060
China - Shenzhen
Microchip Technology Consulting (Shanghai)
Co., Ltd., Shenzhen Liaison Office
Rm. 1812, 18/F, Building A, United Plaza
No. 5022 Binhe Road, Futian District
Shenzhen 518033, China
Tel: 86-755-82901380 Fax: 86-755-82966626
China - Qingdao
Rm. B503, Fullhope Plaza,
No. 12 Hong Kong Central Rd.
Qingdao 266071, China
Tel: 86-532-5027355 Fax: 86-532-5027205
India
Microchip Technology Inc.
India Liaison Office
Divyasree Chambers
1 Floor, Wing A (A3/A4)
No. 11, O’Shaugnessey Road
Bangalore, 560 025, India
Tel: 91-80-2290061 Fax: 91-80-2290062
Japan
Microchip Technology Japan K.K.
Benex S-1 6F
3-18-20, Shinyokohama
Kohoku-Ku, Yokohama-shi
Kanagawa, 222-0033, Japan
Tel: 81-45-471- 6166 Fax: 81-45-471-6122
Korea
Microchip Technology Korea
168-1, Youngbo Bldg. 3 Floor
Samsung-Dong, Kangnam-Ku
Seoul, Korea 135-882
Tel: 82-2-554-7200 Fax: 82-2-558-5934
Singapore
Microchip Technology Singapore Pte Ltd.
200 Middle Road
#07-02 Prime Centre
Singapore, 188980
Tel: 65-6334-8870 Fax: 65-6334-8850
Taiwan
Microchip Technology (Barbados) Inc.,
Taiwan Branch
11F-3, No. 207
Tung Hua North Road
Taipei, 105, Taiwan
Tel: 886-2-2717-7175 Fax: 886-2-2545-0139
EUROPE
Austria
Microchip Technology Austria GmbH
Durisolstrasse 2
A-4600 Wels
Austria
Tel: 43-7242-2244-399
Fax: 43-7242-2244-393
Denmark
Microchip Technology Nordic ApS
Regus Business Centre
Lautrup hoj 1-3
Ballerup DK-2750 Denmark
Tel: 45 4420 9895 Fax: 45 4420 9910
France
Microchip Technology SARL
Parc d’Activite du Moulin de Massy
43 Rue du Saule Trapu
Batiment A - ler Etage
91300 Massy, France
Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79
Germany
Microchip Technology GmbH
Steinheilstrasse 10
D-85737 Ismaning, Germany
Tel: 49-89-627-144 0 Fax: 49-89-627-144-44
Italy
Microchip Technology SRL
Centro Direzionale Colleoni
Palazzo Taurus 1 V. Le Colleoni 1
20041 Agrate Brianza
Milan, Italy
Tel: 39-039-65791-1 Fax: 39-039-6899883
United Kingdom
Microchip Ltd.
505 Eskdale Road
Winnersh Triangle
Wokingham
Berkshire, England RG41 5TU
Tel: 44 118 921 5869 Fax: 44-118 921-5820
12/05/02
WORLDWIDE SALES AND SERVICE
