TSM6025
Page 1
© 2014 Silicon Laboratories, Inc. All rights reserved.
FEATURES
Alternate Source for MAX6025
Initial Accuracy:
0.2% (max) – TSM6025A
0.4% (max) – TSM6025B
Temperature Coefficient:
15ppm/°C (max) – TSM6025A
25ppm/°C (max) – TSM6025B
Quiescent Supply Current: 35μA (max)
Low Supply Current Change with V
IN
: <1μA/V
Output Source/Sink Current: ±500μA
Low Dropout at 500μA Load Current: 100mV
Load Regulation: 0.14μV/μA
Line Regulation : 25μV/V
Stable with C
LOAD
up to 2200pF
APPLICATIONS
Industrial and Process-Cont rol Systems
Hard-Disk Drives
Battery-Operated Equipment
Data Acquisition Systems
Hand-Held Equipment
Precision 3V/5V Systems
Smart Industrial Transmitters
DESCRIPTION
The TSM6025 is a 3-terminal, series-mode 2.5-V
precision voltage reference and is a pin-for-pin,
alternate source for the MAX6025 voltage reference.
Like the MAX6025, the TSM6025 consumes only
27μA of supply current at no-load, exhibits an initial
output voltage accuracy of less than 0.2%, and a low
output voltage temperature coefficient of 15ppm/°C.
In addition, the TSM6025’s output stage is stable for
all capacitive loads to 2200pF and is capable of
sinking and sourcing load currents up to 500μA.
Since the TSM6025 is a series-mode voltage
reference, its supply current is not affected by
changes in the applied su pply voltage unlike two-
terminal shunt-mode references that require an
external resistor. The TSM6025’s sm all form factor
and low supply current operation combine to make it
an ideal choice in low-power, precision applications.
The TSM6025 is fully specified over the -40°C to
+85°C temperature range and is available in a 3-pin
SOT23 package.
A +2.5V, Low-Power/Low-Dropout Precision Voltage Reference
TYPICAL APPLICATION CIRCUIT
TEMPERATURE DRIFT- °C
OUTPUT VOLTAGE - Volt
-40 -15 10 35 85 60
2.4995
2.4985
THREE TYPICAL DEVICES
DEVICE #1
DEVICE #2
DEVICE #3
2.5025
2.5015
2.5005
2.5035 Output Voltage Temperature Drift
TSM6025
Page 2 TSM6025 Rev. 1.0
ABSOLUTE MAXIMUM RATINGS
IN to GND ................................................................. -0.3V to +13.5V
OUT to GND .................................................................... -0.3V to 7V
Short Circuit to GND or IN (V
IN
< 6V) .............................. Continuous
Output Short Circuit to GND or IN (V
IN
6V) .............................. 60s
Continuous Power Dissipation (T
A
= +70°C)
3-Pin SOT23 (Derate at 4.0mW/°C above +70°C) .......... 320mW
Operating Temperature Range ................................. -40°C to +85°C
Storage Temperature Range .................................. -65°C to +150°C
Lead Temperature (Soldering, 10s ) ...................................... +300°C
Electrical and thermal stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These
are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections
of the specifications is not implied. Exposure to any absolute maximum rating conditions for extended periods may affect device reliability and
lifetime.
PACKAGE/ORDERING INFORMATION
ORDER NUMBER PART
MARKING CARRIER QUANTITY
TSM6025AEUR+ ACX
Tape
& Reel -----
TSM6025AEUR+T Tape
& Reel 3000
TSM6025BEUR+ ACY
Tape
& Reel -----
TSM6025BEUR+T Tape
& Reel 3000
Lead-free Program: Silicon Labs supplies only lead-free packagi ng.
Consult Silicon Labs for products specified with wider operating temperature ranges.
TSM6025
TSM6025 Rev. 1.0 Page 3
ELECTRICAL CHARACTERISTICS
VIN = +5V, IOUT = 0, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C. See Note 1.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
OUTPUT
Output Voltage VOUT T
A = +25°C TSM6025A 2.495 2.500 2.505 V
-0.20 0.20 %
TSM6025B 2.490 2.500 2.510 V
-0.40 0.40 %
Output Voltage Temperature
Coefficient (See Note 2) VOUT
T
A
= 0°C to +70°C TSM6025A 6 15
ppm/°C
T
A
= -40°C to +85°C 6 20
T
A
= 0°C to +70°C TSM6025B 6 25
T
A
= -40°C to +85°C 6 30
Line Regulation VOUT/
VIN (VOUT + 0.2V) VIN 12.6V 140 μV/V
Load Regulation VOUT/
IOUT Sourcing: 0 IOUT 500μA 0.14 0.60
μV/μA
Sinking: -500μA IOUT 0 0.18 0.80
Dropout Voltage (See Note 5) VIN -VOUT I
OUT = 500μA 100 200 mV
OUT Short-Circuit Current ISC VOUT Short to GND 4 mA
VOUT Short to IN 4
Temperature Hysteresis
(See Note 3) 130 ppm
Long-Term Stability VOUT/
time 1000hr at TA = +25°C 50 ppm/
1000hr
DYNAMIC
Noise Voltage eOUT f = 0.1Hz to 10Hz 50 μVP-P
f = 10Hz to 10kHz 125 μVRMS
Ripple Rejection VOUT/
VIN VIN = 5V ±100mV, f = 120Hz 82 dB
Capacitive-Load Stability Range COUT See Note 4 0 2.2 nF
INPUT
Supply Voltage Range VIN Guaranteed by line-regulation test VOUT + 0.2 12.6 V
Quiescent Supply Current IIN 27 35 μA
Change in Supply Current IIN/VIN (VOUT + 0.2V) VIN 12.6V 2.0 μA/V
Note 1: All devices are 100% production tested at TA = +25°C and are guaranteed by characterization for TA = TMIN to TMAX, as specified.
Note 2: Temperature Coefficient is measured by the “box” method; i.e., the maximum VOUT is divided by the maximum T.
Note 3: Temperature hysteresis is defined as the change in the +25°C output voltage before and after cycling the device from TMIN to TMAX.
Note 4: Not production tested; guaranteed by design.
Note 5: Dropout voltage is the minimum input voltage at which VOUT changes 0.2% from VOUT at VIN = 5.0V.
TSM6025
Page 4 TSM6025 Rev. 1.0
Line Regulation ΔV
OUT
/ΔV
IN
OUTPUT VOLTAGE CHANGE - µV
SUPPLY VOLTAGE - Volt
-100
0
200
300
T
A
= -40°C
T
A
= +85°C
100
TEMPERATURE DRIFT- °C
LOAD CURRENT- µA
T
A
= +85°C
Load Regulation – ΔV
OUT
/ΔI
LOAD
-500 500
250 -250
-0.4
-0.2
0.4
0
0.2
SOURCE CURRENT- µA
DROPOUT VOLTAGE - Volt
Dropout Voltage vs Source Current
400 800
0 1000
600 200
0
0.1
0.4
0.2
0.3
Power Supply Rejection vs Frequency
POWER SUPPLY REJECTION – mV/V
FREQUENCY - Hz
V
CC
=+5.5V±0.25V
1
10
0.01
100
100 1k 10k 1M 100k
TIME - Hours
OUTPUT VOLTAGE CHANGE - mV
0
T
A
= +25°C
T
A
= +85°C
T
A
= -40°C
8 12
2 14
10 4 6
T
A
= -40°C
TYPICAL PERFORMANCE CHARACTERISTICS
V
IN
= +5V; I
OUT
= 0mA; T
A
= +25°C, unless otherwise noted.
T
A
= +25°C
T
A
= +25°C
THREE TYPICAL DEVICES
DEVICE A
0 250 500 1000750
2.498
2.500
2.499
2.502
2.501
OUTPUT VOLTAGE - Volt
DEVICE B
DEVICE C
Long-Term Output Voltage Drift
OUTPUT VOLTAGE - Volt
-40 -15 10 35 85 60
2.4995
2.4985
THREE TYPICAL DEVICES
DEVICE #1
DEVICE #2
DEVICE #3
2.5025
2.5015
2.5005
2.5035 Output Voltage Temperature Drift
0.1
TSM6025
TSM6025 Rev. 1.0 Page 5
Supply Current vs Input Voltage
0.1Hz to 10Hz Output Noise
V
OUT(N)
10µV/DIV
OUTPUT IMPEDANCE -
FREQUENCY - Hz
1
10
1k
0.1
100
10k
0.1 1 100 1M 10k
1s/DIV
200µs/DIV
Power-On Transient Response
INPUT
2V/DIV
10µs/DIV
Small-signal Load Transient Response
I
OUT
50µA/DIV
SUPPLY CURENT - µA
INPUT VOLTAGE - Volt
20
28
36
40
8 12
2 14
32
10
Supply Current vs Temperature
TEMPERATURE - °C
SUPPLY CURENT - µA
V
CC
= +2.5V, +5.5V
V
CC
=+12.5V
-40 -15 10 35 85 60
25
35
20
30
40
Output Impedance vs Frequency
OUTPUT
1V/DIV
OUTPUT
20mV/DIV
I
OUT
= 0µA 50µA 0µA
46µVpp
V
CC
=+7.5V
4 6
24
TYPICAL PERFORMANCE CHARACTERISTICS
V
IN
= +5V; I
OUT
= 0mA; T
A
= +25°C, unless otherwise noted.
TSM6025
Page 6 TSM6025 Rev. 1.0
VIN
200mV/DIV
OUTPUT
100mV/DIV
Line Transient Response
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = +5V; IOUT = 0mA; TA = +25°C, unless otherwise noted.
2µs/DIV
10µs/DIV
IOUT
1mA/DIV
OUTPUT
200mV/DIV
VIN =5V±0.25V, AC-Coupled
Large-signal Load Tra nsient Response
IOUT = 0mA 1mA 0mA
TSM6025
TSM6025 Rev. 1.0 Page 7
PIN FUNCTIONS
PIN NAME FUNCTION
1 IN Supply Voltage Input
2 OUT +2.5V Output
3 GND Ground
DESCRIPTION/THEORY OF OPERATION
The TSM6025 incorporate s a pre ci sion 1.25-V
bandgap reference that is followed by a output
amplifier configured to amplify the base bandgap
output voltage to a 2.5-V output. The design of the
bandgap reference incorporates proprietary circuit
design techniques to achieve its low temperature
coefficient of 15ppm/°C and initial output voltage
accuracy less than 0.2%. The design of the output
amplifier’s frequency compensation does not require
a separate compensation capacitor and is stable
with capacitive loads up to 2200pF. The design of
the output amplifier also incorporates low headroom
design as it can source and sink load currents to
500μA with a dropout voltage less than 200mV.
APPLICATIONS INFORMATION
Power Supply Input Capacitiv e Bypass
As shown in the Typical Application Circuit, the VIN
pin of the TSM6025 should be bypasse d to GND
with a 0.1uF ceramic capacitor for optimal line-
transient performance. Consistent with good analog
circuit engineering practice, the capacitor should be
placed in as close proximity to the TSM6025 as
practical with very short pcb track lengths.
Output/Load Capacitance Considerations
As mentioned previously, the TSM6025 does not
require a separate, external capacitor at VOUT for
transient response stability as it is stable for
capacitive loads up to 2200pF. On the other ha nd
and for improved large-signal line and load
regulation, the use of a capacitor at VOUT will provide
a reservoir of charge in reserve to absorb large -
signal load or line transients. This in turn improves
the TSM6025’s VOUT settling time. If large load and
line transients are not expected in the application,
then the TSM6025 can be used witho ut an external
capacitor at V OUT thereby reducing the overall circuit
footprint.
Supply Current
The TSM6025 exhibits excellent dc line regulation
as its supply current changes sli ghtly as the applied
supply voltage is increased. While its supply current
is 35μA maximum, the change in its supply current
as a function of supply voltage (its IIN/VIN) is less
than 1μA/V. Since the TSM6025 is a series-mode
reference, load current is drawn from the supply
voltage only when required. In this case, circuit
efficiency is maintained at all applied supply
voltages. Reducing power dissipatio n and extending
battery life are the net benefits of improved circuit
efficiency.
On the other hand, an external resistor in series with
the supply voltage is required by two-terminal,
shunt-mode references. In this case, as the supply
voltage changes, so does the quiescent supply
current of the shunt reference. In addition, the
external resistor’s tolerance and tempe rature
coefficient contribute two additional factors that can
affect the circuit’s supply current. Therefore,
maximizing circuit efficiency with shunt-mode
references becomes an ex ercise involving three
variables. Additionally, shunt-mode references must
be biased at the maximum expected load current
even if the load current is not present at all times.
When the applied supply voltage is less than the
minimum specified input voltage of the TSM6025 (for
example, during the power-up transition), the
TSM6025 can draw up to 200μA above its nominal,
steady-state supply current. To ensure reliable
power-up behavior, the input power source mu st
have sufficient reserve power to provide the extra
supply current drawn during the power-up transition.
TSM6025
Page 8 TSM6025 Rev. 1.0
Output Voltage Hysteresis
Reference output voltage thermal hysteresis is the
change in the reference’s +25°C output voltage after
temperature cycling from +85°C to +25°C and from -
40°C to +25°C. Thermal hysteresis is caused by
differential package stress i mpressed upon the
TSM6025’s internal bandgap core transistors and
depends on whether the reference IC was previously
at a higher or lower temperature. At 130ppm, the
TSM6025’s typical temperature hyste re sis is equal
to 0.33mV with respect to a 2.5V output voltage.
Voltage Reference Turn-On Time
With a (V
IN
– V
OUT
) voltage differential larger than
200mV and I
LOAD
= 0mA, the TSM6025’s typical
combined turn-on and settling time to within 0.1% of
its 2.5V final value is approximately 340μs.
A Positive and Negative Low-Power Voltage
Reference
The circuit in Figure 1 uses a CD4049 hex inverter
and a few external capacitors as the power supply to
a dual-supply precision op amp to form a ±2.5V
precision, bipolar output voltage reference around
the TSM6025. The CD4049-based circuit is a
discrete charge pump voltage doubler/inverter that
generates ±6V supplies for any industry-standard
OP-07 or equivalent precision op amp.
Figure 1: Positive and Neg ative 2.5V References from a Single +3V or +5V Supply
TSM6025
Silicon Laboratories, Inc. Page 9
400 West Cesar Chavez, Austin, TX 78701 TSM6025 Rev. 1.0
+1 (512) 416-8500 www.silabs.com
PACKAGE OUTLINE DRAWING
3-Pin SOT23 Package Outline Drawing
(N.B., Drawings are not to scale)
Patent Notice
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analog-intensive mixed-signal solutions. Silicon Labs' extensive patent portfolio is a testament to our unique approach and world-class
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