PRODUCT SPECIFICATION Q5)((9%2$5' nRF9E5 Evaluation Board *(1(5$/'(6&5,37,21 This document describes the Q5)((9%2$5' and its use with the Nordic VLSI Q5)( Single Chip 433/868/915MHz RF Transceiver with embedded 8051 compatible microcontroller and 4 input 10 bit ADC. Q5)((9%2$5'V for operation at 433MHz and 868/915MHz are available. This document covers both versions. Figure 1: The Q5)((9%2$5' Nordic VLSI ASA Revision: 1.0 - Vestre Rosten 81, N-7075 Tiller, Norway 3DJHRI - Phone +4772898900 - Fax +4772898989 January 2004 PRODUCT SPECIFICATION Q5)((YDOXDWLRQ%RDUG ,1752'8&7,21 The Evaluation Board for the Q5)( Single Chip 433/868/915MHz RF Transceiver with embedded 8051 compatible microcontroller and 4 input 10 bit ADC has been developed to enable customers to test functionality, develop firmware, run communication and verify the performance parameters of the device. This document describes the usage of the Q5)( (9%2$5'. The Q5)((9%2$5'is intended for evaluation and development purposes only. It is not intended for incorporation into an end product. *(77,1*67$57(' The Q5)((9%2$5' is shipped with an((3520SURJUDPPHUDQGHPXODWRUGRQJOH The ((3520SURJUDPPHUDQGHPXODWRUGRQJOH enables you to emulate a 4k serial SPI EEPROM and program the Q5)((9%2$5' on board SPI EEPROM through PC software. The following equipment is needed to work efficiently with the Q5)((9%2$5': * * * * PC with 2 free USB ports, running (supplied) Q5)352* PC software 2 ((3520SURJUDPPHUDQGHPXODWRUGRQJOHV (supplied) A DC voltage supply (+4.5V to +12V) 2 standard male USB A/B cables (supplied) To evaluate the performance of the device the following instrumentation should be available: * * * * * Logic analyzer Ampere meter RF signal generator with GFSK modulation capability RF spectrum analyzer Low frequency, high accuracy signal generator (ADC tests) Nordic VLSI ASA Revision: 1.0 - Vestre Rosten 81, N-7075 Tiller, Norway 3DJHRI - Phone +4772898900 - Fax +4772898989 January 2004 PRODUCT SPECIFICATION Q5)((YDOXDWLRQ%RDUG ((3520352*5$00(5$1'(08/$725'21*/( '(6&5,37,21 The ((3520SURJUDPPHUDQGHPXODWRUGRQJOH is fitted `on-top' of the Q5)( (9%2$5' as shown in (Figure 2). This interface enables you to: * * Emulate the external 4k serial SPI EEPROM needed by Q5)( through the Q5)352* PC software. Program the EEPROM included on the Q5)((9%2$5'. The Q5)352* software is documented in Q5)352**(77,1*67$57(' [1]. PC USB Link USB MCU SPI Link LED4 SW4 LED3 RS232 SW3 LED2 JP2 SW2 LED1 J2 SW1 S1 Q5)((9%2$5' EEPROM 2XX320 Parallel interface S205 Antenna nRF9E5 J1 J4 RESET JP1 S102 ADC input D101 R114 S206 (+4.5 - 12v) S101 J3 OFF/ON Supply level adjust J101 Figure 2: Q5)((9%2$5' with programming dongle Emulating the external EEPROM needed by the Q5)( will increase the flexibility and speed of SW development and de-bugging. When a program is running well, the EEPROM included on the Q5)((9%2$5' can be programmed, enabling the Q5)( (9%2$5' to run stand-alone. 3RZHUVXSSO\ Main power supply to the ((3520SURJUDPPHUDQGHPXODWRUGRQJOH is fed through the USB interface (J101) from the PC. Supply voltage to the Q5)((9%2$5' interface stage runs through J102 from the Q5)((9%2$5'.The ((3520SURJUDPPHUDQG Nordic VLSI ASA Revision: 1.0 - Vestre Rosten 81, N-7075 Tiller, Norway 3DJHRI - Phone +4772898900 - Fax +4772898989 January 2004 PRODUCT SPECIFICATION Q5)((YDOXDWLRQ%RDUG HPXODWRUGRQJOH must hence be plugged in the Q5)((9%2$5'connector JP2 in order to have proper signal levels on J102 Q5)((9%2$5'LQWHUIDFH The pin-out of the interface (J102) to the Q5)((9%2$5'can be found in Table 2 under the chapter Q5)((9%2$5''(6&5,37,21 (EVBOARD connector JP2). The PC interface (J101) is a standard USB B-connector interface. 86%DGGUHVVLQJ 6 If both of the supplied ((3520SURJUDPPHUDQGHPXODWRUGRQJOHV are connected to the same USB HUB (same PC), they need a unique USB address each. On the ((3520SURJUDPPHUDQGHPXODWRUGRQJOH, switch S101 can be set to USB address 1 or 2, both to give the two boards a unique USB address for the HUB and an easy way to visually identify the two Q5)((9%2$5'V. Remember that the address must be set prior to attaching the ((3520SURJUDPPHUDQG HPXODWRUGRQJOHVto the USB HUB. This USB address will also be shown in the Q5)352* user interface to identify the two Q5)((9%2$5'V. Nordic VLSI ASA Revision: 1.0 - Vestre Rosten 81, N-7075 Tiller, Norway 3DJHRI - Phone +4772898900 - Fax +4772898989 January 2004 PRODUCT SPECIFICATION Q5)((YDOXDWLRQ%RDUG Q5)((9%2$5''(6&5,37,21 Appendix 1 shows the Q5)((9%2$5' circuit diagrams. The PCB layout and component placement is shown in Appendix 2. The component list is given in Appendix 3. Figure 3 shows the block diagram of the Q5)((9%2$5'. $'&LQSXW - 6 95(* 9 9''BQ5) - -3 7HPS VHQVRU 5(6(7 *1' 95(* 5 9&& -3 3DUDOOHOLQWHUIDFH -3 5 - Q5)( 12 5),2 2 56 FRQY ((3520 - 56 4 4 4 5 [ [ -3 86%GRQJOH Figure 3: Block diagram of the Q5)((9%2$5' 3RZHUVXSSO\ - Power supply and ground is applied to the Q5)((9%2$5'via connector J101. Two on board adjustable voltage regulators (U102 and U103) are included, allowing an input voltage range from 9WR9 at connector J101. The output voltages from the voltage regulators (VDD_nRF and VCC) are simultaneously adjusted from +1.8V to +3.6V by the use of the dual gang potentiometer R114, and the voltage levels can be measured on header JP101. There is one voltage regulator (U102) for the Q5)( device, and one voltage regulator (U103) for the rest of the circuitry on the board. Power switch S101 turns the Q5)((9%2$5' main power on and of. The green LED D101 is lit when power is on. Note that if the output voltages from the voltage regulators are adjusted to a low voltage level, the light from the LED will be weak. Nordic VLSI ASA Revision: 1.0 - Vestre Rosten 81, N-7075 Tiller, Norway 3DJHRI - Phone +4772898900 - Fax +4772898989 January 2004 PRODUCT SPECIFICATION Q5)((YDOXDWLRQ%RDUG 'LJLWDO,2SRUWV All signals in digital I/O ports 0 and 1 of the 8051 controller can be accessed through JP1 (Parallel Interface). The pin-out is listed in Table 1. JP1 pin # Q5)( port# Signal name 1 2 3 4 5 6 7 8 9 10 11 12 13 14 P1.3 P1.0 P1.2 P1.1 P0.7 P0.6 P0.5 P0.4 P0.3 P0.2 P0.1 P0.0 - GND EECSN (P1.3) SCK (P1.0) MISO (P1.2) MOSI (P1.1) P07 P06 P05 P04 P03 P02 P01 P00 VCC Functionality GPIO / EEPROM CSN SPI clock / T2 SPI datain / GPIO SPI dataout / GPIO GPIO / PWM GPIO / T1 GPIO / T0 GPIO / INT1_N GPIO / INT0_N GPIO / TXD (UART) GPIO / RXD (UART) GPIO / GTIMER Output voltage from regulator U103 Table 1: Q5)((9%2$5', JP1 pin-out These signals are also available for measurements on header J4. The signal names are found on the PCB silkscreen. 8$5756 - The Q5)( UART is fed to an on board RS232 converter in addition to the parallel interface connector JP1. The converted RS232 signal is available at connector J2, which is a standard 9-pin female DSUB for connection to PC or other equipment. Switch S1 disables the RS232 converter and tri-states its outputs. This enables the Q5)( UART to be accessed through JP1. 127( The RS232 converter will also shut down and tri-state the outputs if a RS232 plug is not present in J2. ((3520 The Q5)((9%2$5' is fitted with a standard 2xx320 SPI EEPROM for program code (U2). The EEPROM is accessed through the Q5)( SPI master found on digital I/O port 1 (P1). On the Q5)((9%2$5' the SPI and control signals are all buffered (U5-U8). This buffering is not needed in a final application, but utilized on the Q5)((9%2$5' to Nordic VLSI ASA Revision: 1.0 - Vestre Rosten 81, N-7075 Tiller, Norway 3DJHRI - Phone +4772898900 - Fax +4772898989 January 2004 PRODUCT SPECIFICATION Q5)((YDOXDWLRQ%RDUG avoid overloading the P1 port and enabling in circuit programming of the on board EEPROM. As the Q5)( features an SPI master it must be overridden by the ((3520SURJUDPPHU DQGHPXODWRUGRQJOH when the Q5)((9%2$5' on board EEPROM is to be programmed. JP2 interfaces the programming ((3520SURJUDPPHUDQGHPXODWRUGRQJOH that is shipped with the Q5)((9%2$5'V. This external EEPROM emulator and programmer eases the development of firmware, and enables the user to download new firmware trough an USB interface. If it is desirable to program the external EEPROM from the Q5)( a jumper must be mounted on header JP3. The ((3520SURJUDPPHUDQGHPXODWRUGRQJOH must be removed from JP2 when doing this. The pin out of JP2 is listed in Table 2. Pin number Pin name Comment 1 2 3 VCC / VL VER CSCTRL 4 5 6 7 8 9 10 CSN SO WPN SI SCK RESET GND Output voltage from regulator U103 Q5)((9%2$5' rev. code CS override for EEPROM programming Chip select from Q5)( SPI data out On board EEPROM write protect SPI data in SPI clock Q5)( reset System GND Table 2 Q5)((9%2$5' JP2 pin out 5),2 - For convenient connection of the differential antenna output/input pins to a single ended antenna or 50 test equipment, a differential to single ended matching network is included. This network matches the 50VLQJOHHQGHGDQWHQQDRU test equipment impedance at the SMA connector J1 to the recommended differential load impedance at the Q5)('s RF I/O stage (pins ANT1 & ANT2). The employed matching network introduces an insertion loss of approximately 1-2dB at 433/868/915MHz. The components utilized in the single ended matching network on the Q5)((9%2$5'have the tightest tolerances available. This is done to minimize the influence of component variations in the matching network during Q5)( RF performance tests. In a final application less accurate and hence lower cost components can be utilized if some variation in output power and sensitivity can be accepted. $'LQSXW - The 4 external ADC inputs and the external ADC reference voltage (AREF) are fed through header J3. The signals are single ended, and in header J3 each input is paired with a GND. Nordic VLSI ASA Revision: 1.0 - Vestre Rosten 81, N-7075 Tiller, Norway 3DJHRI - Phone +4772898900 - Fax +4772898989 January 2004 PRODUCT SPECIFICATION Q5)((YDOXDWLRQ%RDUG All inputs are low pass filtered through first order RC units, the cut off is 3.2 MHz. The AREF is similarly filtered with a cut of frequency of 1.5 kHz. 5(6(7 Since the Q5)( device has no external reset pin, the separate voltage regulator (U102) for the Q5)( device has a shut-down feature to ensure a controlled shut-off of VDD_nRF and hence reset, during firmware debugging. A Q5)( reset is generated either by pressing the RESET push-button (S102) on the board, manually through the PC software or by downloading new software to the EEPROM emulator. This external reset circuitry is not necessary in a final application since the Q5)( then will be the system master and features power on, watch dog and interrupt reset routines. Q5)(YROWDJHDQGFXUUHQWPHDVXUHPHQWV -3 To enable measurement of Q5)( current consumption a header JP101 is put on the Q5)( supply line. The jumper on this header is never to be removed, except when replaced by an ampere meter for measurements. The exact supply voltage (VDD_nRF) to the Q5)( can also be measured on JP101. 7HPSHUDWXUH6HQVRU The Q5)((9%2$5' includes a National Semiconductor LM35DZ temperature sensor. This sensor can be connected to the AIN3 input of the ADC by mounting a jumper on header JP4. The temperature sensor has an output voltage that is linearly proportional to the Celsius (Centigrade) temperature. Output voltage level is VOUT = 0mV + 10mV/C in the operating temperature range 0C to +100C of the sensor. 8VHU/('V The Q5)((9%2$5' includes 4 yellow LEDs (LED1-LED4). The LEDs can be connected to the Q5)( digital I/O port P0 (P0.0, P0.2, P0.4 and P0.6) by the use of the four positions DIP switch S206. 127( Each pin in digital I/O port P0 may sink or source a high current. Even numbered bits will sink high current when the corresponding bit in P0_DRV is set, whereas odd numbered bits will source high current when the corresponding bit in P0_DRV is set. For further details, please see the Q5)( Product Specification. Nordic VLSI ASA Revision: 1.0 - Vestre Rosten 81, N-7075 Tiller, Norway 3DJHRI - Phone +4772898900 - Fax +4772898989 January 2004 PRODUCT SPECIFICATION Q5)((YDOXDWLRQ%RDUG 8VHU3XVKEXWWRQV The Q5)((9%2$5' includes 4 push-button switches (SW1-SW4). The push-buttons can be connected to the Q5)( digital I/O port P0 (P0.1, P0.3, P0.5 and P0.7) by the use of the four positions DIP switch S205. 5()(5(1&(6 [1] nRFPROG GETTING STARTED, Nordic VLSI document, http://www.nvlsi.no Nordic VLSI ASA Revision: 1.0 - Vestre Rosten 81, N-7075 Tiller, Norway 3DJHRI - Phone +4772898900 - Fax +4772898989 January 2004 PRODUCT SPECIFICATION $SSHQGL[Q5)((YDOXDWLRQ%RDUG&LUFXLWGLDJUDP xxx xxx U R J U D P P H U LX INVALID FORCEON FORCEOFF GND VCC T1IN T2IN R1OUT R2OUT 1 2 3 4 5 6 7 8 9 10 56(QDEOH'LVDEOH C18 100u/6.3V 3216 VCC_RS232 J3 CON18 S1 VCC SW SPDT JP4 JUMPER R19 10K 0603 VCC_RS232 $',QSXW 7HPSHUDWXUH6HQVRU R14 1K 0603 R16 220 0603 R12 100 0603 MAX3218CAP C21 1nF 0603 RxD C22 100nF 0603 R15 220 0603 U10 R18 220 0603 2 R17 220 0603 VDD Vout GND GND V+ C1+ GND C1VT1OUT T2OUT R1IN R2IN TxD 3 +Vs C25 100nF LM35DZ VCC VCC R7 JP2 + 1 1uF/20V 3216 20 19 18 17 16 15 14 13 12 11 R4 33K 0603 DB9 VCC R8 Not fitted 0603 1 2 3 4 5 6 7 8 9 10 VL VER CSCTRL CSN SO WPN SI SCK RESET GND 15uH 1812 2 0.47uF/25V 3216 + 5 6 , Q F L U F X L W S C17 VCC L5 1 + C16 1 6 2 7 3 8 4 9 5 BD6050 15uH 1812 U3 1uF/20V 3216 J2 L4 1 2 3 4 5 6 7 8 9 10 C15 VCC_RS232 D1 C19 220pF 0603 VCC C23 220pF 0603 C20 220pF 0603 C24 220pF 0603 U4 R3 10K 0603 0 ohm 0603 U2 74LVC1G32 R5 100K 0603 IDC10 1 2 3 4 R6 100K 0603 VCC CS SO WP VSS VCC HOLD SCK SI 8 7 6 5 C14 10nF 0603 25XX320 868/915MHz JP3 JUMPER 33pF, 5% C9 3.9pF, 0.25pF 18pF, 5% 180pF, 5% C10 3.9pF, 0.25pF 18pF, 5% Not fitted Not fitted C12 33pF, 5% 6.8pF, 5% C13 Not fitted Not fitted L1 12nH, 2% 12nH, 2% L2 12nH, 2% 39nH, 5% L3 12nH, 2% 39nH, 5% 1 2 C11 1 433MHz C3 VDD_nRF P00 P01 P02 P03 P04 P05 P06 P07 MOSI (P1.1) MISO (P1.2) SCK (P1.0) EECSN (P1.3) R9 4 R11 10K 0603 U5 74LVC1G125 100K 0603 C6 4.7nF 0603 32 31 30 29 28 27 26 25 U6 1 74LVC1G125 C5 33pF 0603 R13 100 0603 U1 1 2 3 4 5 6 7 8 VDD_nRF P01 P02 P03 VDD VSS P04 P05 P06 Q5)( C9 0603 R2 22K 0603 P00 DVDD_1V2 AREF AIN0 AIN1 AIN2 AIN3 VDD 3 D U D O O H O , Q W H U I D F H VCC 14 13 12 11 10 9 8 7 6 5 4 3 2 1 C7 10nF 0603 24 23 22 21 20 19 18 17 VSS IREF VSS ANT2 ANT1 VDD_PA VSS VDD C11 Not fitted 0603 VDD_nRF C12 0603 C13 0603 xxx J1 SMA L1 0603 L3 0603 C3 0603 C10 0603 NRF9E5 9 10 11 12 13 14 15 16 CON14 L2 0603 5),2 P07 MOSI MISO SCK EECSN XC1 XC2 VSS JP1 1 2 4 U8 74LVC1G125 2 1 U7 74LVC1G125 1 4 RESET 2 RESET 2 4 U9 R10 74LVC1G125 100K 0603 4 2 C8 33pF 0603 XC1 X1 XC2 C4 3.3nF 0603 16 MHz R1 VCC 14 13 12 11 10 9 8 7 6 5 4 3 2 1 1M C1 15pF 0603 C2 15pF 0603 J4 IDC12 xxx Figure A.1.1. Q5)((9%2$5', Main circuitry Nordic VLSI ASA Revision: 1.0 Vestre Rosten 81, N-7075 Tiller, Norway 3DJHRI Phone +4772898900 Fax +4772898989 January 2004 PRODUCT SPECIFICATION $SSHQGL[Q5)((YDOXDWLRQ%RDUG&LUFXLWGLDJUDP xxx JP101 JUMPER 8 5 Power on/off C102 100nF/50V 0805 S102 RESET R104 10K 0603 BYP ADJ RESET R103 10K 2 R106 5.6K (VDD_nRF = 1.8V - 3.6V) + C104 10uF/6V 2 R107 7.5K 0603 C105 100nF/16V R108 4.7K 0603 R109 82K 0603 R101 1K C103 10nF 4 R102 1K RESET VDD_nRF 1 Q101 FDV303N MOSFET N Q102 FDV303N MOSFET N R105 1K 1 1 OUT 4 C101 + 2.2uF/20V IN SHDN GND GND GND J102 2 3 7 6 GND U102 LT1763CS8 VDD 1 1 2 1 S101 J101 xxx 4.5-12V Supply Level Adjust, 1.8V - 3.6V 5 2 3 6 R114 0-10K U103 LT1763CS8 IN SHDN 3 7 6 GND GND GND 8 5 VCC OUT BYP ADJ 1 C106 10nF 4 D101 R110 5.6K + C107 10uF/6V 2 R111 7.5K 0603 R112 4.7K 0603 C108 100nF/16V (VCC = 1.8V - 3.6V) Power LED R115 39ohm 0603 R113 82K 0603 xxx Figure A.1.2. Q5)((9%2$5', Power supply and RESET. Nordic VLSI ASA Revision: 1.0 Vestre Rosten 81, N-7075 Tiller, Norway 3DJHRI Phone +4772898900 Fax +4772898989 January 2004 xxx PRODUCT SPECIFICATION $SSHQGL[Q5)((YDOXDWLRQ%RDUG&LUFXLWGLDJUDP xxx VCC VCC VCC D201 LED1 VCC D202 LED2 LED1 D203 LED3 LED2 D204 LED4xxx LED3 LED4 S206 LED1 LED2 LED3 LED4 1 2 3 4 8 7 6 5 P00 P02 P04 P06 8 7 6 5 P01 P03 P05 P07 P00 P02 P04 P06 SW DIP-4 S205 SW1 SW2 SW3 SW4 xxx 1 2 3 4 P01 P03 P05 P07 SW DIP-4 VCC VCC R201 10K VCC R202 10K SW1 SW2 VCC R203 10K SW3 S201 SW1 S202 SW2 R204 10K SW4 S203 SW3 S204 SW4 xxx Figure A.1.3. Q5)((9%2$5', LEDs and Switches Nordic VLSI ASA Revision: 1.0 Vestre Rosten 81, N-7075 Tiller, Norway 3DJHRI Phone +4772898900 Fax +4772898989 January 2004 PRODUCT SPECIFICATION $SSHQGL[Q5)((YDOXDWLRQ%RDUG3&%OD\RXW a) Top silk screen a) Top view a) Bottom view Figure A.2.1. Q5)((9%2$5' PCB layout The Q5)((9%2$5' is manufactured on a 1.6mm thick, 2 layer FR4 substrate. Nordic VLSI ASA Revision: 1.0 - Vestre Rosten 81, N-7075 Tiller, Norway 3DJHRI - Phone +4772898900 - Fax +4772898989 January 2004 PRODUCT SPECIFICATION $SSHQGL[Q5)((YDOXDWLRQ%RDUG&RPSRQHQWOLVW 'HVLJQDWRU C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 C25 C101 C102 C103 C104 C105 C106 C107 C108 D1 D101 D201 D202 D203 D204 J1 J2 J3 Nordic VLSI ASA Revision: 1.0 'HVFULSWLRQ Capacitor Ceramic Capacitor Ceramic Capacitor Ceramic @ 433MHz @ 868/915MHz Capacitor Ceramic Capacitor Ceramic Capacitor Ceramic Capacitor Ceramic Capacitor Ceramic Capacitor Ceramic @ 433MHz @ 868/915MHz Capacitor Ceramic @ 433MHz @ 868/915MHz Capacitor Ceramic @ 433MHz @ 868/915MHz Capacitor Ceramic @ 433MHz @ 868/915MHz Capacitor Ceramic Capacitor Tantalum Capacitor Tantalum Capacitor Tantalum Capacitor Electrolytic Capacitor Ceramic Capacitor Ceramic Capacitor Ceramic Capacitor Ceramic Capacitor Ceramic Capacitor Ceramic Capacitor Ceramic Capacitor Tantalum Capacitor Ceramic Capacitor Ceramic Capacitor Tantalum Capacitor Ceramic Capacitor Ceramic Capacitor Tantalum Capacitor Ceramic Shottky diode LED, Green LED, Yellow LED, Yellow LED, Yellow LED, Yellow RF I/O RS232 connector ADC input - 3DUW7\SH )RRWSULQW 15pF, +/-5%, 50V, NP0 15pF, +/-5%, 50V, NP0 0603 0603 0603 180pF, +/-5%, 50V, NP0 33pF, +/-5%, 50V, NP0 3.3nF, +/-10%, 50V, X7R 33pF, +/-5%, 50V, NP0 4.7nF, +/-10%, 50V, X7R 10nF, +/-10%, 50V, X7R 33pF, +/-5%, 50V, NP0 &RPPHQW 0603 0603 0603 0603 0603 0603 18pF, +/-5%, 50V, NP0 3.9pF, 0.25pF, 50V, NP0 0603 18pF, +/-5%, 50V, NP0 3.9pF, 0.25pF, 50V, NP0 0603 0603 Not fitted 6.8pF, +/-5%, 50V, NP0 33pF, +/-5%, 50V, NP0 0603 Not fitted Not fitted 10nF, +/-10%, 50V, X7R 1.0F, +/-20%, 20V 1.0F, +/-20%, 20V 0.47F, +/-20%, 35V 100F, +/-20%, 6.3V 220pF, +/-5%, 50V, NP0 220pF, +/-5%, 50V, NP0 1nF, +/-10%, 50V, X7R 100nF, +/-10%, 50V, X7R 220pF, +/-5%, 50V, NP0 220pF, +/-5%, 50V, NP0 100nF, +/-10%, 50V, X7R 2.2F, +/-20%, 20V 100nF, +/-10%, 50V, X7R 10nF, +/-10%, 50V, X7R 10F, +/-20%, 6V 100nF, +/-10%, 50V, X7R 10nF, +/-10%, 50V, X7R 10F, +/-20%, 6V 100nF, +/-10%, 50V, X7R BD6050 SMA 9 pin DSUB 2x5 pin header Vestre Rosten 81, N-7075 Tiller, Norway 3DJHRI - 0603 3216 3216 3216 SMD 0603 0603 0603 0603 0603 0603 0603 3216 0805 0603 3216 0603 0603 3216 0603 SOT-23D 1206 1206 1206 1206 1206 through-hole through-hole through-hole Phone +4772898900 - Fax +4772898989 January 2004 PRODUCT SPECIFICATION $SSHQGL[Q5)((YDOXDWLRQ%RDUG&RPSRQHQWOLVW 'HVLJQDWRU J4 J101 J102 JP1 JP2 JP3 JP4 JP101 L1 L2 L3 L4 'HVFULSWLRQ 3DUW7\SH Test connector 2x7 pin header Power supply connector Test point Parallel interface connector Flat cable connector 14 pin In circuit prog. connector Flat cable connector 10 pin Jumper connection 2 pin header Jumper connection 2 pin header Jumper connection 2 pin header Wire wound chip inductor @ 433MHz: SRF>433MHz 12nH, +/-2% @ 868/915MHz: SRF>915MHz 12nH, +/-2% Wire wound chip inductor @ 433MHz: SRF>433MHz 39nH, +/-5% @ 868/915MHz: SRF>915MHz 12nH, +/-2% Wire wound chip inductor @ 433MHz: SRF>433MHz 39nH, +/-5% @ 868/915MHz: SRF>915MHz 12nH, +/-2% Inductor 15uH )RRWSULQW 0603 0603 1812 L5 Inductor 15uH 1812 Q101 Q102 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R101 R102 R103 R104 R105 R106 R107 R108 R109 DMOS N-Channel DMOS N-Channel Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor FDV303N FDV303N 1M 22k 10k 33k 100k 100k SOT-23 SOT-23 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 Nordic VLSI ASA Revision: 1.0 - 0 ohm 100k 100k 10k 100 100 1k 220 220 220 220 10k 1k 1k 10k 10k 1k 5.6k 7.5k 4.7k 82k Vestre Rosten 81, N-7075 Tiller, Norway 3DJHRI - &RPPHQW through-hole through-hole through-hole GND for test equipment through-hole through-hole through-hole through-hole through-hole 0603 Phone +4772898900 Saturation current > 350 mA, R < 1 ohm Saturation current > 350 mA, R < 1 ohm 1% 1% 1% 1% 1% 1% Not fitted 1% 1% 1% 1% 1% 1% 1% 1% 1% 1% 1% 1% 1% 1% 1% 1% 1% 1% 1% 1% 1% - Fax +4772898989 January 2004 PRODUCT SPECIFICATION $SSHQGL[Q5)((YDOXDWLRQ%RDUG&RPSRQHQWOLVW 'HVLJQDWRU 'HVFULSWLRQ 3DUW7\SH )RRWSULQW R110 R111 R112 R113 R114 R115 R201 R202 R203 R204 S1 S101 S102 S201 S202 S203 S204 S205 S206 U1 Resistor Resistor Resistor Resistor Dual gang potentiometer Resistor Resistor Resistor Resistor Resistor Slide switch, RS232 Enable/Disable Slide switch, Power on/off Tact switch, RESET Keyboard switch, SW1 Keyboard switch, SW2 Keyboard switch, SW3 Keyboard switch, SW4 Four positions DIP switch Four positions DIP switch Nordic VLSI, 433/868/915MHz RF Transceiver with MCU and ADC 4 kbyte serial EEPROM with SPI interface Maxim, RS-232 Transceiver OR gate Bus buffer/line driver Bus buffer/line driver Bus buffer/line driver Bus buffer/line driver Bus buffer/line driver National Semiconductor, temperature sensor Linear Technology, adjustable LDO voltage regulator Linear Technology, adjustable LDO voltage regulator Toyocom Devices, 16MHz crystal 5.6k 7.5k 4.7k 82k 0-10k 39 10k 10k 10k 10k Q5)( 0603 0603 0603 0603 through-hole 0603 0603 0603 0603 0603 through-hole through-hole SMD SMD SMD SMD SMD SMD SMD QFN32L/5x5 25XX320 MAX3218CAP 74LVC1G32 74LVC1G125 74LVC1G125 74LVC1G125 74LVC1G125 74LVC1G125 LM35DZ SO-8 SSO-20 SOT353-5 SOT353-5 SOT353-5 SOT353-5 SOT353-5 SOT353-5 TO-92 LT1763CS8 SO-8 LT1763CS8 SO-8 TSX-10A SMD U2 U3 U4 U5 U6 U7 U8 U9 U10 U102 U103 X1 Jumper Jumper Jumper &RPPHQW 1% 1% 1% 1% 1% 1% 1% 1% 1% LxWxH = 4.0x2.5x0.8mm, CL=9pF, ESR < 100 ohm, tolerance + temperature drift < +/- 30 ppm Short circuit for JP3 Short circuit for JP4 Short circuit for JP101 Table A.3.1: Q5)((9%2$5' Component list Nordic VLSI ASA Revision: 1.0 - Vestre Rosten 81, N-7075 Tiller, Norway 3DJHRI - Phone +4772898900 - Fax +4772898989 January 2004 PRODUCT SPECIFICATION Q5)((YDOXDWLRQ%RDUG '(),1,7,216 3URGXFWVSHFLILFDWLRQ This Evaluation Board documentation contains final product specifications. Nordic VLSI ASA reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. /LPLWLQJYDOXHV Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Specifications sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. $SSOLFDWLRQLQIRUPDWLRQ Where application information is given, it is advisory and does not form part of the specification. Table 3: Definitions Nordic VLSI ASA reserves the right to make changes without further notice to the product to improve reliability, function or design. Nordic VLSI does not assume any liability arising out of the application or use of any product or circuits described herein. /,)(6833257$33/,&$7,216 These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Nordic VLSI ASA customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Nordic VLSI ASA for any damages resulting from such improper use or sale. Product specification, revision date : 30.01.2004 All rights reserved (R). Reproduction in whole or in part is prohibited without the prior written permission of the copyright holder. Nordic VLSI ASA Revision: 1.0 - Vestre Rosten 81, N-7075 Tiller, Norway 3DJHRI - Phone +4772898900 - Fax +4772898989 January 2004 PRODUCT SPECIFICATION Q5)((YDOXDWLRQ%RDUG <285127(6 Nordic VLSI ASA Revision: 1.0 - Vestre Rosten 81, N-7075 Tiller, Norway 3DJHRI - Phone +4772898900 - Fax +4772898989 January 2004 PRODUCT SPECIFICATION Q5)((YDOXDWLRQ%RDUG 1RUGLF9/6,:RUOG:LGH'LVWULEXWRUV )RU<RXUQHDUHVWGHDOHUSOHDVHVHHKWWSZZZQYOVLQR 0DLQ2IILFH Vestre Rosten 81, N-7075 Tiller, Norway Phone: +47 72 89 89 00, Fax: +47 72 89 89 89 9LVLWWKH1RUGLF9/6,$6$ZHEVLWHDWKWWSZZZQYOVLQR Nordic VLSI ASA Revision: 1.0 - Vestre Rosten 81, N-7075 Tiller, Norway 3DJHRI - Phone +4772898900 - Fax +4772898989 January 2004