MDT10P20(BF)
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1. General Description
This EPROM-Based 8-bit micro-controller
uses a fully static CMOS design
technology combines higher speed and
smaller size with the low power and high
noise immunity of CMOS.
On chip memory system includes 2.0 K
bytes of ROM, and 80 bytes of static
RAM.
2. Features
The followings are some of the features
on the hardware and software :
Fully CMOS static design
8-bit data bus
On chip ROM size : 2 K words
Internal RAM size : 80 bytes
(72 general purpose, 8 special registers)
36 single word instructions
14-bit instructions
2-level stacks
Operating voltage : 2.3 V ~ 6.0 V
Operating frequency : 0 ~ 20 MHz
The most fast execution time is 200
ns under 20 MHz in all single cycle
instructions except the branch
instruction.
Addressing modes include direct,
indirect and relative addressing
modes
Power-on Reset (POR), only available
while PED is Disable
Power Edge-detector Reset
Sleep mode for power saving
4 oscillator start-up time :
150 μs, 20 ms, 40 ms, 80 ms
8-bit real time clock/counter(RTCC)
with 8-bit programmable prescaler
4 types of oscillator can be selected
by code options :
RC－Low cost RC oscillator
LFXT－Low frequency crystal
oscillator
XTAL－Standard crystal oscillator
HFXT－High frequency crystal
oscillator
On-chip RC oscillator based
Watchdog Timer(WDT) can be operated
freely
20 I/O pins with their own
independent direction control
3. Applications
The application areas of this MDT10P20
range from appliance motor control and
high speed automotive to low power
remote transmitters/receivers, pointing
devices, and telecommunications
processors, such as Remote controller,
small instruments, chargers, toy,
automobile and PC peripheral … etc.
MDT10P20(BF)
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4. Pin Assignment
DIP / SOP / SKINNY
RTCC 1 28 /MCLR
Vdd 2 27 OSC1
N/C 3 26 OSC2
V
ss 4 25 PC7
N/C 5 24 PC6
PA0 6 23 PC5
PA1 7 22 PC4
PA2 8 21 PC3
PA3 9 20 PC2
PB0 10 19 PC1
PB1 11 18 PC0
PB2 12 17 PB7
PB3 13 16 PB6
PB4 14 15 PB5
SSOP
VSS 1 28 /MCLR
RTCC 2 27 OSC1
VDD 3 26 OSC2
VDD 4 25 PC7
PA0 5 24 PC6
PA1 6 23 PC5
PA2 7 22 PC4
PA3 8 21 PC3
PB0 9 20 PC2
PB1 10 19 PC1
PB2 11 18 PC0
PB3 12 17 PB7
PB4 13 16 PB6
VSS 14 15 PB5
5. Pin Function Description
Pin Name I/O Function Description
PA0~PA3 I/O Port A, TTL input level
PB0~PB7 I/O Port B, TTL input level
PC0~PC7 I/O Port C, TTL input level
RTCC I Real Time Clock/Counter, Schmitt Trigger input levels
/MCLR I Master Clear, Schmitt Trigger input levels
OSC1 I Oscillator Input
OSC2 O Oscillator Output
Vdd Power supply
Vss Ground
MDT10P20(BF)
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6. Memory Map
(A) Register Map
Address Description
00 Indirect Addressing Register
01 RTCC
02 PC
03 STATUS
04 MSR
05 Port A
06 Port B
07 Port C
08~0F Internal RAM, General Purpose Register
10~1F Internal Memory Select Register
30~3F Internal Memory Select Register
50~5F Internal Memory Select Register
70~7F Internal Memory Select Register
(1) IAR ( Indirect Address Register) : R0
(2) RTCC (Real Time Counter/Counter Register) : R1
(3) PC (Program Counter) : R2
Write PC, CALL --- always 0
LJUMP, JUMP, LCALL --- from instruction word
RTWI, RET --- from STACK
A10 A9 A8 A7~A0
Write PC, JUMP, CALL --- from STATUS b6 b5
LJUMP, LCALL --- from instruction word
RTWI, RET --- from STACK
Write PC --- from ALU
LJUMP, JUMP, LCALL, CALL --- from instruction word
RTWI, RET --- from STACK
MDT10P20(BF)
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(4) STATUS (Status register) : R3
Bit Symbol Function
0
1
2
3
4
6—5
7
C
HC
Z
PF
TF
page
——
Carry bit
Half Carry bit
Zero bit
Power loss Flag bit
Time overflow Flag bit
Page select bit :
00 : 000H --- 1FFH
01 : 200H --- 3FFH
10 : 400H --- 5FFH
11 : 600H --- 7FFH
General purpose bit
(5) MSR (Memory Select Register) : R4
Memory Select Register :
00 : 10~1F
01 : 30~3F
10 : 50~5F
11 : 70~7F
b7 b6 b5 b4 b3 b2 b1 b0
Read only “1”
Indirect Addressing Mode
(6) PORT A : R5
PA3~PA0, I/O Register
(7) PORT B : R6
PB7~PB0, I/O Register
(8) PORT C : R7
PC7~PC0, I/O Register
MDT10P20(BF)
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(9) TMR (Time Mode Register)
Bit Symbol Function
Prescaler Value RTCC rate WDT rate
2—0
PS2—0
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
3
PSC Prescaler assignment bit :
0 — RTCC
1 — Watchdog Timer
4
TCE RTCC signal Edge :
0 — Increment on low-to-high transition on RTCC pin
1 — Increment on high-to-low transition on RTCC pin
5
TCS RTCC signal set :
0 — Internal instruction cycle clock
1 — Transition on RTCC pin
(10) CPIO A, CPIO B, CPIO C (Control Port I/O Mode Register)
The CPIO register is “write-only”
＝“0”, I/O pin in output mode;
＝“1”, I/O pin in input mode.
(11) EPROM Option by Writer Programming:
Oscillator Type Oscillator Start-up Time
RC Oscillator 150 μs,20ms,40ms,80ms
HFXT Oscillator 20 ms,40ms,80ms
XTAL Oscillator 20ms,40 ms,80ms
LFXT Oscillator 40ms,80 ms
Watchdog Timer control
Watchdog timer disable all the time
Watchdog timer enable all the time
MDT10P20(BF)
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Power Edge Detect Security bit
PED Disable Security weak Disable
PED Enable Security Disable
Security Enable
7. Reset Condition for all Registers
Register Address Power-On Reset /MCLR or WDT Reset
CPIO A －－ 1111 1111 1111 1111
CPIO B －－ 1111 1111 1111 1111
CPIO C －－ 1111 1111 1111 1111
TMR －－ --11 1111 --11 1111
IAR 00h － －
RTCC 01h xxxx xxxx uuuu uuuu
PC 02h 1111 1111 1111 1111
STATUS 03h 0001 1xxx 000# #uuu
MSR 04h 100x xxxx 100u uuuu
PORT A 05h - - - - xxxx - - - - uuuu
PORT B 06h xxxx xxxx uuuu uuuu
PORT C 07h xxxx xxxx uuuu uuuu
Note : u = unchanged, x = unknown, - = unimplemented, read as “0”
# = value depends on the condition of the following table
Condition Status: bit 4 Status: bit 3
/MCLR reset (not during SLEEP) u u
/MCLR reset during SLEEP 1 0
WDT reset (not during SLEEP) 0 1
WDT reset during SLEEP 0 0
MDT10P20(BF)
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8. Instruction Set
Instruction Code Mnemonic
Operands Function Operating Status
0
10000 00000000 NOP No operation None
0
10000 00000001 CLRWT Clear Watchdog timer 0→WT TF, PF
0
10000 00000010 SLEEP Sleep mode 0→WT,stop OSC TF, PF
0
10000 00000011 TMODE Load W to TMODE register W→TMODE None
0
10000 00000100 RET Return Stack→PC None
0
10000 00000rrr CPIO R Control I/O port register W→CPIO r None
0
10001 1rrrrrrr STWR R Store W to register W→R None
0
11000 trrrrrrr LDR R， t Load register R→t Z
111010 iiiiiiii LDWI I Load immediate to W I→W None
0
10111 trrrrrrr SWAPR R，t Swap halves register
[R(0~3) ↔
R(4~7)]→t None
0
11001 trrrrrrr INCR R，t Increment register R + 1→t Z
0
11010 trrrrrrr INCRSZ R， Increment register，skip if
zero R + 1→t None
0
11011 trrrrrrr ADDWR R，t Add W and register W + R→t C，HC，Z
0
11100 trrrrrrr SUBWR R，t Subtract W from register R ﹣W→t
(R+/W+1→t) C，HC，Z
0
11101 trrrrrrr DECR R，t Decrement register R ﹣1→t Z
0
11110 trrrrrrr DECRSZ R，t Decrement register，
skip if zero R ﹣1→t None
0
10010 trrrrrrr ANDWR R，t AND W and register R ∩ W→t Z
110100 iiiiiiii ANDWI I AND W and immediate I ∩ W→W Z
0
10011 trrrrrrr IORWR R，t Inclu. OR W and register R ∪ W→t Z
110101 iiiiiiii IORWI I Inclu. OR W and immediate I ∪ W→W Z
0
10100 trrrrrrr XORWR R，t Exclu. OR W and register R ♁ W→t Z
110110 iiiiiiii XORWI I Exclu. OR W and immediate I ♁ W→W Z
0
11111 trrrrrrr COMR R， t Complement register
/R→t Z
0
10110 trrrrrrr RRR R，t Rotate right register R(n)→R(n-1)，
C→R(7) R(0)→CC
0
10101 trrrrrrr RLR R， t Rotate left register R(n)→(n+1)，
C→R(0) R(7)→CC
0
10000 1xxxxxxx CLRW Clear working r egist er 0→W Z
0
10001 0rrrrrrr CLRR R Clear register 0→R Z
0
000bb brr
r
rrrr BCR R， b Bit clear 0→R(b) None
0
010bb brrrrrrr BSR R， b Bit set
1→R(b) None
MDT10P20(BF)
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Instruction Code Mnemonic
Operands Function Operating Status
0
001bb brrrrrrr BTSC R， b Bit Test，skip if clear Skip if R(b)=0 None
0
011bb brrrrrrr BTSS R， b Bit Test，skip if set Skip if R(b)=1 None
100nnn nnnnnnnn LCALL n Long CALL subroutine n→PC，
PC+1→Stack None
101nnn nnnnnnnn LJUMP n Long JUMP to address n→PC None
110000 nnnnnnnn CALL n Call subroutine n→PC,
PC+1→Stack None
110001 iiiiiiii RTWI i Return, place immediate to
W Stack→PC,
i→W None
11001n nnnnnnnn JUMP n JUMP to address
n→PC None
Note :
W : Working register b : Bit position
WT : Watchdog timer t : Target
TMODE : TMODE mode register 0 : Working register
CPIO : Control I/O port register 1 : General register
TF : Timer overflow flag R : General register address
PF : Power loss flag C : Carry flag
PC : Program Counter HC : Half carry
OSC : Oscillator Z : Zero flag
Inclu. : Inclusive ‘∪’ / : Complement
Exclu. : Exclusive ‘♁’ x : Don’t care
AND : Logic AND ‘∩’ i : Immediate data ( 8 bits )
n : Immediate address
9. Electrical Characteristics
(A) Operating Voltage & Frequency
Vdd ﹕2.3 V ~ 6.0 V
Frequency﹕0 Hz ~ 20 MHz
(B) Input Voltage
@ Vdd＝5.0 V, Temperature＝25 ℃
Port Min. Max.
Vil PA, PB, PC
RTCC, /MCLR Vss
Vss 1.0 V
1.0 V
Vih PA, PB, PC
RTCC, /MCLR 2.0 V
3.3 V Vdd
Vdd
＊
Threshold Voltage :
MDT10P20(BF)
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Port A, Port B, Port C Vth＝1.5 V
RTCC, /MCLR Vil＝1.2 V, Vih＝3.1V (Schmitt Trigger)
(C) Output Voltage
@ Vdd＝5.0 V, Temperature＝25 ℃, the typical value as followings :
PA, PB, PC Port
Ioh＝－20.0 mA Voh＝3.40 V
Iol＝20.0 mA Vol＝0.50 V
Ioh＝－5.0 mA Voh＝4.50 V
Iol＝5.0 mA Vol＝0.10 V
(D) Leakage Current
@ Vdd＝5.0 V, Temperature＝25 ℃, the typical value as followings :
Iil － 0.1μA (Max.)
Iih ＋ 0.1 μA (Max.)
(E) Sleep Current
@WDT－Disable, Temperature＝25 ℃, the typical value as followings :
Vdd＝2.3 V Idd＜1.0 μA
Vdd＝3.0 V Idd＜1.0 μA
Vdd＝4.0 V Idd＜1.0 μA
Vdd＝5.0 V Idd＜1.0 μA
Vdd＝6.0 V Idd＜1.0 μA
@WDT－Enable, Temperature＝25 ℃, the typical value as followings :
Vdd＝2.3 V Idd＜1.0 μA
Vdd＝3.0 V Idd＝3.0 μA
Vdd＝4.0 V Idd＝6.0 μA
Vdd＝5.0 V Idd＝11.0 μA
Vdd＝6.0 V Idd＝17.0 μA
MDT10P20(BF)
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F) Operating Current
Temperature＝25℃, the typical value as followings :
(i) OSC Type＝RC; WDT－Enable; @ Vdd＝5.0 V PED=Disable
Cext. (F) Rext. (Ohm) Frequency (Hz) Current (A)
4.7 K 11.24 M 1.2 mA
10.0 K 5.92 M 650 µA
3P 47.0 K 1.38M 230 μA
100.0 K 658 K 165 μA
300.0 K 224 K 130 μA
470.0 K 141 K 120 μA
4.7 K 5.44 M 610 µA
10.0 K 2.75 M 366 μA
20P 47.0 K 624 K 166 μA
100.0 K 295 K 138 μA
300.0 K 100 K 120 μA
470.0 K 63 K 117 μA
4.7 K 1.77 M 288 μA
10.0 K 884 K 200 μA
100P 47.0 K 195 K 140 μA
100.0 K 92 K 128 μA
300.0 K 31 K 125 μA
470.0 K 20 K 122 μA
4.7 K 684 K 187 μA
10.0 K 336 K 155 μA
300P 47.0 K 74 K 130 μA
100.0 K 35 K 127 μA
300.0 K 12 K 126 μA
470.0 K 7 K 125 μA
MDT10P20(BF)
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(ii) OSC Type＝LF (OSC1&OSC2 External Cap about 10P); WDT－Disable﹔
PED=Disable
Voltage/Frequency 32
K(Ext100P) 455 K (Ext50P) 1 M Sleep
2.3 V 7.0 μA 2.6V@25.0 μA40.0 μA ＜1.0 μA
3.0 V 15.0 μA 45.0 μA 65.0 μA ＜1.0 μA
4.0 V 35.0μA 85.0 μA 115.0 μA ＜1.0 μA
5.0 V 70.0 μA 140.0 μA 180.0 μA ＜1.0 μA
6.0 V 130.0 μA 215.0 μA 260.0 μA ＜1.0 μA
(iii) OSC Type＝XT (OSC1&OSC2 External Cap about 10P); WDT－Enable﹔
PED=Disable
Voltage/Frequency 1 M 4 M 10 M Sleep
2.1 V 50.0 μA 120.0 μA 290 μA ＜1.0 μA
3.0 V 100.0 μA 230.0 μA 490 μA 3.0 μA
4.0 V 210.0 μA 400.0 μA 650 μA 6.0 μA
5.0 V 375.0 μA 590.0 µA 1.3 mA 11.0 μA
6.0 V 645.0 μA 850.0 µA 1.6 mA 17.0 μA
(iv) OSC Type＝HF (OSC1&OSC2 External Cap about 10P); WDT－Enable﹔PED=Disable
Voltage/Frequency 4 M 10 M 20 M Sleep
2.1 V 150.0 μA 320.0 μA X ＜1.0 μA
3.0 V 280.0 μA 550.0 µA 950.0 µA 3.0 μA
4.0 V 510.0 μA 910.0 µA 1.5 mA 6.0 μA
5.0 V 800.0 μA 1.4 mA 2.3 mA 11.0 μA
6.0 V 1.3 mA 1.9 mA 3.2 mA 17.0 μA
MDT10P20(BF)
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(G) Power Edge-detector Reset Voltage (Not in Sleep Mode), @ Vdd＝5.0 V (PED : Enable)
Vpr≦1.6~1.8 V Vpr ﹕Vdd (Power Supply)
PS. If PED_Enable then Internal Power_on_reset will be off
(H) The basic WDT time-out cycle time
@Temperature＝25 ℃, the typical value as followings :
Vdd =5.0 V, Temperature=25℃,the typical value as followings:
Voltage (V) Basic WDT time-out cycle time (ms)
2.3 25.2
3.0 22.4
4.0 20.4
5.0 18.8
6.0 18.0
MDT10P20(BF)
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10. Port A ,Port B and Port C Equivalent Circuit
Working Register
I/O Control
Write
Data Bus
Read
Data O/P
Latch
D
CK
D
I/O
Control
Latch
CK
Q
B
Q
Q
CK
Q
B
D
Input Resistor
Port I/O Pin
Data I/P
Latch
TTL Input Level
Data I/P
MDT10P20(BF)
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11. MCLRB and RTCC Input Equivalent Circuit
R 1 K
≒
Schmitt Trigger
MCLRB
R 1 K
≒
Schmitt Trigger
RTCC
MDT10P20(BF)
This specification are subject to be changed without notice. Any latest information please preview
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12. Block Diagram
Stack Two Levels
Program Counters
Oscillator Circuit
Power on Reset
Power Down Reset
8-bit Timer/Counter
EPROM
2048×14
Instruction
Register
Instruction
Decoder
Working Register
ALU
Prescale
RAM
72*8
Special Register
Control Circuit
Status Register
WDT/OST
Timer
Port A
Port B
Port C
OSC1 OSC2 MCLR
Data 8-bit
RTCC
11 bits
11 bits 14 bits
Port
PA0~PA3
4 bits
Port
PB0~PB7
8 bits
Port
PC0~PC7
8 bits
D0~D7
MDT10P20(BF)
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13. External Capacitor Selection For Crystal Oscillator
@ Vdd＝3.0 V~ 5.0 V
Osc. Type Resonator Freq. C1 C2
20 MHz 5 pF ~10 pF 10 pF~30 pF
HF 10 MHz 10 pF ~50 pF 20 pF ~100 pF
4 MHz 10 pF ~50 pF 20 pF ~100 pF
10 MHz 10 pF ~30 pF 10 pF ~50 pF
XT 4 MHz 10 pF ~50 pF 20 pF ~100 pF
1 MHz 10 pF ~30 pF 20 pF ~50 pF
1 MHz 3 pF ~5 pF 3 pF ~5 pF
LF 455 K 10 pF ~30 pF 20 pF ~50 pF
32 K 10 pF ~20 pF 15 pF ~30 pF
MDT10P20
OSC1 OSC2
C1 C2
To increase the stability of oscillator and the ability of anti-noise, the above values of the
external capacitor range can be recommended for reference, but the higher capacitance also
increases the start-up time.
