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FEATURES
Temperature measurements require no
external components
Measures temperatures from -55°C to +125°C
in 0.03125°C increments. Fahrenheit
equivalent is -67°F to +257°F in 0.05625°F
increments
Temperature is read as a 13-bit value (two
byte transfer)
Converts temperature to digital word in 1
second (max)
256 bytes of E2 memory on board for storing
information such as frequency compensation
coefficients
Data is read from/written via a 2-wire serial
interface (open drain I/O lines)
Applications include temperature-
compensated crystal oscillators for test
equipment and radio systems
8-pin DIP or SOIC packages
PIN ASSIGNMENT
PIN DES CRIPTION
SDA - 2-Wire Serial Data Input/Output
SCL - 2-Wire Serial Clock
GND - Ground
A0 - Chip Address Input
A1 - Chip Address Input
A2 - Chip Address Input
VDD - Power Supply (+2.7V to +5.5V)
NC - No Connection
DESCRIPTION
The DS1624 consists of a digital thermometer and 256 bytes of E2 memory. The thermometer provides
13-bit temperature readings which indicate the temperature of the devic e. The E2 memory allows a user to
store frequency compensation coefficients for digital correction of crystal frequency due to temperature.
Any other type of information may also reside in this user space.
DS1624
Digital Thermometer and Memory
19-6288; Rev 5/12
www.maxim-ic.com
6
3
1
2
4
7
5
SDA
SCL
NC
GND
VDD
A0
A1
A2
DS1624S 8-PIN SOIC (208 MIL)
6
3
1
2
4
7
5
SDA
SCL
NC
GND
VDD
A0
A1
A2
DS1624 8-PIN PDIP (30 0 MIL)
DS1624
2 of 20
ORDERING INFORMATION
ORDERING
INFORMATION
PACKAGE
MARKING
DESCRIPTION
DS1624+
DS1624
DS1624 in Lead-Free 300 mil 8-pin DIP
DS1624S+
DS1624S
DS1624 in Lead-Free 208 mil 8-pin SO
DS1624S+T&R
DS1624S
DS1624 in Lead-Free 208 mil 8-pin SO, 2000 Piece Tape-
and-Reel
A “+” symbol will also be marked on the package near the Pin 1 indicator.
DET AILED PIN DE S CRIPTIO N Ta ble 1
PIN
SYMBOL
DESCRIPTION
1
SDA
Data input/output pin for 2-wire serial communication port.
2
SCL
Clock input/output pin for 2-wire serial communication port.
3
NC
No connect. No Internal Connection.
4
GND
Ground pin.
5
A2
Address input pin.
6
A1
Address input pin.
7
A0
Address input pin.
8
VDD
Supply Voltage 2.7V to 5.5V input power pin.
OVERVIEW
A block diagram of the DS1624 is shown in Figure 1. The DS1624 consists of two separate functional
units: 1) a 256–byte nonvolatile E2 memory, and 2) a direct–todigital temperature sensor.
The nonvolatile memory is made up of 256 bytes of E2 memory. This memory may be used to store any
type of information the user wishes; for example, frequency compensation coefficients may be placed in
this memory to allow for compensation of measured frequency depending upon the temperature at which
the measurement is made. These memory locations are accessed through the 2wire serial bus.
The direct to digital temperature sensor allows the DS1624 to measure the ambient temperature and
report the temperature value in a 13–bit word, wit h 0.03125°C resolution. The temperature sensor and i ts
related registers are accessed through the 2wire serial interface.
DS1624
3 of 20
DS1624 FUNCTIONAL BLOCK DIAGR AM Figure 1
2-WIRE SERIAL DATA BUS
The DS1624 supports a bi–directional twowire bus and data transmission protocol. A device that sends
data onto the bus is defined as a transmitter, and a device receiving data as a receiver. The device that
control s the mes sage is called a “m aster”. The de vices t hat are cont roll ed b y the m aster are “slaves ”. The
bus must be controlled by a master device which generates the serial clock (SCL), controls the bus access,
and generates the START and STOP conditions. The DS1624 operates as a slave on the two–wire bus.
Connections to the bus are made via the open–drain I/O lines SDA and SCL. The following bus protocol
has been defined (See Figure 2):
Data transfer may be initiated only when the bus is not busy.
During data transfer, the data line must remain stable whenever the clock line is HIGH. Changes in
the data line while the clock line is high will be interpreted as control signals.
Accordingly, the following bus conditions have been defined:
Bus not busy: Both data and clock lines remain HIGH.
Start data transfer: A change in the state of the data line, from HIGH to LOW, while the clock is HIGH,
defines a START condition.
Stop data transfer: A change in the state of the data line, from LOW to HIGH, while the clock line is
HIGH, defines the STOP condition.
STATU S RE G ISTE R &
CONTROL LOGIC
TEMPERATURE SENSOR
EEPROM MEMORY (256 BYTES)
ADDRESS
AND
I/O CONTROL
VDD
SCL
SDA
A1
A2
A0
GND
DS1624
4 of 20
Data valid: The state of the data line represents valid data when, after a START condition, the data line
is stable for the duration of the HIGH period of the clock signal. The data on the line must be changed
during the LOW period of the clock signal. There is one clock pulse per bit of data.
Each data transfer is initiated with a START condition and terminated with a STOP condition The
number of data bytes transferred between START and STOP conditions is not limited, and is determined
by the master device. The information is transferred byte–wise and each receiver acknowledges with a
ninth bit.
Within the bus specifications a regular mode (100 KHz clock rate) and a fast mode (400 KHz clock rate)
are defined. The DS1624 works in both modes.
Acknowledge: Each receiving device, when addressed, is obliged to generate an acknowledge after the
reception of each byte. The master device must generate an extra clock pulse which is associated with this
acknowledge bit.
A device that acknowledges must pull down the SDA line during the acknowledge clock pulse in such a
way that the SDA line is stable LOW during the HIGH period of the acknowledge related clock pulse. Of
course, setup and hold times must be taken into account. A master must signal an end of data to the slave
by not generating an acknowledge bit on the last byte that has been clocked out of the sl ave. In thi s case,
the slave must leave the data line HIGH to enable the master to generate the STOP condition.
DATA TRANSFER ON 2-WIRE SERIAL BUS Figure 2
Figure 2 details how data transfer is accomplished on the two–wire bus. Depending upon the state of the
R/
W
bit, two types of data transfer are possible:
1. Data transfer from a master transmitter to a slave receiver. The first byte transmitted by the
master is the slave address. Next follows a number of data bytes. The slave returns an acknowledge
bit after each received byte.
2. Data transfer from a slave transmitter to a master receiver. The first byte (the slave
address) is transmitted by the master. The slave then returns an acknowledge bit. Next follows a
number of data bytes transmitted by the slave to the master. The master returns an acknowledge bit
DS1624
5 of 20
after all received bytes other than the last byte. At the end of the last received byte, a ‘not
acknowledge’ is returned.
The master device generates all of the serial clock pulses and the START and STOP conditions. A
transfer is ended with a STOP condition or with a repeated START condition. Since a repeated START
condition is also the beginning of the next serial transfer, the bus will not be released.
The DS1624 may operate in the following two modes:
1. Slave receiver mode: Serial data and cl ock a re recei ved thr ough S DA an d SC L. After each byte i s
received an acknowledge bit is transmitted. START and STOP conditions are recognized as the
beginning and end of a serial transfer. Address recognition is performed by hardware after reception
of the slave address and direction bit.
2. Slave transmitter mode: The first byte is received and handled as in the slave receiver mode.
However, in this mode the direction bit will indicate that the transfer d irectio n is reversed . Serial d ata
is transmitted on SDA by the DS1624 while the serial clock is input on SCL. START and STOP
conditions are recognized as the beginning and end of a serial transfer.
SLAVE ADDRESS
A control byte is the first byte received following the START condition from the master device. The
control byte consists of a four bit control code; for the DS1624, this is set as 1001 binary for read and
write operations. The next three bits of the control byte are the device s elect bits (A2, A1, A0). They are
used b y t he master d evice to s elect which o f eight dev ices are to be accessed . These bits a re in effe ct the
three least significant bits of the slave address. The last bit of the control byte (R/
W
) defines the
operation to be performed. When set to a “1”, a read operation is selected, when set to a “0”, a write
operation is selected. Following the START condition the DS1624 monitors the SDA bus checking the
device type identifier being transmitted. Upon receiving the 1001 code and appropriate device select bits,
the slave device outputs an acknowledge signal on the SDA line.
2-WIRE SERIAL COMMUNIC ATION WI TH DS 1 6 2 4 Figure 3
DS1624
6 of 20
OPERATION-ME ASURING TEM P E RATURE
A block diagram of the DS1624 is shown in Figure 1. The DS1624 measures temperatures through the
use of an on–board proprietary temperature measurement technique. A block diagram of the temperature
measurement circuitry is shown in Figure 4.
The DS1624 measures temperature by counting the number of clock cycles that an oscillator with a low
temperature coefficient goes through during a gate period determined by a high temperature coefficient
oscillator. The counter is preset with a base count that corresponds to –55°C. If the counter reaches zero
before the gate period is over the temperature register, which is also preset to the –55°C value, is
incremented indicating that the temperature is higher than –55°C.
At the same time, the counter is preset with a value determined by the slope accumulator circuitry. This
circuitry is needed to compensate for the parabolic behavior of the oscillators over temperature. The
counter is then clocked again until it reaches zero. If the gate period is still not finished, then this process
repeats.
The slope accumulator is used to compensate for the nonlinear behavior of the oscillators over
temperature, yielding a high resolution temperature measurement. This is done by changing the number
of counts necessary for the counter to go through for each incremental degree in temperature. To obtain
the desired resolution, both the value of the counter and the number of counts per °C (the value of the
slope accumulator) at a given temperature must be known.
DS1624
7 of 20
TEMPE RATURE MEASURING CI RCUITRY Figure 4
Internally, this calculation is performed by the DS1624 to provide 0.03125°C resolution. The temperature
reading is provided in a 13–bit, two’s complement reading by issuing READ TEMPERATURE
command. Table 2 describes the exact relationship of output data to measured temperature. The data is
transmitted serially through the 2wire serial interface, MSB fi rst. The DS 1624 can measu re temperatur e
over the range of -55°C to +125°C in 0.03125°C increments. For Fahrenheit usage a lookup table or
conversion factor must be used.
TEMPE RATURE/DATA RELATIONSHIP S Table 2
TEMP
DIGITAL OUTPUT
(Binary)
DIGITAL OUTPUT
(Hex)
+125˚C
01111101 00000000
7D00h
+25.0625˚C
00011001 00010000
1910h
+½˚C
00000000 10000000
0080h
0˚C
00000000 00000000
0000h
-½˚C
11111111 10000000
FF80h
-25.0625˚C
11100110 11110000
E6F0h
-55˚C
11001001 00000000
C900h
Since data is transmitted over the 2wire bus MSB first, temperature data may be written to/read fr om the
DS1624 as either a single byte (with temperature resolution of 1°C) or as two bytes, the second byte
containing the value of the 5 least significant bits of the temperature reading as shown in Table 1. Note
that the remaining three bits of this byte are set to all 0’s.
SLOPE AC CUMUL ATOR
PRESET
COMPARE
LOW TEMPERATURE
COEFFICIENT OSCILLATOR
COUNTER
PRESET
=0
TEMPERATURE REGISTER
HIGH TEMPERATURE
COEFFICIENT OSCILLATOR
COUNTER
=0
INC
STOP
SET/CLEAR
LSB
DS1624
8 of 20
Temperature is represented in the DS1624 in terms of a 0.03125°C LSB, yielding the following 13bit
format:
OPER ATION AND CONTROL
A configuration/status register is used to determine the method of operation of the DS1624 will use in a
particular application as well as indicating the status of the temperature conversion operation.
The configuration register is defined as follows:
CONFIGURATION/STATUS REGISTER
where
DONE = Conversion Done bit. “1” = Conversion complete, “0” = conversion in progress.
1SHOT = One Shot Mode. If 1SHOT is “1”, the DS1624 will perform one temperature conversion upon
receipt of the Start Convert T protocol. If 1SHOT is “0”, the DS1624 will continuously perform
temperature conversions. This bit is nonvolatile and the DS1624 is shipped with 1SHOT = “0”.
Since the configuration register is implemented in E2, writes to the register require 10 ms to complete.
After issuing a command to write to the configuration register, no further accesses to the DS1624 should
be made for at least 10 ms.
OPERATION – MEMORY
BYTE PROGRAM MODE
In this mode, the master sends addresses and one data byte to the DS1624.
Following a START condition, the device code (4–bit), the slave address (3 bit), and the R/
W
bit, which
is lo gic LOW, are plac ed ont o t he b us b y the m aster. T he mast er then send s the Access Memor y protocol.
This indicates to the addressed DS1624 that a byte with a word address will follow after it has generated
an acknowledge bit. Therefore, the next byte transmitted by the master is the word address and will be
written into the address pointer of the DS1624. After receiving the acknowledge of the DS1624, the
master device transmits the data word to be written into the addressed memory location. The DS1624
acknowledges again and the master generates a STOP condition. This initiates the internal programming
cycle of the DS1624. A repeated START condition, instead of a STOP condition, will abort the
programming operation.
During the programming cycle the DS1624 will not acknowledge any further accesses to the device until
the programming cycle is complete (approximately 10 ms.)
0
0
0
1
0
1
0
1
0
0
0
1
0
0
0
0
LSB
= +25.0625°C
MSB
DONE
1
0
0
1
0
1
1SHOT
DS1624
9 of 20
PAGE PROGRAM MODE
To program the DS1624 the master sends addresses and data to the DS1624 which is the slave. This is
done by supplying a START condition followed by the 4–bit devi ce code, t he 3–bit slave address, and the
R/
W
bit which is defined as a logic LOW for a write. The master then sends the Access Memory
protocol. This indicates to the addressed slave that a word address will follow. The slave outputs the
acknowled ge pulse to the master during the ninth clock pulse. When the word address is received by the
DS1624 it is placed in the address pointer definin g which memory location is to be w ritten. The DS1624
will gener at e an ack no wl ed ge aft e r every 8bits received and store th em consecu ti vely in an 8byte RAM
until a STOP condition is detected which initiates the internal programming cycle.
A repeated START condition, instead of a STOP condition, will abort the programming operation.
During the programming cycle the DS1624 will not acknowledge any further accesses to the device until
the programming cycle is complete (approximately 10 ms).
If more than 8 bytes are transmitted by the master the DS1624 will roll over and overwrite the data
beginning with the first received b yt e. This does n ot affect erase/ write cycles of the EEPROM array and
is accomplished as a result of only allowing the address register’s bottom 3 bits to increment while the
upper 5 bits remain unchanged. The DS1624 is capable of 50,000 writes (25,000 erase/write cycles)
before EEPROM wear out may occur.
If the master generates a STOP condition after transmitting the first data word, byte programming mode
is entered.
READ MODE
In this mode, the master is reading data from the DS1624 E2 memory. The master first provides the slave
address to the device with R/
W
set to “0”. T he master th en sends t he Access Memo ry protocol an d, after
receiving an acknowledge, then provides the word address, which is the address of the memory location
at which it wishes to begin reading. Note that while this is a read operation the address pointer must first
be written. During this period the DS1624 generates acknowledge bits as defined in the appropriate
section.
The mast er now generate s another S TART condition and transmits the slave address. This time the R/
W
bit is set to “1” to put the DS1624 in read mode. After the DS1624 generates the acknowledge bit it
outputs the data from the addressed location on the SDA pin, increments the address pointer, and, if it
receives an acknowledge from the master, transmits the next consecutive byte. This auto-increment
sequence is only aborted when the master sends a STOP condition instead of an acknowledge. When the
address pointer reaches the end of the 256–byte memory space (address FFh) it will increment from the
end of the memory back to the first location of the memory (address 00h).
COMMAND SET
Data and control information is read from and written to the DS1624 in the format shown i n Figure 3. To
write to the DS1624, the master will issue the slave address of the DS1624 and the R/
W
bit will be set to
“0”. After receiving an acknowledge the bus master provides a command protocol. After receiving this
protocol the DS1624 will issue an acknowledge then the master may send data to the DS1624. If the
DS1624 is to be read, the master must send the command protocol as before then issue a repeated START
condition and the control byte again, this time with the R/
W
bit set to “1” to allow reading of the data
from the DS1624. The command set for the DS1624 as shown in Table 3 is as follows:
DS1624
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A ccess Memory [17h]
This command instructs the DS1624 to access its E2 memory. After issuing this command, the next data
byte is the value of the word address to be accessed. See OPERATIONMEMORY section for detailed
explanations of the use of this protocol and data format following it.
Access Confi g [ACh]
If R/
W
is “0”, this command writes to the configuration register. After issuing this command, the next
data byte is the value to be written into the configuration register. If R/
W
is “1”, the next data byte read is
the value stored in the configuration register.
Read Temperat ure [ AAh]
This command reads the last temperature conversion result. The DS1624 will send two bytes in the
format described earlier, which are the contents of this register.
Star t Conver t T [ EEh]
This command begins a temperature conversion. No further data is required. In one–shot mode the
temperature conversion will be performed and then the DS1624 will remain idle. In continuous mode this
command will initiate continuous conversions.
Stop Convert T [ 22h]
This command stops temperature conversion. No further data is required. This command may be used to
halt a DS1624 in continuous conversion mode. After issuing this command, the current temperature
measurement will be completed then the DS1624 will remain idle until a Start Convert T is issued to
resume continuous operation.
DS1624 COMMAND SET Table 3
INSTRUCTION
DESCRIPTION
PROTOCOL
2-WIRE BUS
DATA AFTER
ISSUING
PROTOCOL
NOTES
TEMPERATURE CONVERSION COMMANDS
Read
Temperature
Reads last converted temperature
value from temperature register.
AAh
<read 2 bytes
data>
Start Convert T
Initiates temperature conversion.
EEh
idle
1
Stop Convert T
Halts temperature conversion.
22h
idle
1
THERMOSTAT COMMANDS
Access Memory
Reads or writes to 256-byte
EEPROM memory.
17h
<write data>
2
Access Config
Reads or writes configuration data
to configuration register.
ACh
<write data>
2
NOTES:
1. In continuous conversion mode a Stop Convert T command will halt continuous conversion. To
restart, the Start Convert T command must be issued. In one–shot mode a Start Convert T command
must be issued for every temperature reading desired.
2. Writing to the E2 typically requires 10 ms at room temperature. After issuing a write command, no
further reads or writes should be requested for at least 10 ms.
DS1624
11 of 20
During the programming cycle the DS1624 will not acknowledge any further accesses to the device until
the programming cycle is complete (approximately 10 ms).
MEMORY FUNCTI O N E XAMPLE
BUS MASTER
MODE
DS1624
MODE
DATA (MSB
FIRST)
COMMENTS
NOTES
{Command protocol for configuration register}
{Start here}
TX
RX
START
Bus Master Initiates a Start condition.
TX
RX
<cadr,0>
Bus Master sends DS1624 address;
R/
W
=”0”;
RX
TX
ACK
DS1624 generates acknowledge bit.
TX
RX
ACh
Bus Master sends Access Config
command protocol.
RX
TX
ACK
DS1624 generates acknowledge bit.
1
TX
RX
00h
Bus Master sets up DS1624 for continuous
conversion.
RX
TX
ACK
DS1624 generates acknowledge bit.
2, 4
TX
RX
STOP
Bus Master initiates the STOP condition.
{Command protocol for Start Convert T}
{Start here}
TX
RX
START
Bus Master initiates a Start condition.
TX
RX
<cadr,0>
Bus Master sends DS1624 address;
R/
W
=0;
RX
TX
ACK
DS1624 generates acknowledge bit.
TX
RX
EEh
Bus Master sends Start Convert T
command protocol.
RX
TX
ACK
DS1624 generates acknowledge bit.
1
TX
RX
STOP
Bus Master initiates the STOP condition.
{Command protocol for reading the Temperature}
{Start here}
TX
RX
START
Bus Master initiates a Start condition.
TX
RX
<cadr,0>
Bus Master sends DS1624 address;
R/
W
=0;
RX
TX
ACK
DS1624 generates acknowledge bit.
TX
RX
AAh
Bus Master sends Read Temp command
protocol.
RX
TX
ACK
DS1624 generates acknowledge bit.
1
TX
RX
START
Bus Master initiates a Repeated Start
condition.
TX
RX
<cadr,1>
Bus Master sends DS1624 address;
R/
W
=1;
RX
TX
ACK
DS1624 generates acknowledge bit.
RX
TX
<data>
DS1624 sends the MSB byte of
Temperature.
TX
RX
ACK
Bus Master generates acknowledge bit.
DS1624
12 of 20
RX
TX
<data>
DS1624 sends the LSB byte of
Temperature.
BUS MASTER
MODE
DS1624
MODE
DATA (MSB
FIRST)
COMMENTS
NOTES
TX
RX
NACK
Bus Master sends “NO
ACKNOWLEDGE” bit.
TX
RX
STOP
Bus Master initiates the STOP condition.
{Command protocol for writing to EEPROM}
{Start here}
TX
RX
START
Bus Master initiates a Start condition.
TX
RX
<cadr,0>
Bus Master sends DS1624 address;
R/
W
=0;
RX
TX
ACK
DS1624 generates acknowledge bit.
TX
RX
17h
Bus Master sends Access Memory
command protocol.
RX
TX
ACK
DS1624 generates acknowledge bit.
1
TX
RX
<madr>
Bus Master sets the starting memory
address.
RX
TX
ACK
DS1624 generates acknowledge bit.
TX
RX
<data>
Bus Master sends the first byte of data.
RX
TX
ACK
DS1624 generates acknowledge bit.
TX
RX
<data>
Bus Master sends the second byte of data.
RX
TX
ACK
DS1624 generates acknowledge bit.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
TX
RX
<data>
Bus Master sends the n-th byte of data.
3
RX
TX
ACK
DS1624 generates acknowledge bit.
TX
RX
STOP
Bus Master initiates the STOP condition.
2, 4
{Command protocol for reading from EEPROM}
{Start here}
TX
RX
START
Bus Master initiates a Start condition.
TX
RX
<cadr,0>
Bus Master sends DS1624 address;
R/
W
=0;
RX
TX
ACK
DS1624 generates acknowledge bit.
TX
RX
17h
Bus Master sends Access Memory
command protocol.
RX
TX
ACK
DS1624 generates acknowledge bit.
1
TX
RX
<madr>
Bus Master sends the starting memory
address.
RX
TX
ACK
DS1624 generates acknowledge bit.
TX
RX
START
Bus Master initiates a Repeated Start
condition.
TX
RX
<cadr,1>
Bus Master sends DS1624 address;
R/
W
=1;
RX
TX
ACK
DS1624 generates acknowledge bit.
DS1624
13 of 20
RX
TX
<data>
DS1624 sends the first byte of data.
TX
RX
ACK
Bus Master generates acknowledge bit.
DS1624
14 of 20
BUS MASTER
MODE
DS1624
MODE
DATA (MSB
FIRST)
COMMENTS
NOTES
RX
TX
<data>
DS1624 sends the second byte of data.
TX
RX
ACK
Bus Master generates acknowledge bit.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
RX
TX
<data>
DS1624 sends the n-th byte of data.
5
TX
RX
NACK
Bus Master send “NO KWOWLEDGE”
bit.
TX
RX
STOP
Bus Master initiates the STOP condition.
NOTES:
1. If this protocol follows a write and the DS1624 does not acknowledge here, restart the protocol at the
Start here. If it does acknowledge, continue on.
2. Wait for write to complete (10 ms typ. 50 ms max). If DS1624 does not acknowledge the command
protocol immediately following a configure register or write mem protocol, the DS1624 has not
finished writing. Restart the new command protocol until the DS1624 acknowledges.
3. If n is greater than eight, the last eight bytes are the only bytes saved in memory. If the starting
address is 00 and the incoming data is 00 11 22 33 44 55 66 77 88 99, the result will be mem00=88
mem01=99 mem02=22 mem03=33 mem04=44 mem05=55 mem06=66 mem07=77. The data wraps
around and overwrites itself.
4. The STOP condition causes the DS1624 to initiate the write to EEPROM sequence. If a START
condition comes instead of the STOP condition, the write is aborted. The data is not saved.
5. For reading, the address is incremented. If the starting address is 04h and 30 bytes of data are read
out, 21h is the final address read.
DS1624
15 of 20
ABSOLUT E MAXIMUM RA T INGS*
Voltage on Any Pin Relative to Ground ............................................................................... -0.5V to +6.0V
Operating Temperature Range ........................................................................................... -55°C to +125°C
Storage Tem per at ure Range .............................................................................................. -55°C to +125°C
Soldering Temperature (reflow) ....................................................................................................... +260°C
Lead Temperature (soldering, 10s) ................................................................................................... +300°C
* This is a stress rating onl y and functional operation of the device at these or an y other conditions above
those indicated in the operation sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods of time may affect reliability.
RECOMME NDE D DC OPE RATING CONDITI O NS
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Supply Voltage
VDD
2.7
5.0
5.5
V
1
DC ELECTRICAL CHARACTERIS TICS (-55°C to +125°C; VDD=2.7V to 5.5V)
PARAMETER
SYMBOL
CONDITION
MIN
TYP
MAX
UNITS
NOTES
Thermometer Error
T
ERR
0°C to 70°C
-55°C to +0°C
and +70°C to
+125°C
±½
°C
10
See Typical Curve
Low Level Input
Voltage
V
IL
-0.5
0.3V
DD
V
High Level Input
Voltage
V
IH
0.7V
DD
V
DD
+
0.5
V
Pulse width of spikes
which must be
suppressed by the input
filter
t
SP
Fast Mode
0
50
ns
Low Level Output
Voltage
V
OL1
3 mA sink
current
0
0.4
V
V
OL2
6 mA sink
current
0
0.6
V
Input Current each I/O
pin
0.4<V
I/O
<0.9VDD
-10
+10
µA
2
I/O Capacitance
CI/O
10
pF
Active Supply Current
I
CC
Temperature
Conversion
1000
E2 Write
400
µA
3, 4
Communica-
tion Only
100
Standby Supply Current
ISTBY
1
3
µA
3, 4
DS1624
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AC ELECTRICAL CHARACTERIS TICS (-55°C to +125°C; VDD=2.7V to 5.5V)
PARAMETERS
SYMBOL
CONDITION
MIN
TYP
MAX
UNITS
NOTES
Temperature
Conversion Time
T
TC
400
1000
ms
NV Write Cycle
Time
t
WR
0°C to 70°C
10
50
ms
9
EEPROM Writes
NEEWR
-20°C to +70°C
50k
writes
EEPROM Data
Retention
t
EEDR
-20°C to +70°C
20
years
SLK Clock
Frequency
f
SCL
Fast Mode
Standard Mode
0
0
400
100
kHz
Bus Free Time
Between a
STOP and START
Condition
t
BUF
Fast Mode
Standard Mode
1.3
4.7
µs
Hold Time
(Repeated)
START Condition
t
HD:STA
Fast Mode
Standard Mode
0.6
4.0
µs
5
Low Period of
SCL Clock
t
LOW
Fast Mode
Standard Mode
1.3
4.7
µs
High Period of
SCL Clock
t
HIGH
Fast Mode
Standard Mode
0.6
4.0
µs
Setup Time for a
Repeated
START Condition
t
SU:STA
Fast Mode
Standard Mode
0.6
4.7
µs
Data Hold Time
t
HD:DAT
Fast Mode
Standard Mode
0
0
0.9
µs
6
Data Setup Time
t
SU:DAT
Fast Mode
Standard Mode
100
250
ns
7
Rise Time of both
SDA and
SCL Signals
t
R
Fast Mode
Standard Mode
20+0.1C
B
300
1000
ns
8
Fall Time of both
SDA and
SCL Signals
t
F
Fast Mode
Standard Mode
20+0.1C
B
300
300
ns
8
Setup Time for
STOP
Condition
t
SU:STO
Fast Mode
Standard Mode
0.6
4.0
µs
Capacit iv e Load
for each Bus
Line
C
b
400
pF
All values referred to VIH=0.9 VDD and VIL=0.1 VDD.
DS1624
17 of 20
AC ELECTRICAL CHARACTERIS TICS (-55°C to +125°C; VDD=2.7V to 5.5V)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Input Capacitance
CI
5
pF
NOTES:
1. All voltages are referenced to ground.
2. I/O pins of fast mode devices must not obstruct the SDA and SCL lines if VDD is switched off.
3. ICC specified with SDA pin open.
4. ICC specified with VCC at 5.0V and SDA, SCL = 5.0V, 0°C to 70°C.
5. After this period, the first clock pulse is generated.
6. The maximum tHD:DAT has onl y to be met if the device does not stretch the LOW period (tLOW) of the
SCL signal.
7. A fast mode device can be used in a standard mode system, but the requirement tSU:DAT >250 ns must
then be m et. This will aut omaticall y b e the cas e if the devi ce does n ot stret ch the LOW period o f the
SCL signal. If such a device does stretch the LOW period of the SCL signal, it must output the next
data bit to the SDA line tRMAX+tSU:DAT = 1000+250 = 1250 ns before the SCL line is released.
8. Cb – total capacitance of one bus line in pF.
9. Writing to the nonvolatile memory should only take place in the 0°C to 70°C temperature range.
10. See Typical Curve for specification limits outside the 0°C to 70°C temperature range. Thermometer
error reflects sensor accuracy as tested during calibration.
DS1624
18 of 20
TIMING DIAGRAM
Note: T he DS1624 do e s not delay the SDA line inte r nally with respe c t to SCL for any length of time
TYPICAL PERFORMANCE CURVE
DS1624 DIGITAL THERMOMETER AND THERMOSTAT
TEMPERATURE READING ERROR
TEMPERATURE (deg. C)
tSP
DS1624
19 of 20
PACKAGE INFORMATION
For the latest pac kage outline infor mation and la nd patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-
in the package code indicates RoHS status only. Package drawings may show a di fferent suffix character, but the drawing
pertains to the package regardless of RoHS status.
PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO.
8 PDIP
P8+4
21-0043
8 SO W8+2 21-0262 90-0258
DS1624
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REVIS IO N HIS TO RY
REVISION
DATE
DESCRIPTION
PAGES
CHANGED
5/12 Updated ordering information, soldering, and package information
1, 2, 7, 14,
18