2.5 33.5 44.5 5
0
0.02
0.04
0.06
0.08
0.1
0.12
0.14
0.16
0.18
0.2
VOS (mV)
VCC (V)
125°C
-40°C
85°C 25°C
VIN
R1
R2
VREF
VCC
VOUT
+
-
C1 =
0.1µF
SD
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LMV76x and LMV762Q-Q1 Low-Voltage, Precision Comparator With Push-Pull Output
1 Features 2 Applications
1• VS=5V,TA= 25°C, Typical Values Unless • Portable and Battery-Powered Systems
Specified • Scanners
• Input Offset Voltage 0.2 mV • Set-Top Boxes
• Input Offset Voltage (Maximum Over Temp) 1 mV • High-Speed Differential Line Receiver
• Input Bias Current 0.2 pA • Window Comparators
• Propagation Delay (OD = 50 mV) 120 ns • Zero-Crossing Detectors
• Low Supply Current 300 μA• High-Speed Sampling Circuits
• CMRR 100 dB • Automotive
• PSRR 110 dB 3 Description
• Extended Temperature Range −40°C to +125°C The LMV76x devices are precision comparators
• Push-Pull Output intended for applications requiring low noise and low
• Ideal for 2.7-V and 5-V Single-Supply Applications input offset voltage. The LMV761 single has a
• Available in Space-Saving Packages: shutdown pin that can be used to disable the device
and reduce the supply current. The LMV761 is
– 6-Pin SOT-23 (Single With Shutdown) available in a space-saving 6-pin SOT-23 or 8-Pin
– 8-Pin SOIC (Single With Shutdown) SOIC package. The LMV762 dual is available in 8-pin
– 8-Pin SOIC and VSSOP (Dual Without SOIC or VSSOP package. The LMV762Q-Q1 is
Shutdown) available VSSOP and SOIC packages.
• LMV762Q-Q1 is Qualified for Automotive These devices feature a CMOS input and push-pull
Applications output stage. The push-pull output stage eliminates
the need for an external pullup resistor.
• AEC-Q100 Qualified With the Following Results:
– Device Temperature Grade 1: –40°C to The LMV76x are designed to meet the demands of
+125°C Ambient Operating Temperature small size, low power and high performance required
Range by portable and battery-operated electronics.
– Device HBM ESD Classification Level 1C The input offset voltage has a typical value of 200 μV
at room temperature and a 1-mV limit over
– Device CDM ESD Classification Level M2 temperature.
Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
SOIC (8) 4.90 mm × 3.91 mm
LMV761 SOT-23 (6) 2.90 mm × 1.60 mm
SOIC (8) 4.90 mm × 3.91 mm
LMV762
LMV762Q-Q1 VSSOP (8) 3.00 mm × 3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Threshold Detector VOS vs VCC
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LMV761
,
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,
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SNOS998I –FEBRUARY 2002–REVISED OCTOBER 2015
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Table of Contents
7.2 Functional Block Diagram....................................... 11
1 Features.................................................................. 17.3 Feature Description................................................. 11
2 Applications ........................................................... 17.4 Device Functional Modes........................................ 12
3 Description............................................................. 18 Application and Implementation ........................ 13
4 Revision History..................................................... 28.1 Application Information............................................ 13
5 Pin Configuration and Functions......................... 38.2 Typical Application ................................................. 13
6 Specifications......................................................... 49 Power Supply Recommendations...................... 15
6.1 Absolute Maximum Ratings ...................................... 410 Layout................................................................... 15
6.2 ESD Ratings: LMV761, LMV762............................... 510.1 Layout Guidelines ................................................. 15
6.3 ESD Ratings: LMV762Q-Q1 ..................................... 510.2 Layout Example .................................................... 15
6.4 Recommended Operating Conditions....................... 511 Device and Documentation Support................. 16
6.5 Thermal Information.................................................. 511.1 Documentation Support ........................................ 16
6.6 2.7-V Electrical Characteristics................................ 511.2 Community Resources.......................................... 16
6.7 5-V Electrical Characteristics................................... 611.3 Trademarks........................................................... 16
6.8 2-V Switching Characteristics ................................... 711.4 Electrostatic Discharge Caution............................ 16
6.9 5-V Switching Characteristics ................................... 711.5 Glossary................................................................ 16
6.10 Typical Characteristics............................................ 812 Mechanical, Packaging, and Orderable
7 Detailed Description............................................ 11 Information ........................................................... 16
7.1 Overview................................................................. 11
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision H (March 2013) to Revision I Page
• Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes,Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
Changes from Revision G (March 2013) to Revision H Page
• Changed layout of National Data Sheet to TI format ........................................................................................................... 15
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V+
1
2
3
45
6
7
8
N/C
-IN
+IN
V-
OUT
N/C
SD
V-
+IN V+
-IN
1
2
3
5
4
6
SD
OUT
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5 Pin Configuration and Functions
LMV761 (Single) DBV Package
6-Pin SOT-23
Top View
Pin Functions for SOT-23
PIN TYPE DESCRIPTION
NO. NAME
1 +IN I Noninverting input
2 V-P Negative power terminal
3 -IN I Inverting input
4 OUT O Output
5 SDB I Shutdown (active low)
6 V+P Positive power terminal
LMV761 (Single) D Package
8-Pin SOIC
Top View
Pin Functions for SOIC (Single)
PIN TYPE DESCRIPTION
NO. NAME
1 N/C — No Connect (not internally connected)
2 -IN I Inverting Input
3 +IN I Noninverting Input
4 V-P Negative Power Terminal
5 SDB I Shutdown (active low)
6 OUT O Output
7 V+P Positive Power Terminal
8 N/C — No Connect (not internally connected)
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OUT B
1
2
3
45
6
7
8
OUT A
-IN A
+IN A
V-
-IN B
+IN B
V+
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,
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,
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LMV762, LMV762Q-Q1 (Dual) DBV or DGK Package
8-Pin SOIC or VSSOP
Top View
Pin Functions for SOIC and VSSOP (Dual)
PIN TYPE DESCRIPTION
NO. NAME
1 OUTA O Channel A Output
2 -INA I Channel A Inverting Input
3 +INA I Channel A Noninverting Input
4 V-P Negative Power Terminal
5 +INB I Channel B Noninverting Input
6 -INB I Channel B Inverting Input
7 OUTB O Channel B Output
8 V+P Positive Power Terminal
6 Specifications
6.1 Absolute Maximum Ratings
See (1)(2)
MIN MAX UNIT
Supply voltage (V+– V−) 5.5 V
Differential input voltage Supply Voltage
Voltage between any two pins Supply Voltage
Output short circuit Current at input pin ±5 mA
duration(3)
Infrared or convection (20 sec.) 235 °C
Soldering information Wave soldering (10 sec.) (Lead temp) 260 °C
Junction temperature 150 °C
Storage temperature, Tstg −65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3) Applies to both single supply and split supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Output current in excess of ±25 mA over long term may adversely
affect reliability.
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6.2 ESD Ratings: LMV761, LMV762 VALUE UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(2) ± 2000
V(ESD) Electrostatic discharge(1) V
Machine model ± 200
(1) Unless otherwise specified human body model is 1.5 kΩin series with 100 pF. Machine model 200 pF.
(2) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
6.3 ESD Ratings: LMV762Q-Q1 VALUE UNIT
Human-body model (HBM), per AEC Q100-002(1) ± 2000
V(ESD) Electrostatic discharge V
Machine model ± 200
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
6.4 Recommended Operating Conditions MIN MAX UNIT
Supply voltage (V+– V−) 2.7 5.25 V
Temperature range −40 125 °C
6.5 Thermal Information LMV761 LMV762, LMV762Q-Q1
THERMAL METRIC(1) D (SOIC) DBV (SOT-23) DGK (VSSOP) UNIT
8 PINS 6 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance (2) 190 265 235 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
(2) The maximum power dissipation is a function of TJ(MAX),θJA, and TA. The maximum allowable power dissipation at any ambient
temperature is PD= (TJ(MAX) – TA) RθJA. All numbers apply for packages soldered directly into a PCB.
6.6 2.7-V Electrical Characteristics
Unless otherwise specified, all limited ensured for TJ= 25°C, VCM = V+/ 2, V+= 2.7 V, V−= 0 V−.
PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT
0.2
VOS Input offset voltage mV
apply at the temperature extremes(3) 1
IBInput bias current(4) 0.2 50 pA
IOS Input offset current(4) 0.001 5 pA
Common-mode rejection
CMRR 0 V < VCM < VCC – 1.3 V 80 100 dB
ratio
PSRR Power supply rejection ratio V+= 2.7 V to 5 V 80 110 dB
Input common-mode voltage apply at the temperature
CMVR CMRR > 50 dB −0.3 1.5 V
range extremes(3)
Output swing high IL= 2 mA, VID = 200 mV V+– 0.35 V+– 0.1 V
VOOutput swing low IL=−2 mA, VID = –200 mV 90 250 mV
Sourcing, VO= 1.35 V, VID = 200 mV 6 20
ISC Output short circuit current(5) mA
Sinking, VO= 1.35 V, VID = –200 mV 6 15
(1) All limits are specified by testing or statistical analysis.
(2) Typical values represent the most likely parametric norm.
(3) Maximum temperature ensured range is −40°C to +125°C.
(4) Specified by design.
(5) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ= TA. No ensured specification of parametric performance is indicated in the electrical
tables under conditions of internal self-heating where TJ> TA. See Recommended Operating Conditions for information on temperature
de-rating of this device. Absolute Maximum Rating indicate junction temperature limits beyond which the device may be permanently
degraded, either mechanically or electrically.
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2.7-V Electrical Characteristics (continued)
Unless otherwise specified, all limited ensured for TJ= 25°C, VCM = V+/ 2, V+= 2.7 V, V−= 0 V−.
PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT
Supply current LMV761 275 700 μA
(single comparator)
IS550
LMV762, LMV762Q-Q1 (both μA
comparators) apply at the temperature extremes(3) 1400
IOUT LEAKAGE Output leakage I at shutdown SD = GND, VO= 2.7 V 0.2 μA
Supply leakage I at
IS LEAKAGE SD = GND, VCC = 2.7 V 0.2 2 μA
shutdown
6.7 5-V Electrical Characteristics
Unless otherwise specified, all limited ensured for TJ= 25°C, VCM = V+/ 2, V+= 5 V, V−= 0 V−.
PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT
0.2
VOS Input offset voltage mV
apply at the temperature extremes(3) 1
IBInput bias current(4) 0.2 50 pA
IOS Input offset current(4) 0.01 5 pA
Common-mode rejection
CMRR 0 V < VCM < VCC – 1.3 V 80 100 dB
ratio
PSRR Power supply rejection ratio V+= 2.7 V to 5 V 80 110 dB
Input common-mode voltage apply at the temperature
CMVR CMRR > 50 dB −0.3 3.8 V
range extremes(3)
Output swing high IL= 4 mA, VID = 200 mV V+– 0.35 V+– 0.1 V
VOOutput swing low IL= –4 mA, VID = –200 mV 120 250 mV
Sourcing, VO= 2.5 V, VID = 200 mV 6 60
ISC Output short circuit current(5) mA
Sinking, VO= 2.5 V, VID =−200 mV 6 40
Supply current LMV761 225 700 μA
(single comparator)
IS450
LMV762, LMV762Q-Q1 μA
(both comparators) apply at the temperature extremes(3) 1400
Output leakage I at
IOUT LEAKAGE SD = GND, VO= 5 V 0.2 μA
shutdown
Supply leakage I at
IS LEAKAGE SD = GND, VCC = 5 V 0.2 2 μA
shutdown
(1) All limits are specified by testing or statistical analysis.
(2) Typical values represent the most likely parametric norm.
(3) Maximum temperature ensured range is −40°C to +125°C.
(4) Specified by design.
(5) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ= TA. No ensured specification of parametric performance is indicated in the electrical
tables under conditions of internal self-heating where TJ> TA. See Recommended Operating Conditions for information on temperature
de-rating of this device. Absolute Maximum Rating indicate junction temperature limits beyond which the device may be permanently
degraded, either mechanically or electrically.
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6.8 2-V Switching Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Overdrive = 5 mV 270
Propagation delay
tPD RL= 5.1 kΩOverdrive = 10 mV 205 ns
CL= 50 pF Overdrive = 50 mV 120
tSKEW Propagation delay skew 5 ns
trOutput rise time 10% to 90% 1.7 ns
tfOutput fall time 90% to 10% 1.8 ns
ton Turnon time from shutdown 6 μs
6.9 5-V Switching Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Overdrive = 5 mV 225
Propagation delay
tPD RL= 5.1 kΩOverdrive = 10 mV 190 ns
CL= 50 pF Overdrive = 50 mV 120
tSKEW Propagation delay skew 5 ns
trOutput rise time 10% to 90% 1.7 ns
tfOutput fall time 90% to 10% 1.5 ns
ton Turnon time from shutdown 4 μs
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22.5 3 3.5 4 4.5 5 5.5 6
VCC (V)
0
0.5
0.1
0.15
0.2
0.25
0.3
0.35
0.4
OUTPUT VOLTAGE, REF TO V+ (V)
-40°C
125°C
85°C
25°C
IL = 4 mA
01 2 34 5
-100
-80
-60
-40
-20
0
20
40
60
80
100
INPUT BIAS CURRENT (fA)
COMMON MODE VOLTAGE (V)
VS = +5 V
2.5 33.5 44.5 5
0
0.02
0.04
0.06
0.08
0.1
0.12
0.14
0.16
0.18
0.2
VOS (mV)
VCC (V)
125°C
-40°C
85°C 25°C
00.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7
-100
-80
-60
-40
-20
0
20
40
60
80
100
INPUT BIAS CURRENT (fA)
COMMON MODE VOLTAGE (V)
VS = +2.7 V
1.5 2 2.5 3 3.5 44.5 55.5 6
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
0.5
SUPPLY CURRENT PER CH (mA)
V (V)
CC
125°C
85°C
25°C
-40°C
1.5 2 2.5 3 3.5 44.5 55.5 6
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
0.5
SUPPLY CURRENT PER CH (mA)
V (V)
CC
125°C
85°C
25°C
-40°C
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6.10 Typical Characteristics
VO= High VO= Low
Figure 1. PSI vs VCC Figure 2. PSI vs VCC
Figure 4. Input Bias vs Common Mode at 25°C
Figure 3. VOS vs VCC
Figure 5. Input Bias vs Common Mode at 25°C Figure 6. Output Voltage vs Supply Voltage
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00.5 1 1.5 2 2.5
0
10
20
30
40
50
60
I (mA)
SINK
V (V)
OUT
V = 5 V
CC
-40°C
25°C
85°C
125°C
00.4 0.6 0.8 11.2 1.4
VOUT (V)
0
5
10
15
20
25
ISOURCE (mA)
0.2
VCC = 2.7 V
-40°C
25°C
85°C
125°C
22.5 33.5 4 4.5 55.5 6
0
0.2
OUTPUT VOLTAGE, TO REF V- (V)
VCC (V)
0.02
0.04
0.06
0.08
0.1
0.12
0.14
0.16
0.18 125°C
-40°C
85°C
25°C
IL = -2 mA
00.5 1 1.5 22.5
0
10
20
30
40
50
60
70
80
ISINK (mA)
VOUT (V)
-40°C
25°C
85°C
125°C
VCC = 5 V
22.5 33.5 44.5 55.5 6
VCC (V)
0
0.02
0.04
0.06
0.08
0.1
0.12
0.14
0.16
OUTPUT VOLTAGE, REF TO V+ (V)
-40°C
125°C
85°C
25°C
IL = 2 mA
22.5 33.5 44.5 55.5 6
VCC (V)
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
OUTPUT VOLTAGE REF TO V- (V)
-40°C
125°C
85°C
25°C
IL = -4 mA
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Typical Characteristics (continued)
Figure 7. Output Voltage vs Supply Voltage Figure 8. Output Voltage vs Supply Voltage
Figure 9. Output Voltage vs Supply Voltage Figure 10. ISOURCE vs VOUT
Figure 12. ISOURCE vs VOUT
Figure 11. ISINK vs VOUT
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|
TIME (ns)
050 100 150 200
150
0
6
OUTPUT VOLTAGE
(V)
250
1
2
3
4
5
INPUT VOLTAGE
(mV)
|
0OVERDRIVE =
50 mV
10 mV 5 mV
OVERDRIVE
VCC = 5 V
TEMP = 25°C
LOAD = 5.1 k:
50 pF
50 100 150 200 250
TIME (ns)
150
0
3
INPUT VOLTAGE
(mV)
300
0
1
2
OUTPUT VOLTAGE
(V)
|
|
OVERDRIVE =
50 mV
10 mV 5 mV
0
VCC = 2.7 V
TEMP = 25°C
LOAD = 5.1 k:
50 pF
OVERDRIVE
TIME (ns)
050 100 150 200
-150
0
6
OUTPUT VOLTAGE
(V)
250
1
2
3
4
5
INPUT VOLTAGE
(mV)
| |
0
VCC = 5 V
TEMP = 25°C
LOAD = 5.1 k:
50 pF
OVERDRIVE =
50 mV
10 mV 5 mV
OVERDRIVE
50 100 150 200 250
TIME (ns)
-150
0
3
INPUT VOLTAGE
(mV)
300
0
1
2
OUTPUT VOLTAGE
(V)
|
|
OVERDRIVE =
50 mV
10 mV 5 mV
OVERDRIVE
0
VCC = 2.7 V
TEMP = 25°C
LOAD = 5.1 k:
50 pF
00.2 0.4 0.6 0.8 11.2 1.4
0
2
4
6
8
10
12
14
16
18
20
ISINK (mA)
VOUT (V)
VCC = 2.7 V
-40°C
25°C
85°C
125°C
110 100
OVERDRIVE (mV)
0
50
100
150
200
250
300
350
400
450
500
PROP DELAY (ns)
2.7 V
5 V
RL = 5.1 k:
CL = 50 pF
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Typical Characteristics (continued)
Figure 14. Prop Delay vs Overdrive
Figure 13. ISINK vs VOUT
Figure 15. Response Time vs Input Overdrives Positive Figure 16. Response Time vs Input Overdrives Positive
Transition Transition
Figure 17. Response Time vs Input Overdrives Negative Figure 18. Response Time vs Input Overdrives Negative
Transition Transition
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V+
VREF
VIN
VO
-
+
V-
V+
VREF
VIN
VO
-
+
V-
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7 Detailed Description
7.1 Overview
The LMV76x family of precision comparators is available in a variety of packages and is ideal for portable and
battery-operated electronics.
To minimize external components, the LMV76x family features a push-pull output stage where the output levels
are power-supply determined. In addition, the LMV761 (single) features an active-low shutdown pin that can be
used to disable the device and reduce the supply current.
7.2 Functional Block Diagram
7.3 Feature Description
7.3.1 Basic Comparator
A basic comparator circuit is used to convert analog input signals to digital output signals. The comparator
compares an input voltage (VIN) at the noninverting input to the reference voltage (VREF) at the inverting pin. If
VIN is less than VREF the output (VO) is low (VOL). However, if VIN is greater than VREF, the output voltage (VO) is
high (VOH).
Figure 19. Basic Comparator Without Hysteresis
Figure 20. Basic Comparator
7.3.2 Hysteresis
The basic comparator configuration may oscillate or produce a noisy output if the applied differential input is near
the input offset voltage of the comparator, which tends to occur when the voltage on one input is equal or very
close to the other input voltage. Adding hysteresis can prevent this problem. Hysteresis creates two switching
thresholds (one for the rising input voltage and the other for the falling input voltage). Hysteresis is the voltage
difference between the two switching thresholds. When both inputs are nearly equal, hysteresis causes one input
to effectively move quickly past the other. Thus, moving the input out of the region in which oscillation may occur.
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VO
0
VIN2 VIN1
VIN
VO
VIN
VCC
VREF -
+
R2
R1
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Feature Description (continued)
Hysteresis can easily be added to a comparator in a noninverting configuration with two resistors and positive
feedback Figure 22. The output will switch from low to high when VIN rises up to VIN1, where VIN1 is calculated by
Equation 1:
VIN1 = [VREF(R1+ R2)] / R2(1)
The output will switch from high to low when VIN falls to VIN2, where VIN2 is calculated by Equation 2:
VIN2 = [VREF(R1+ R2) – (VCC R1)] / R2(2)
The Hysteresis is the difference between VIN1 and VIN2, as calculated by Equation 3:
ΔVIN = VIN1 – VIN2 = [VREF(R1+ R2) / R2] – [VREF(R1+ R2)] – [(VCC R1) / R2] = VCC R1/ R2(3)
Figure 21. Basic Comparator With Hysteresis
Figure 22. Noninverting Comparator Configuration
7.3.3 Input
The LMV76x devices have near-zero input bias current, which allows very high resistance circuits to be used
without any concern for matching input resistances. This near-zero input bias also allows the use of very small
capacitors in R-C type timing circuits. This reduces the cost of the capacitors and amount of board space used.
7.4 Device Functional Modes
7.4.1 Shutdown Mode
The LMV761 features a low-power shutdown pin that is activated by driving SD low. In shutdown mode, the
output is in a high-impedance state, supply current is reduced to 20 nA and the comparator is disabled. Driving
SD high will turn the comparator on. The SD pin must not be left unconnected due to the fact that it is a high-
impedance input. When left unconnected, the output will be at an unknown voltage. Do not three-state the SD
pin.
The maximum input voltage for SD is 5.5 V referred to ground and is not limited by VCC. This allows the use of
5-V logic to drive SD while VCC operates at a lower voltage, such as 3 V. The logic threshold limits for SD are
proportional to VCC.
12 Submit Documentation Feedback Copyright © 2002–2015, Texas Instruments Incorporated
Product Folder Links: LMV761 LMV762 LMV762Q-Q1
C1
R4
VO
R2
R3
R1 VA
+
-
VC
V+
0
V+
LMV761
,
LMV762
,
LMV762Q-Q1
www.ti.com
SNOS998I –FEBRUARY 2002–REVISED OCTOBER 2015
8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The LMV76x are single-supply comparators with 120 ns of propagation delay and 300 µA of supply current.
8.2 Typical Application
A typical application for a LMV76x comparator is a programmable square-wave oscillator.
Figure 23. Square-Wave Oscillator
8.2.1 Design Requirements
The circuit in Figure 23 generates a square wave whose period is set by the RC time constant of the capacitor
C1and resistor R4. V+= 5 V unless otherwise specified.
8.2.2 Detailed Design Procedure
The maximum frequency is limited by the large signal propagation delay of the comparator and by the capacitive
loading at the output, which limits the output slew rate.
Figure 24. Square-Wave Oscillator Timing Thresholds
Copyright © 2002–2015, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Links: LMV761 LMV762 LMV762Q-Q1
-1
0
1
2
3
4
5
6
0 10 20 30 40 50
VOUT (V)
TIME (µs)
C001
VOUT
Va
Vc
CC 2 3
A2 1 2 3
V (R R )
VR (R R )
R
R
CC 2
A1 2 1 3
V R
VR R R
˜
R
LMV761
,
LMV762
,
LMV762Q-Q1
SNOS998I –FEBRUARY 2002–REVISED OCTOBER 2015
www.ti.com
Typical Application (continued)
Consider the output of Figure 23 is high to analyze the circuit. That implies that the inverted input (VC) is lower
than the noninverting input (VA). This causes the C1to be charged through R4, and the voltage VCincreases until
it is equal to the noninverting input. The value of VAat this point is calculated by Equation 4:
(4)
If R1= R2= R3, then VA1 =2VCC / 3
At this point the comparator switches pulling down the output to the negative rail. The value of VAat this point is
calculated by Equation 5:
(5)
If R1= R2= R3, then VA2 = VCC / 3.
The capacitor C1now discharges through R4, and the voltage VCdecreases until it is equal to VA2, at which point
the comparator switches again, bringing it back to the initial stage. The time period is equal to twice the time it
takes to discharge C1from 2 VCC /3toVCC / 3, which is given by R4C1× ln2. Hence, the formula for the
frequency is calculated by Equation 6:
F = 1 / (2 × R4× C1× ln2) (6)
8.2.3 Application Curve
Figure Figure 25 shows the simulated results of an oscillator using the following values:
• R1= R2= R3= R4= 100 kΩ
• C1= 100 pF, CL= 20 pF
• V+ = 5 V, V– = GND
• CSTRAY (not shown) from Vato GND = 10 pF
Figure 25. Square-Wave Oscillator Output Waveform
14 Submit Documentation Feedback Copyright © 2002–2015, Texas Instruments Incorporated
Product Folder Links: LMV761 LMV762 LMV762Q-Q1
VREF
SOT-23
C1
GND
V+
SD
OUT
+IN
-IN
GND
VIN
R1
R2
LMV761
,
LMV762
,
LMV762Q-Q1
www.ti.com
SNOS998I –FEBRUARY 2002–REVISED OCTOBER 2015
9 Power Supply Recommendations
To minimize supply noise, power supplies must be decoupled by a 0.1-μF ceramic capacitor in parallel with a
10-μF capacitor.
Due to the nanosecond edges on the output transition, peak supply currents will be drawn during output
transitions. Peak current depends on the capacitive loading on the output. The output transition can cause
transients on poorly bypassed power supplies. These transients can cause a poorly bypassed power supply to
ring due to trace inductance and low self-resonance frequency of high ESR bypass capacitors.
Treat the LMV6x as a high-speed device. Keep the ground paths short and place small (low-ESR ceramic)
bypass capacitors directly between the V+and V–pins.
Output capacitive loading and output toggle rate will cause the average supply current to rise over the quiescent
current.
10 Layout
10.1 Layout Guidelines
The LMV76x is designed to be stable and oscillation free, but it is still important to include the proper bypass
capacitors and ground pick-ups. Ceramic 0.1-μF capacitors must be placed at both supplies to provide clean
switching. Minimize the length of signal traces to reduce stray capacitance.
10.2 Layout Example
Figure 26. Comparator With Hysteresis
Copyright © 2002–2015, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Links: LMV761 LMV762 LMV762Q-Q1
LMV761
,
LMV762
,
LMV762Q-Q1
SNOS998I –FEBRUARY 2002–REVISED OCTOBER 2015
www.ti.com
11 Device and Documentation Support
11.1 Documentation Support
11.1.1 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 1. Related Links
TECHNICAL TOOLS & SUPPORT &
PARTS PRODUCT FOLDER SAMPLE & BUY DOCUMENTS SOFTWARE COMMUNITY
LMV761 Click here Click here Click here Click here Click here
LMV762 Click here Click here Click here Click here Click here
LMV762Q-Q1 Click here Click here Click here Click here Click here
11.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.5 Glossary
SLYZ022 —TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
16 Submit Documentation Feedback Copyright © 2002–2015, Texas Instruments Incorporated
Product Folder Links: LMV761 LMV762 LMV762Q-Q1
PACKAGE OPTION ADDENDUM
www.ti.com 6-Feb-2020
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LMV761MA ACTIVE SOIC D 8 95 TBD Call TI Call TI -40 to 125 LMV76
1MA
LMV761MA/NOPB ACTIVE SOIC D 8 95 Green (RoHS
& no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 LMV76
1MA
LMV761MAX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 LMV76
1MA
LMV761MF ACTIVE SOT-23 DBV 6 1000 TBD Call TI Call TI -40 to 125 C22A
LMV761MF/NOPB ACTIVE SOT-23 DBV 6 1000 Green (RoHS
& no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 C22A
LMV761MFX ACTIVE SOT-23 DBV 6 3000 TBD Call TI Call TI -40 to 125 C22A
LMV761MFX/NOPB ACTIVE SOT-23 DBV 6 3000 Green (RoHS
& no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 C22A
LMV762MA ACTIVE SOIC D 8 95 TBD Call TI Call TI -40 to 125 LMV7
62MA
LMV762MA/NOPB ACTIVE SOIC D 8 95 Green (RoHS
& no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 LMV7
62MA
LMV762MAX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 LMV7
62MA
LMV762MM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS
& no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 C23A
LMV762MMX ACTIVE VSSOP DGK 8 3500 TBD Call TI Call TI -40 to 125 C23A
LMV762MMX/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS
& no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 C23A
LMV762QMA/NOPB ACTIVE SOIC D 8 95 Green (RoHS
& no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 LMV76
2QMA
LMV762QMAX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 LMV76
2QMA
LMV762QMM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS
& no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 C32A
LMV762QMMX/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS
& no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 C32A
PACKAGE OPTION ADDENDUM
www.ti.com 6-Feb-2020
Addendum-Page 2
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LMV761MAX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LMV761MF SOT-23 DBV 6 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LMV761MF/NOPB SOT-23 DBV 6 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LMV761MFX SOT-23 DBV 6 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LMV761MFX/NOPB SOT-23 DBV 6 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LMV762MAX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LMV762MM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
LMV762MMX VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
LMV762MMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
LMV762QMAX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LMV762QMM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
LMV762QMMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 25-Sep-2019
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LMV761MAX/NOPB SOIC D 8 2500 367.0 367.0 35.0
LMV761MF SOT-23 DBV 6 1000 210.0 185.0 35.0
LMV761MF/NOPB SOT-23 DBV 6 1000 210.0 185.0 35.0
LMV761MFX SOT-23 DBV 6 3000 210.0 185.0 35.0
LMV761MFX/NOPB SOT-23 DBV 6 3000 210.0 185.0 35.0
LMV762MAX/NOPB SOIC D 8 2500 367.0 367.0 35.0
LMV762MM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0
LMV762MMX VSSOP DGK 8 3500 367.0 367.0 35.0
LMV762MMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0
LMV762QMAX/NOPB SOIC D 8 2500 367.0 367.0 35.0
LMV762QMM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0
LMV762QMMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 25-Sep-2019
Pack Materials-Page 2
www.ti.com
PACKAGE OUTLINE
C
.228-.244 TYP
[5.80-6.19]
.069 MAX
[1.75]
6X .050
[1.27]
8X .012-.020
[0.31-0.51]
2X
.150
[3.81]
.005-.010 TYP
[0.13-0.25]
0 - 8 .004-.010
[0.11-0.25]
.010
[0.25]
.016-.050
[0.41-1.27]
4X (0 -15 )
A
.189-.197
[4.81-5.00]
NOTE 3
B .150-.157
[3.81-3.98]
NOTE 4
4X (0 -15 )
(.041)
[1.04]
SOIC - 1.75 mm max heightD0008A
SMALL OUTLINE INTEGRATED CIRCUIT
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
18
.010 [0.25] C A B
5
4
PIN 1 ID AREA
SEATING PLANE
.004 [0.1] C
SEE DETAIL A
DETAIL A
TYPICAL
SCALE 2.800
www.ti.com
EXAMPLE BOARD LAYOUT
.0028 MAX
[0.07]
ALL AROUND
.0028 MIN
[0.07]
ALL AROUND
(.213)
[5.4]
6X (.050 )
[1.27]
8X (.061 )
[1.55]
8X (.024)
[0.6]
(R.002 ) TYP
[0.05]
SOIC - 1.75 mm max heightD0008A
SMALL OUTLINE INTEGRATED CIRCUIT
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
METAL SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
EXPOSED
METAL
OPENING
SOLDER MASK METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
EXPOSED
METAL
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:8X
SYMM
1
45
8
SEE
DETAILS
SYMM
www.ti.com
EXAMPLE STENCIL DESIGN
8X (.061 )
[1.55]
8X (.024)
[0.6]
6X (.050 )
[1.27] (.213)
[5.4]
(R.002 ) TYP
[0.05]
SOIC - 1.75 mm max heightD0008A
SMALL OUTLINE INTEGRATED CIRCUIT
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
SYMM
SYMM
1
45
8
www.ti.com
PACKAGE OUTLINE
C
0.22
0.08 TYP
0.25
3.0
2.6
2X 0.95
1.45 MAX
0.15
0.00 TYP
6X 0.50
0.25
0.6
0.3 TYP
8
0 TYP
1.9
A
3.05
2.75
B
1.75
1.45
(1.1)
SOT-23 - 1.45 mm max heightDBV0006A
SMALL OUTLINE TRANSISTOR
4214840/B 03/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.15 per side.
4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation.
5. Refernce JEDEC MO-178.
0.2 C A B
1
34
5
2
INDEX AREA
PIN 1
6
GAGE PLANE
SEATING PLANE
0.1 C
SCALE 4.000
www.ti.com
EXAMPLE BOARD LAYOUT
0.07 MAX
ARROUND 0.07 MIN
ARROUND
6X (1.1)
6X (0.6)
(2.6)
2X (0.95)
(R0.05) TYP
4214840/B 03/2018
SOT-23 - 1.45 mm max heightDBV0006A
SMALL OUTLINE TRANSISTOR
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
PKG
1
34
5
2
6
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
EXPOSED METAL
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
EXPOSED METAL
www.ti.com
EXAMPLE STENCIL DESIGN
(2.6)
2X(0.95)
6X (1.1)
6X (0.6)
(R0.05) TYP
SOT-23 - 1.45 mm max heightDBV0006A
SMALL OUTLINE TRANSISTOR
4214840/B 03/2018
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
SYMM
PKG
1
34
5
2
6
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