EVALUATION KIT AVAILABLE MAX14606/MAX14607 Overvoltage Protectors with Reverse Bias Blocking General Description The MAX14606/MAX14607 overvoltage protection devices feature low 54mI (typ) on-resistance (RON) internal FETs and protect low-voltage systems against voltage faults up to +36V. When the input voltage exceeds the overvoltage threshold, the internal FET is turned off to prevent damage to the protected components. The devices automatically choose the accurate internal trip thresholds. The internal OVLO are preset to typical 5.87V (MAX14606) or 6.8V (MAX14607). The MAX14606/MAX14607 feature reverse bias blocking capability. Unlike other overvoltage protectors, when the MAX14606 /MAX14607 are disabled, the voltage applied to OUT does not feed back into IN. These devices also feature thermal shutdown to protect against overcurrent events. The MAX14606/MAX14607 are specified over the extended -40NC to +85NC temperature range, and are available in 9-bump WLP packages. Applications Benefits and Features S Protect High-Power Portable Devices Wide Operating Input Voltage Protection from +2.3V to +36V 3A Continuous Current Capability Integrated 54mI (typ) nMOSFET Switch S Flexible Overvoltage Protection Design Easy Paralleling ACOK Indicates Input Is in Range Preset Accurate Internal OVLO Thresholds 5.87V 3% (MAX14606) 6.8V 3% (MAX14607) S Additional Protection Features Increase System Reliability Reverse Bias Blocking Capability Soft-Start to Minimize Inrush Current Internal 15ms Startup Debounce Thermal Shutdown Protection S Save Space 9-Bump, 1.3mm x 1.3mm, WLP Package Tablets Smart Phones Portable Media Players Ordering Information/Selector Guide appears at end of data sheet. Typical Operating Circuit appears at end of data sheet. Visit www.maximintegrated.com/products/patents for product patent marking information. For related parts and recommended products to use with this part, refer to: www.maximintegrated.com/MAX14606.related. For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated's website at www.maximintegrated.com. 19-6147; Rev 0; 12/11 MAX14606/MAX14607 Overvoltage Protectors with Reverse Bias Blocking ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND.) IN ............................................................................-0.3V to +40V OUT........................................................................-0.3V to +40V IN - OUT....................................................................-6V to +40V EN, ACOK................................................................-0.3V to +6V OVLO......................................................................-0.3V to +10V Continuous Current into IN, OUT.......................................... Q3A Continuous Power Dissipation (TA = +70NC) WLP (derate 11.9mW/NC above +70NC)......................952mW Operating Temperature Range........................... -40NC to +85NC Storage Temperature Range............................. -65NC to +150NC Soldering Temperature (reflow).......................................+260NC Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. PACKAGE THERMAL CHARACTERISTICS (Note 1) WLP Junction-to-Ambient Thermal Resistance (BJA)........+84NC / W Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. ELECTRICAL CHARACTERISTICS (VIN = +2.3V to +36V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at VIN = +5V, TA = +25NC.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 36 V Input Voltage VIN VIN goes from low to high, ACOK goes from high to low Input Supply Current IIN EN low, VIN = 5V, IOUT = 0mA 70 120 FA Input Disable Current IIN_DIS EN low, VIN = 5V, VOVLO < VOVLO_TH 60 120 FA EN high, VIN = 5V, VOUT = 0V 6 12 FA 3 FA 5.5 FA mI 2.3 Input Shutdown Current IIN_Q Output Disable Current IOUT_DIS EN low, VOUT = 5V, VIN = 5V, VOVLO < VOVLO_TH or EN low, VOUT = 5V, VIN > VIN_OVLO Output Shutdown Current IOUT_SD EN high, VOUT = 5V, VIN = 5V RON VIN = 5V, IOUT = 100mA MAX14606 IN rising MAX14607 54 100 5.75 5.87 6.00 6.6 6.8 7.0 MAX14606 5.5 MAX14607 6.4 OVP (IN TO OUT) On-Resistance (IN to OUT) Internal Overvoltage Lockout Threshold OUT Load Capacitance VIN_OVLO IN falling COUT V 1000 FF OVLO OVLO Clamp Current OVLO Open Voltage VOVLO_OP OVLO Pullup Resistance ROVLO_PU OVLO Force Off Voltage VOVLO_TH Maxim Integrated VOVLO = 5.5V, VIN = 5V 9.7 25 FA VEN = 0V 2.95 3.6 V 500 0.6 1.221 kI 1.4 V 2 MAX14606/MAX14607 Overvoltage Protectors with Reverse Bias Blocking ELECTRICAL CHARACTERISTICS (continued) (VIN = +2.3V to +36V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at VIN = +5V, TA = +25NC.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DIGITAL SIGNALS (EN, ACOK) EN Input High Voltage VIH EN Input Low Voltage VIL EN Input Leakage Current IEN_LEAK VIN_OVLO or 5.5V V -1 VIO = 3.3V, ISINK = 1mA (see the Typical Operating Circuit) VOL ACOK Output Low Voltage ACOK Leakage Current 1.4 VACOK_LEAK VIO = 3.3V, ACOK deasserted (see the Typical Operating Circuit) -1 2.3V < VIN < VOVLO to charge-pump on, Figure 1 10 0.4 V +1 FA 0.4 V +1 FA 35 ms TIMING CHARACTERISTICS IN Debounce Time tDEB 15 IN/OUT OVP Soft-Start Time tSS 2.3V < VIN < VOVLO to 90% of VOUT 30 ms OVP Turn-On Time During Soft-Start tON VIN = 5V, RL = 50I, CL = 10FF, VOUT = 20% of VIN to 80% of VIN, Figure 1 2 ms VIN > VOVLO 2V/Fs to VOUT = 80% of VIN, RL = 50I, Figure 1 1.5 EN low to high to VOUT = 80% of VIN, RL = 50I, Figure 1 84 Turn-Off Time tOFF Fs THERMAL PROTECTION Thermal Shutdown TSHDN +150 NC Thermal Hysteresis THYST 20 NC Note 2: All devices are 100% production tested at TA = +25NC. Limits over the operating temperature range are guaranteed by design and not production tested. tOFF tDEB OVLO IN 2.3V tDEB tDEB OUT THERMAL SHUTDOWN tON tON tOFF tDEB EN ACOK Figure 1. Timing Diagram Maxim Integrated 3 MAX14606/MAX14607 Overvoltage Protectors with Reverse Bias Blocking Typical Operating Characteristics (VIN = +5V, CIN = 1FF, COUT = 1FF, TA = +25NC, unless otherwise noted.) 30 TA = -40C 20 10 9 18 27 TA = -40C 100 18 27 OUTPUT LEAKAGE CURRENT vs. OUTPUT VOLTAGE OUTPUT LEAKAGE CURRENT vs. OUTPUT VOLTAGE 1.0 0.8 0.6 0.4 6 VEN = 3V VOVLO = 0V VIN = 0V VOUT (V) 1.0 0.9 0.8 -40 -15 10 35 60 85 DEBOUNCE TIME vs. TEMPERATURE 24 23 DEBOUNCE TIME (ms) 1.02 1.01 1.00 0.99 0.98 MAX14606/7 toc08 25 MAX14606/7 toc07 NORMALIZED OVLO THRESHOLD 1.1 TEMPERATURE (C) NORMALIZED OVLO THRESHOLD vs. TEMPERATURE 22 21 20 19 18 0.97 17 0.96 16 15 0.95 -40 -15 10 35 TEMPERATURE (C) Maxim Integrated 1.2 0.5 VOUT (V) 1.03 IOUT = 100mA 0.6 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 OVLO = OPEN 36 0.7 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 1.04 27 1.3 2 0 1.05 1.4 3 0 18 NORMALIZED RON vs. TEMPERATURE 1.5 4 1 9 IN SUPPLY VOLTAGE (V) 5 0.2 TA = -40C 100 0 NORMALIZED RON 1.2 OUTPUT LEAKAGE CURRENT (A) 1.4 TA = +25C 150 36 IN SUPPLY VOLTAGE (V) 7 200 0 9 IN SUPPLY VOLTAGE (V) VEN = 3V VOVLO = 0V VIN = 6V TA = +85C 250 50 0 8 MAX14606/7 toc03 MAX14606/7 toc02 150 36 MAX14606/7 toc04 OUTPUT LEAKAGE CURRENT (A) 1.6 TA = +25C 0 0 1.8 200 50 0 2.0 250 MAX14606/7 toc06 TA = +25C TA = +85C VEN = 0V VOVLO = 0V 300 IN SUPPLY CURRENT (A) 40 MAX14606 VEN = 0V VOVLO = 3V 300 SUPPLY CURRENT vs. SUPPLY VOLTAGE 350 MAX14606/7 toc05 IN SUPPLY CURRENT (A) TA = +85C 50 SUPPLY CURRENT vs. SUPPLY VOLTAGE 350 IN SUPPLY CURRENT (A) VEN = 3V VOVLO = 1V 60 MAX14606/7 toc01 SUPPLY CURRENT vs. SUPPLY VOLTAGE 70 60 85 -40 -15 10 35 60 85 TEMPERATURE (C) 4 MAX14606/MAX14607 Overvoltage Protectors with Reverse Bias Blocking Typical Operating Characteristics (continued) (VIN = +5V, CIN = 1FF, COUT = 1FF, TA = +25NC, unless otherwise noted.) POWER-UP RESPONSE (IOUT = 0.5A, COUT = 100F) POWER-UP RESPONSE (IOUT = 0.5A, COUT = 1000F) MAX14606/7 toc09 MAX14606/7 toc10 0V VIN 5V/div 0V VIN 5V/div 0V VOUT 5V/div 0V VOUT 5V/div IOUT 500mA/div 0mA IOUT 500mA/div 0mA 10ms/div 10ms/div OVERVOLTAGE FAULT RESPONSE (MAX14606, IOUT = 0.5A, COUT = 1F) MAX14606/7 toc11 VIN 5V/div 5V 0V 5V VOUT 5V/div 0V 500mA IOUT 500mA/div 0mA 10s/div Maxim Integrated 5 MAX14606/MAX14607 Overvoltage Protectors with Reverse Bias Blocking Bump Configuration TOP VIEW BUMPS ON BOTTOM MAX14606 MAX14607 2 3 OVLO EN IN I.C. OUT IN GND OUT 1 + ACOK A B C WLP Bump Description PIN NAME A1 ACOK Open-Drain Flag Output. ACOK is driven low after input voltage is stable between minimum VIN and VOVLO after debounce. Connect a pullup resistor from ACOK to the logic I/O voltage of the host system. ACOK is high impedence after thermal shutdown. A2 OVLO Overvoltage Lockout Input. When forced low, it forces the pass element to be switched off. When left unconnected, the part operates normally using its internal OVLO threshold. A3 EN Active-Low Enable Input. Drive EN low to turn on the device. Drive EN high to turn off the device. B1, C1 IN Overvoltage Protection Input. Bypass IN with a 1FF ceramic capacitor for high Q15kV HBM ESD protection. No capacitor is required for Q2kV HBM ESD protection. Externally connect both IN together. B2 I.C. Internally Connected. I.C. is internally connected to ground. Leave I.C. unconnected or connect to GND. B3, C3 OUT Overvoltage Protection Output. Bypass OUT with a 1FF ceramic capacitor. Externally connect both OUT together. C2 GND Ground Maxim Integrated FUNCTION 6 MAX14606/MAX14607 Overvoltage Protectors with Reverse Bias Blocking Functional Diagram Q1 Q2 IN OUT MAX14606/MAX14607 GATE DRIVER CHARGE PUMP BG POK R1 ACOK INOVLO R2 ROVLO_OP TIMING AND CONTROL LOGIC VBG OVLO EN OK VOVLO_OP EN Detailed Description starts counting. After the debounce time, OUT follows IN again and ACOK is asserted. The MAX14606/MAX14607 overvoltage protection (OVP) devices feature low on-resistance (RON) internal FETs (Q1+Q2) and protect low-voltage systems against voltage faults up to +36V. If the input voltage exceeds the overvoltage threshold, the output is disconnected from the input to prevent damage to the protected components. The 15ms debounce time prevents false turn-on of the internal FETs during startup. There are a few options of ACOK and shutdown conditions to choose from with different OVLO and EN input combinations (Table 1). For applications that need ACOK present and OVP open, drive EN low and use OVLO as a digital input to enable and disable the OVP switch. Soft-Start To minimize inrush current, the MAX14606/MAX14607 feature a soft-start capability to slowly turn on Q1 and Q2. Soft-start begins when ACOK is asserted and ends after 15ms (typ). Table 1. Logic Input Table EN LOW HIGH Low OVP Disabled (Reverse Blocking Present) ACOK Present; IIN = 70FA (typ) OVP Shutdown (Reverse Blocking Present) ACOK Not Present; IIN = 5FA (typ) High OVP Enabled ACOK Present; IIN = 70FA (typ) OVP Shutdown (Reverse Blocking Present) ACOK Not Present; IIN = 5FA (typ) OVLO Overvoltage Lockout (OVLO) The MAX14606/MAX14607 use the internal OVLO comparator with the internally set OVLO value. When IN goes above the overvoltage lockout threshold (VIN_OVLO), OUT is disconnected from IN and ACOK is deasserted. When IN drops below VIN_OVLO, the debounce time Maxim Integrated 7 MAX14606/MAX14607 Overvoltage Protectors with Reverse Bias Blocking Reverse Bias Blocking placing the bypass capacitor next to the connector. IC power and ground must also be routed from the connector to the bypass capacitor and then to the MAX14606/ MAX14607. In this way, the capacitor will absorb the ESD energy and thereby protect the device from a highvoltage ESD event. Thermal Shutdown Protection The slow turn-on time provides a soft-start function that allows the devices to charge an output capacitor up to 1000FF without turning off due to an overcurrent condition. When the MAX14606/MAX14607 are in overvoltage condition, EN is high, OVLO is low, or thermal shutdown is on, then the switch between IN and OUT is open and the two back-to-back diodes of the two series switches block reverse bias. Therefore, when the voltage is applied at the output, current does not travel back to the input. The MAX14606/MAX14607 feature thermal shutdown protection to protect the device from overheating. The device enters thermal shutdown when the junction temperature exceeds +150NC (typ), and the device is back to normal operation again after the temperature drops by approximately 20NC (typ). In thermal shutdown, the overvoltage protector is disabled and ACOK is high. Applications Information IN Bypass Capacitor For most applications, it is recommended to bypass IN to GND with a 1F, 30V ceramic capacitor as close to the device as possible to enable 15kV HBM ESD protection on IN. In addition, observe good layout practices such as RC 1M CHARGE-CURRENTLIMIT RESISTOR HIGHVOLTAGE DC SOURCE Cs 100pF RD 1.5k ESD Test Conditions ESD performance depends on a number of conditions. Contact Maxim for a reliability report that documents test methodology and results. Human Body Model ESD Protection Figure 2 shows the HBM, and Figure 3 shows the current waveform it generates when discharged into a low-impedance state. This model consists of a 100pF capacitor charged to the ESD voltage of interest, which is then discharged into the device through a 1.5kI resistor. IP 100% 90% DISCHARGE RESISTANCE STORAGE CAPACITOR OUT Output Capacitor IR AMPERES DEVICE UNDER TEST 36.8% 10% 0 0 Figure 2. Human Body ESD Test Model Maxim Integrated PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE) tRL TIME tDL CURRENT WAVEFORM Figure 3. Human Body Current Waveform 8 MAX14606/MAX14607 Overvoltage Protectors with Reverse Bias Blocking Typical Operating Circuit OTG EN FROM SYSTEM KRX102 TRAVEL ADAPTER IN CHARGER IN OUT 1F 1F MAX14607 PMIC EN ACOK OVLO WIRELESS CHARGER IN OUT VIO 1F MAX14607 EN ACOK TO SYSTEM OVLO Maxim Integrated 9 MAX14606/MAX14607 Overvoltage Protectors with Reverse Bias Blocking Ordering Information/Selector Guide PART OVLO (V) TOP MARK PIN-PACKAGE MAX14606EWL+T 5.87 AJR 9 WLP MAX14607EWL+T 6.80 AJS 9 WLP Note: All devices are specified over the -40C to +85C operating temperature range. +Denotes a lead(Pb)-free package/RoHS-compliant package. T = Tape and reel. Chip Information PROCESS: BiCMOS Maxim Integrated Package Information For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a "+", "#", or "-" in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 9 WLP W91B1+6 21-0430 Refer to Application Note 1891 10 MAX14606/MAX14607 Overvoltage Protectors with Reverse Bias Blocking Revision History REVISION NUMBER REVISION DATE 0 12/11 DESCRIPTION Initial release PAGES CHANGED -- Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000 (c) 2011 Maxim Integrated Products, Inc. 11 Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Maxim Integrated: MAX14607EWL+T MAX14606EWL+T