1. Product profile
1.1 General description
110 W LDMOS power transistor for base station applications at frequencies from
1800 MHz to 2000 MHz.
[1] Test signal: 3GPP; test model 1; 64 DPCH; PAR = 7 dB at 0.01 % probability on CCDF per carrier; carrier
spacing 10 MHz.
1.2 Features
nTypical 2-carrier W-CDMA performance at frequencies of 1930 MHz and 1990 MHz,
a supply voltage of 28 V and an IDq of 900 mA:
uAverage output power = 25 W
uPower gain = 19 dB
uEfficiency = 32 %
uIMD3 = −34 dBc
uACPR = −38 dBc
nEasy power control
nIntegrated ESD protection
nExcellent ruggedness
nHigh efficiency
nExcellent thermal stability
nDesigned for broadband operation (1800 MHz to 2000 MHz)
nInternally matched for ease of use
nCompliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS)
BLF6G20-110; BLF6G20LS-110
Power LDMOS transistor
Rev. 03 — 13 January 2009 Product data sheet
Table 1. Typical performance
RF performance at T
case
= 25
°
C in a common source class-AB production test circuit.
Mode of operation f VDS PL(AV) GpηDIMD3 ACPR
(MHz) (V) (W) (dB) (%) (dBc) (dBc)
2-carrier W-CDMA 1930 to 1990 28 25 19 32 −34[1] −38[1]
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken
during transport and handling.
BLF6G20-110_BLF6G20LS-110_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 13 January 2009 2 of 10
NXP Semiconductors BLF6G20-110; BLF6G20LS-110
Power LDMOS transistor
1.3 Applications
nRF power amplifiers for GSM, GSM EDGE, W-CDMA and CDMA base stations and
multicarrier applications in the 1800 MHz to 2000 MHz frequency range
2. Pinning information
[1] Connected to flange.
3. Ordering information
4. Limiting values
Table 2. Pinning
Pin Description Simplified outline Graphic symbol
BLF6G20-110 (SOT502A)
1 drain
2 gate
3 source [1]
BLF6G20LS-110 (SOT502B)
1 drain
2 gate
3 source [1]
3
2
1
sym112
1
3
2
3
2
1
sym112
1
3
2
Table 3. Ordering information
Type number Package
Name Description Version
BLF6G20-110 - flanged LDMOST ceramic package; 2 mounting holes;
2 leads SOT502A
BLF6G20LS-110 - earless flanged LDMOST ceramic package; 2 leads SOT502B
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDS drain-source voltage - 65 V
VGS gate-source voltage −0.5 +13 V
IDdrain current - 29 A
Tstg storage temperature −65 +150 °C
Tjjunction temperature - 225 °C
BLF6G20-110_BLF6G20LS-110_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 13 January 2009 3 of 10
NXP Semiconductors BLF6G20-110; BLF6G20LS-110
Power LDMOS transistor
5. Thermal characteristics
6. Characteristics
7. Application information
7.1 Ruggedness in class-AB operation
The BLF6G20-110 and BLF6G20LS-110 are capable of withstanding a load mismatch
corresponding to VSWR = 10 : 1 through all phases under the following conditions:
VDS = 28 V; IDq = 900 mA; PL= 110 W (CW); f = 1990 MHz.
Table 5. Thermal characteristics
Symbol Parameter Conditions Type Typ Unit
Rth(j-case) thermal resistance from
junction to case Tcase =80°C;
PL= 25 W (CW) BLF6G20-110 0.52 K/W
BLF6G20LS-110 0.45 K/W
Table 6. Characteristics
T
j
= 25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
V(BR)DSS drain-source breakdown
voltage VGS =0V; I
D= 0.5 mA 65 - - V
VGS(th) gate-source threshold voltage VDS =10V;I
D= 150 mA 1.4 2 2.4 V
VGSq gate-source quiescent voltage VDS =28V;I
D= 950 mA 1.6 2.1 2.6 V
IDSS drain leakage current VGS =0V; V
DS =28V - - 5 µA
IDSX drain cut-off current VGS =V
GS(th) + 3.75 V;
VDS =10V 22.3 27 - A
IGSS gate leakage current VGS = 13 V; VDS = 0 V - - 450 nA
gfs forward transconductance VDS =10V; I
D= 7.5 A - 10.5 - S
RDS(on) drain-source on-state
resistance VGS =V
GS(th) + 3.75 V;
ID= 5.25 A - 0.1 0.160 Ω
Crs feedback capacitance VGS =0V; V
DS =28V;
f=1MHz - 2.1 - pF
Table 7. Application information
Mode of operation: 2-carrier W-CDMA; PAR 7 dB at 0.01 % probability on CCDF; 3GPP test
model 1; 1-64 PDPCH; f
1
= 1932.5 MHz; f
2
= 1942.5 MHz; f
3
= 1977.5 MHz; f
4
= 1987.5 MHz;
RF performance at V
DS
= 28 V; I
Dq
= 900 mA; T
case
= 25
°
C; unless otherwise specified; in a
class-AB production test circuit.
Symbol Parameter Conditions Min Typ Max Unit
PL(AV) average output power - 25 - W
Gppower gain PL(AV) = 25 W 18 19 - dB
ηDdrain efficiency PL(AV) = 25 W 28 32 - %
IMD3 third order intermodulation distortion PL(AV) = 25 W - −34 −28 dBc
ACPR adjacent channel power ratio PL(AV) = 25 W - −38 −33 dBc
BLF6G20-110_BLF6G20LS-110_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 13 January 2009 4 of 10
NXP Semiconductors BLF6G20-110; BLF6G20LS-110
Power LDMOS transistor
7.2 One-tone CW
7.3 Two-tone CW
VDS = 30 V; IDq = 1400 mA; f = 1960 MHz.
Fig 1. One-tone CW power gain and drain efficiency as function of load power;
typical values
PL(PEP) (W)
0 140100 1204020 8060
001aaj072
18
16
20
22
Gp
(dB)
14
30
15
45
60
ηD
(%)
0
Gp
ηD
VDS = 30 V; IDq = 1400 mA; f = 1960 MHz. VDS = 30 V; IDq = 1400 mA; f = 1960 MHz.
Fig 2. Two-tone CW power gain and drain efficiency
as function of peak envelope load power;
typical values
Fig 3. Two-tone CW intermodulation distortion as a
function of peak envelope load power; typical
values
PL(PEP) (W)
0 1008040 6020
001aaj073
18
16
20
22
Gp
(dB)
14
30
15
45
60
ηD
(%)
0
Gp
ηD
PL(PEP) (W)
0 1008040 6020
001aaj074
−50
−30
−10
IMD3
(dBc)
−70
IMD3
IMD5
IMD7
BLF6G20-110_BLF6G20LS-110_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 13 January 2009 5 of 10
NXP Semiconductors BLF6G20-110; BLF6G20LS-110
Power LDMOS transistor
8. Test information
[1] American Technical Ceramics type 100B or capacitor of same quality.
[2] TDK or capacitor of same quality.
[3] AVX or capacitor of same quality.
The striplines are on a double copper-clad Taconic RF35 Printed-Circuit Board (PCB) with εr= 3.5
and thickness = 0.76 mm.
See Table 8 for list of components.
Fig 4. Component layout
Table 8. List of components (see Figure 4).
Component Description Value Remarks
C1 multilayer ceramic chip capacitor 8.2 pF [1]
C2 multilayer ceramic chip capacitor 10 pF [1]
C3 electrolytic capacitor 100 µF; 63 V
C4, C8 multilayer ceramic chip capacitor 4.7 µF; 25 V [2]
C5, C7, C12, C13 multilayer ceramic chip capacitor 220 nF; 50 V [3]
C6, C10, C11 multilayer ceramic chip capacitor 13 pF [1]
C9 multilayer ceramic chip capacitor 330 nF; 50 V [3]
C14 multilayer ceramic chip capacitor 1.0 pF [1]
C15 multilayer ceramic chip capacitor 1.5 pF [1]
C16 multilayer ceramic chip capacitor 0.6 pF [1]
Q1 BLF6G20-110 or BLF6G20LS-110 -
R1 SMD resistor 1.0 Ω
R2 SMD resistor 2.7 Ω
001aah517
C1
C16
C7
C6
C13C11
Q1
C15
INPUTBOARD
TB OUTPUTBOARD
TB
R1
R2
C4
C5
C12
C14
C10 C9 C8
C3
C2
BLF6G20-110_BLF6G20LS-110_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 13 January 2009 6 of 10
NXP Semiconductors BLF6G20-110; BLF6G20LS-110
Power LDMOS transistor
9. Package outline
Fig 5. Package outline SOT502A
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT502A 99-12-28
03-01-10
0 5 10 mm
scale
Flanged LDMOST ceramic package; 2 mounting holes; 2 leads SOT502A
p
L
AF
b
D
U2
H
Q
c
1
3
2
D1
E
A
C
q
U1
C
B
E1
M M
w2
UNIT A
mm
Db
12.83
12.57 0.15
0.08 20.02
19.61 9.53
9.25 19.94
18.92 9.91
9.65
4.72
3.43
cU2
0.25 0.5127.94
qw
2
w1
F
1.14
0.89
U1
34.16
33.91
L
5.33
4.32
p
3.38
3.12
Q
1.70
1.45
EE
1
9.50
9.30
inches 0.505
0.495 0.006
0.003 0.788
0.772
D1
19.96
19.66
0.786
0.774 0.375
0.364 0.785
0.745 0.390
0.380
0.186
0.135 0.01 0.021.100
0.045
0.035 1.345
1.335
0.210
0.170 0.133
0.123 0.067
0.057
0.374
0.366
H
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)
w1AB
M M M
BLF6G20-110_BLF6G20LS-110_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 13 January 2009 7 of 10
NXP Semiconductors BLF6G20-110; BLF6G20LS-110
Power LDMOS transistor
Fig 6. Package outline SOT502B
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT502B 03-01-10
07-05-09
0 5 10 mm
scale
Earless flanged LDMOST ceramic package; 2 leads SOT502B
AF
b
D
U2
L
H
Q
c
1
3
2
D1
E
D
U1
D
E1
M M
w2
UNIT A
mm
Db
12.83
12.57 0.15
0.08 20.02
19.61 9.53
9.25 19.94
18.92 9.91
9.65
4.72
3.43
cU2
0.25
w2
F
1.14
0.89
U1
20.70
20.45
L
5.33
4.32
Q
1.70
1.45
EE
1
9.50
9.30
inches 0.505
0.495 0.006
0.003 0.788
0.772
D1
19.96
19.66
0.786
0.774 0.375
0.364 0.785
0.745 0.390
0.380
0.186
0.135 0.010
0.045
0.035 0.815
0.805
0.210
0.170 0.067
0.057
0.374
0.366
H
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)
BLF6G20-110_BLF6G20LS-110_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 13 January 2009 8 of 10
NXP Semiconductors BLF6G20-110; BLF6G20LS-110
Power LDMOS transistor
10. Abbreviations
11. Revision history
Table 9. Abbreviations
Acronym Description
3GPP Third Generation Partnership Project
CCDF Complementary Cumulative Distribution Function
CDMA Code Division Multiple Access
CW Continuous Wave
DPCH Dedicated Physical CHannel
EDGE Enhanced Data rates for GSM Evolution
EVM Error Vector Magnitude
GSM Global System for Mobile communications
LDMOS Laterally Diffused Metal-Oxide Semiconductor
LDMOST Laterally Diffused Metal-Oxide Semiconductor Transistor
PAR Peak-to-Average power Ratio
PDPCH transmission Power of the Dedicated Physical CHannel
RF Radio Frequency
SMD Surface Mounted Device
VSWR Voltage Standing-Wave Ratio
W-CDMA Wideband Code Division Multiple Access
Table 10. Revision history
Document ID Release date Data sheet status Change
notice Supersedes
BLF6G20-110_BLF6G20LS-110_3 20090113 Product data sheet - BLF6G20-110_BLF6G20LS-110_2
Modifications: •Figure 1 on page 4: Power gain curve corrected
•Figure 2 on page 4: Power gain curve corrected
BLF6G20-110_BLF6G20LS-110_2 20081117 Product data sheet - BLF6G20-110_BLF6G20LS-110_1
BLF6G20-110_BLF6G20LS-110_1 20080128 Preliminary data sheet - -
BLF6G20-110_BLF6G20LS-110_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 13 January 2009 9 of 10
NXP Semiconductors BLF6G20-110; BLF6G20LS-110
Power LDMOS transistor
12. Legal information
12.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
12.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
13. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
NXP Semiconductors BLF6G20-110; BLF6G20LS-110
Power LDMOS transistor
© NXP B.V. 2009. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 13 January 2009
Document identifier: BLF6G20-110_BLF6G20LS-110_3
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
14. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description. . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Thermal characteristics. . . . . . . . . . . . . . . . . . . 3
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 3
7 Application information. . . . . . . . . . . . . . . . . . . 3
7.1 Ruggedness in class-AB operation. . . . . . . . . . 3
7.2 One-tone CW . . . . . . . . . . . . . . . . . . . . . . . . . . 4
7.3 Two-tone CW . . . . . . . . . . . . . . . . . . . . . . . . . . 4
8 Test information. . . . . . . . . . . . . . . . . . . . . . . . . 5
9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 6
10 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . . 8
11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 8
12 Legal information. . . . . . . . . . . . . . . . . . . . . . . . 9
12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 9
12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
12.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
13 Contact information. . . . . . . . . . . . . . . . . . . . . . 9
14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
