SY56572XR
Low Voltage 1.2V/1.8V/2.5V CML
4:1 MUX with 1:2 FANOUT
6.4Gbps with EQUALIZATION
Precision Edge is a registered tradem ark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
April 2010
M9999-041510-A
hbwhelp@micrel.com or (408) 955-1690
General Description
The SY56572XR is a fully differential, low voltage
1.2V/1.8V/2.5V CML 4:1 Mux, with input equalization,
and integrated 1:2 Fanout Buffer. The SY56572XR can
process c lock s ignals as f ast as 4.5G H z or dat a patt erns
up to 6.4Gbps.
The diff erential inp ut includ es Mic rel’s uniqu e 3-pi n input
termination architecture that interfaces to DC-coupled
2.5V/3.3V LVPECL, 1.2V/1.8V/2.5V CML or LVDS
differential signals. For AC-coupled input applications,
an internal voltage reference is provided for input bias.
Input voltages as small as 200mV (400mVpp) are applied
before the 9, 18 or 27-inch FR4 transmission line.
The SY56572XR operates from a 2.5V ±5% core supply
and a 1.2V, 1.8V or 2.5V ±5% output supply and is
guaranteed over the full industrial temperature range
(–40°C to +85°C). The SY56572XR is part of Micrel’s
high-speed, Precision Edge® pr oduc t line.
Data sheets and support documentation can be found
on Micrel’s web site at: www.micrel.com.
Applications
Data Distribution
SONET clock and data distribution
Fiber Channel clock and data distribution
Gigabit Ether net c lock and data distribution
Precisio n Edge ®
Features
1.2V/1.8V/2.5V CML 4:2 MUX with input equalization.
Guaranteed AC performance over temperature and
voltage:
DC-to > 6.4Gbps throughput
<360ps propagation delay (IN-to-Q)
<15ps withi n-device skew
Ultra-low jitter design
<0.8psRMS random jitter
<10psPP deterministic jitter
2.5V ±5% , 1.8/1.2V ±5% power supply operation
Industrial temperature range: 40°C t o +85°C
Available in 32-pin (5mm x 5mm) QFN package
Functional Block Diagram
Micrel, Inc.
SY56572XR
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Ordering Information(1)
Part Number Package
Type Operating
Range Package Marking Lead
Finish
SY56572XRMG QFN-32 Industrial SY56572X with P b-Free
bar-line indicator NiPdAu
Pb-Free
SY56572XRMGTR(2) QFN-32 Industrial SY56572X with Pb-Free
bar-line indicator NiPdAu
Pb-Free
Notes:
1. Contact f act ory for die availabi lit y. Dice are guaranteed at TA = 25°C, DC Electricals onl y.
2. Tape and Reel.
Pin Configuration
32-Pin QFN
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Pin Description
Pin Number Pin Name Pin Function
1,4
5,8
25,28
29,32
IN0, /IN0
IN1, /IN1
IN2, /IN2
IN3, /IN3
Differential Inputs: Accepts differential signal s as small as 20 0 mV (400mVPP)
applied to the input of a 9, 18 or 27 inch 6mil FR4 stripline transmission line. See
“Input and Output Stage” section for details of this input.
2
6
26
30
VT0
VT1
VT2
VT3
Input Termination Center-Tap: Each side of the differential input pair terminates to
the VT pin. This pin provides a center-tap to a termination network for maximum
interface flexibility. An internal high impedance resistor divider biases VT to allow
input AC coupling. For AC coupling, bypass VT with 0.1µF low ESR capacitor to
VCC. See “Input Interface Applications” subsection and Figure 2a.
19 EQ Three level input for equalization control.
15
18 SEL0
SEL1 Single-ended TTL/CMOS compatible input selects the inputs to the multiplexer. This
input is internally connected to a 25k pull-up resistor and will default to a logic
HIGH state if left open. Input logic threshold is VCC/2. See “Truth Table” for select
control.
16,17 VCC Positive Power Supply: Bypass with 0.1uF//0.01uF low ESR capacitors as close to
the VCC pin as possible. Supplies the input and core circuitry.
10,13,20,23 VCCO Output Supply: Bypass with 0.1uF//0.01uF low ESR capacitors as close to the VCCO
pin as possible. Supplies the output buffers.
9,24 GND,
Exposed pad Ground: Exposed pad must be connected to a ground plane that is the same
potential as the ground pins.
12,11
22,21 Q0, /Q0
Q1, /Q1
CML Differential Output Pair: Differential buffered copy of the input signal. The
output swing is typically 390mV. See “Functional Description” subsection for
terminati on infor mation.
Truth Table
EQ Input Equalization FR4 6mil Stripline
LOW 9 “
FLOAT 18”
HIGH 27
SEL1 SEL0
0 0 IN0 Input Selected
0 1 IN1 Input Selected
1 0 IN2 Input Selected
1 1 IN3 Input Selected
Micrel, Inc.
SY56572XR
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Absolute Maximum Ratings(1)
Supply Voltage (VCC) ............................... 0.5V to +3.0V
Supply Voltage (VCCO) ............................. 0.5V to +3.0V
VCC -VCCO ................................................................ <1.8V
VCCO -VCC ............................................................... <0.5 V
Input Voltage (VIN) ............................. 0.5V to VCC+0.4V
CML Output Voltage (VOUT) ............................ 0.6V to 3V
Current (VT)
Source or sink on VT pin ............................. ±100mA
Input Current
Source or sink Current on (IN, /IN) ................ ±50mA
Maximum operating Junction Temperature .......... 125°C
Lead Temperature (soldering, 20sec.) .................. 260°C
Storage Temperature (Ts) .................... 65°C to +150°C
Operating Ratings(2)
Supply Voltage (Vcc) ........................... 2.375V to 2.625V
(Vcco)………………..….1.14V to 2.625V
Ambient Temperature (TA) ................... 40°C to +85°C
Package Thermal Resistance(3)
QFN
Still-air (θJA) ............................................ 50°C/W
Junction-to-board (ψJB) ......................... 20°C/W
DC Electrical Characteristics(4)
TA = 40°C to +85°C, unless otherwise stated.
Symbol Parameter Condition Min Typ Max Units
VCC Power Supply Voltage Range VCC
VCCO
VCCO
VCCO
2.375
1.14
1.7
2.375
2.5
1.2
1.8
2.5
2.625
1.26
1.9
2.625
V
V
V
V
ICC Power Supply Current Max. VCC 110 140 mA
ICCO Power Suppl y Current No Load. VCCO 32 42 mA
RDIFF_IN Differential Input Resist ance
(IN-to-/IN) 90 100 110
VIH Input HIGH Voltage
(IN, /IN) IN, /IN 1.2 VCC+0.4 V
VIL Input LO W Voltage
(IN, /IN) IN, /IN 0 VIH0.2 V
VIN Input Voltage Swing
(IN, /IN) See Figure 3a, Note 5, appl ied to
input of transmission line. 0.2 1.0 V
VDIFF_IN Differential Input Voltage Swing
(|IN - /IN|) See Figure 3b, Note 5, a pplied to
input of trans mi ss ion line. 0.4 2.0 V
VT_IN Voltage from Input to VT 1.28 V
Notes:
1. Permanent device dam age may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not
implied at conditions other than those det ailed in the operational sect i ons of this data sheet. E xposure to absol ut e maximum ratings conditi ons f or
extended periods may aff ect device reliabi l i t y.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating r atings.
3. Package thermal resist ance assumes exposed pad is soldered (or equivalent) t o the device's most negative potential on the PCB. ψJB and θJA
values are determined for a 4-layer board in still-air num ber, unless otherwise s tated.
4. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
5. VIN (max) is specified when VT is floating.
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SY56572XR
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CML Outputs DC Electrical Characteristics(6)
VCCO = 1.14V to 1.26V RL = 50Ω to VCCO.
VCCO = 1.7V to 1.9V, 2.375V to 2.625V, RL = 50Ω to VCCO or 100Ω across the outputs.
VCC = 2.375V to 2.625V; TA = 40°C to +85°C, unless otherwise stated.
Symbol Parameter Condition Min Typ Max Units
VOH Output HIGH Voltage RL = 50Ω to VCCO VCC-0.020 VCC-0.010 VCC V
VOUT Output Voltage Swing See Figure 3a 300 390 475 mV
VDIFF_OUT Differ ential Output Voltage Swing See Figure 3b 600 780 950 mV
ROUT Output Source Impedance 45 50 55
LVTTL/CMOS DC Electrical Characteristics(6)
VCC = 2.375V to 2.625V; TA = 40°C to +85°C, unless otherwise stated.
Symbol Parameter Condition Min Typ Max Units
VIH Input HIGH Voltage 2.0 VCC V
VIL Input LO W Voltage 0.8 V
IIH Input HIGH Current -125 30 µA
IIL Input LO W Current -300 µA
Three Level EQ Input DC Electrical Characteristics(6)
VCC = 2.375V to 2.625V; TA = 40°C to +85°C, unless otherwise stated.
Symbol Parameter Condition Min Typ Max Units
VIH Input HIGH Voltage VCC-0.3 VCC V
VIL Input LO W Voltage 0 VEE+0.3 V
IIH Input HIGH Current VIH = VCC 400 µA
IIL Input LO W Current VIL = GND -480 µA
Note:
6. The ci rcuit is designed to meet the DC specifications shown in the above table after therm al equilibrium has been est ablis hed.
Micrel, Inc.
SY56572XR
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AC Electrical Characteristics
VCCO = 1.14V to 1.26V RL = 50Ω to VCCO.
VCCO = 1.7V to 1.9V, 2.375V to 2.625V, RL = 50Ω to VCCO or 100Ω across the outputs.
VCC = 2.375V to 2.625V; TA = 40°C to +85°C, unless otherwise stated.
Symbol Parameter Condition Min Typ Max Units
fMAX Maximum Frequency NRZ Data 6.4 Gbps
VOUT > 200mV (Clock) 4.5 GHz
tPD Propagation Delay (IN-to-Q)
(SEL-to-Q)
Note 7, Figure 1a 210 280 360 ps
Figure 1b 1 ns
tSkew Output-to-Output Skew Note 8 3 15 ps
Part-to-Part Skew Note 9 100 ps
tJitter Data Random Jitter Note 10 0.8 psRMS
Data Deterministi c Jitter Note 11 10 psPP
tR tF Output Rise/Fall Time
(20% to 80%) At full output swing. 30 55 85 ps
Duty Cycle Differential I/O 45 55 %
Notes:
7. Propagation delay is measured with no attenuating transmissi on line connected to the input.
8. Output-to-Output skew is the difference in time between both outputs under identical input transition, tem perature and power supply
9. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and no skew at the edges at the
respective inputs.
10. Random jitter is additive jitt er.
11. Deterministic jitter is measured with 2231 PRBS pattern.
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SY56572XR
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Functional Description
CML Output Termination with Vcco 1.2V
For VCCO of 1.2V, Figure 5a, terminate the output with
50to 1.2V, n ot 100 d if f erential l y across the outp uts. If
AC coupling is used, Figure 5d, terminate into 50 to
1.2V befor e the c oup li ng ca pacitor an d th en c o nnect to a
high value resistor to a reference voltage. Any unused
output pair with VCCO at 1.2V needs to be terminated,
do not leave floating.
CML Output Termination with VCCO 1.8V, 2.5V
For VCCO of 1.8V or 2.5V , Figure 5a/b, t erminate with
either 50 to 1.8V or 100 differentially across the
outputs. AC-or DC-coupling is fine. For best signal
integrity, terminate any unused output pairs.
Timing Diagrams
Figure 1a. IN-to-Q Timing Diagram
Figure 1b. SEL-to-Q Timing Diagram
(Qx state can be high or low depending on input data)
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Input and Output Stage
Figure 2a. Simplified Differential Input Buffer
Figure 2b. Simplified CML Output Buffer
Single-Ended and Differential Swings
Figure 3a. Single-Ended Swing
Figure 3b. Differential Swing
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Input Interface Applications
Figure 4a. CML Interface
100 Ω Differential
(DC-Coupled, 1.8V, 2.5V)
Figure 4b. CML Interface
50-to-Vcc
(DC-Coupled, 1.2V,1.8V,2.5V)
Figure 4c. CML Interface
(AC-Coupled)
*See note in Functional Description
for 1.2V CML d river with AC-Coupling.
Figure 4d. LVPECL Interface
(AC-Coupled)
Figure 4e. LVPECL Interface
(DC-Coupled 2.5V and 3.3V)
Figure 4f. LVDS Interface
Micrel, Inc.
SY56572XR
April 2010 10 M9999-041510-A
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CML Output Termination
Figure 5a. 1.2V, 1.8V, 2.5V CML DC-Coupled Termination Figure 5b. 1.8V, 2.5V CML DC-Coupled Termination
Figure 5c. CML AC-Coupled Termination. Figure 5d. CML AC-Coupled Termination.
VCCO 1.8V, 2.5V only. VCCO 1.2V onl y.
Micrel, Inc.
SY56572XR
April 2010 11 M9999-041510-A
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Package Information
32-Pin QFN
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http:/ /www .micrel. com
T he i nf orm ation furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibilit y is assum
ed by Micrel for
its use. Micrel reserves the right to change circuitry and specif ications at any time without notific at i on to the customer.
Micrel Products are not designed or authorized for use as components in life support applianc es, devices or systems where malfunction of a
product can reasonably be expected to result in personal i nj ury. Lif e support devices or systems are devices or systems that (a) are intended for
surgical implant int o the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant
injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk
and Purchaser agrees to fully indem nify Micrel f or any damages resulting from such use or sale.
© 2010 Micrel, Incorporated.