DFN (EH)
Description
The A 3211 and A3212 integrated circuits are ultrasensitive,
pole in de pen dent Hall-effect switches with latched digital
output. These devices are es pe cial ly suited for operation
in battery-operated, hand-held equip ment such as cellular
and cordless tele phones, pagers, and palmtop com put ers.
A 2.5 to 3.5 V operation and a unique clocking scheme reduce
the average op er at ing power requirements to less than 15 W
with a 2.75 V supply.
Unlike other Hall-effect switches, either a north or south pole
of suf fi cient strength will turn the output on in the A3212,
and in the absence of a magnetic field, the output is off. The
A3211 provides an inverted output. The polarity independence
and minimal power requirements allow these devices to easily
replace reed switches for superior reliability and ease of
manufacturing, while eliminating the requirement for signal
conditioning.
Improved stability is made possible through chopper
stabilization (dynamic offset cancellation), which reduces the
residual offset voltage normally caused by device overmolding,
temperature de pen den cies, and thermal stress.
3211-DS, Rev. 16
Features and Benefits
▪ Micropower operation
▪ Operation with north or south pole
▪ 2.5 to 3.5 V battery operation
▪ Chopper stabilized
▫ Superior temperature stability
▫ Extremely low switchpoint drift
▫ Insensitive to physical stress
▪ High ESD protection
▪ Sol id-state reliability
▪ Small size
▪ Easily manufacturable with magnet pole independence
Micropower, Ultrasensitive
Hall-Ef fect Switches
Continued on the next page…
Packages:
Functional Block Diagram
Not to scale
A3211 and A3212
DFN (EL)
SOT23W (LH) SIP (UA)
TIMING
LOGIC
Dwg. FH-020-5
LATCH
GROUND
OUTPUT
SUPPLY
X
DYNAMIC
OFFSET CANCELLATION
SWITCH
SAMPLE
& HOLD
Micropower, Ultrasensitive
Hall-Ef fect Switches
A3211 and
A3212
2
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
This device includes on a single silicon chip a Hall-voltage gen-
erator, small-signal amplifier, chopper sta bi li za tion, a latch, and
a MOSFET output. Advanced CMOS processing is used to take
advantage of low-voltage and low-power requirements, compo-
nent matching, very low input-offset errors, and small component
geometries.
Four package styles provide magnetically op ti mized solutions for
most ap pli ca tions. Miniature low-profile surface-mount package
types EH and EL (0.75 and 0.50 mm nominal height) are leadless,
LH is a 3-pin low-profile SMD, and UA is a three-pin SIP for
through-hole mount ing. Packages are lead (Pb) free (suffix, –T)
with 100% matte tin plated leadframes.
Description (continued)
Absolute Maximum Ratings
Characteristic Symbol Notes Rating Units
Supply Voltage VDD 5V
Magnetic Flux Density B Unlimited G
Output Off Voltage VOUT 5V
Output Current IOUT 1mA
Operating Ambient Temperature TA
Range E –40 to 85 ºC
Range L –40 to 150 ºC
Maximum Junction Temperature TJ(max) 165 ºC
Storage Temperature Tstg –65 to 170 ºC
Selection Guide
Part Number Packing1Package Ambient Temperature
TA (°C) State in
Magnetic Field
A3211EEHLT–T23000 pieces per reel 2 mm x 3 mm, 0.75 mm nominal height DFN
–40 to 85 OffA3211EELLT–T23000 pieces per reel 2 mm x 2 mm, 0.50 mm nominal height DFN
A3211ELHLT–T 3000 pieces per reel 3-pin surface mount SOT23W
A3212EEHLT–T23000 pieces per reel 2 mm x 3 mm, 0.75 mm nominal height DFN
–40 to 85
On
A3212EELLT–T23000 pieces per reel 2 mm x 2 mm, 0.50 mm nominal height DFN
A3212ELHLT–T 3000 pieces per reel 3-pin surface mount SOT23W
A3212EUA–T 500 pieces per bulk bag SIP-3 through hole
A3212LLHLT–T 3000 pieces per reel 3-pin surface mount SOT23W –40 to 150
A3212LUA–T 500 pieces per bulk bag SIP-3 through hole
1Contact Allegro for additional packaging and handling options.
2Allegro products sold in DFN package types are not intended for automotive applications.
Micropower, Ultrasensitive
Hall-Ef fect Switches
A3211 and
A3212
3
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Package Suffix ‘UA’ Pinning
(SIP)
Pinning is shown viewed from branded side.
Package Suffix ‘EH’ Pinning
(Leadless Chip Carrier)
X
Dwg. PH-016-2
SUPPLY
GROUND
OUTPUT
V
DD
GROUND
NO
CONNECTION
NO
CONNECTION
54
6
13
2
Dwg. PH-016
1
SUPPLY
VDD
GROUND
32
OUTPUT
X
Package Suffix ‘LH’ Pinning
(SOT23W)
Dwg. PH-016-1
SUPPLY
GROUND
OUTPUT
V
DD
12
3
Package Suffix ‘EL’ Pinning
(Leadless Chip Carrier)
Dwg. PH-016-1
SUPPLY
GROUND
OUTPUT
V
DD
12
3
Micropower, Ultrasensitive
Hall-Ef fect Switches
A3211 and
A3212
4
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
ELECTRICAL CHARACTERISTICS over operating voltage and temperature range (unless otherwise specified).
Characteristic Symbol Test Conditions Limits
Min. Typ.* Max. Units
Supply Voltage Range VDD Operating 2.5 2.75 3.5 V
Output Leakage Current IOFF VOUT = 3.5 V, Output off – <1.0 1.0 μA
Output On Voltage VOUT IOUT = 1 mA, VDD = 2.75 V – 100 300 mV
Awake Time tawake –4590μs
Period tperiod –4590ms
Duty Cycle d.c. – 0.1 – %
Chopping Frequency fC– 340 – kHz
Supply Current
IDD(EN) Chip awake (enabled) – – 2.0 mA
IDD(DIS) Chip asleep (disabled) – – 8.0 μA
IDD(AVG)
VDD = 2.75 V – 5.1 10 μA
VDD = 3.5 V – 6.7 10 μA
* Typical data is at TA = 25°C and VDD = 2.75 V, and is for design information only.
Micropower, Ultrasensitive
Hall-Ef fect Switches
A3211 and
A3212
5
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A3211 MAGNETIC CHARACTERISTICS over operating voltage range (unless otherwise specified)
Characteristic Symbol Test Conditions Limits
Min. Typ. Max. Units
Over Temperature Range E: TA = –40°C to 85°C
Operate Points BOPS South pole to branded side; B > BOP
, VOUT = High (Output Off) – 37 55 G
BOPN North pole to branded side; B > BOP
, VOUT = High (Output Off) –55 –40 – G
Release Points BRPS South pole to branded side; B < BRP
, VOUT = Low (Output On) 10 31 – G
BRPN North pole to branded side; B < BRP
, VOUT = Low (Output On) – –34 –10 G
Hysteresis BHYS |BOPx - BRPx| – 5.9 – G
NOTES: 1. Negative flux densities are defined as less than zero (algebraic convention), i.e., -50 G is less than +10 G.
2. BOPx = operate point (output turns off); BRPx = release point (output turns on).
3. Typical Data is at TA = +25°C and VDD = 2.75 V and is for design information only.
4. 1 gauss (G) is exactly equal to 0.1 millitesla (mT).
Characteristic Symbol Test Conditions Limits
Min. Typ. Max. Units
Over Temperature Range E: TA = –40°C to 85°C
Operate Points BOPS South pole to branded side; B > BOP
, VOUT = Low (Output On) – 37 55 G
BOPN North pole to branded side; B > BOP
, VOUT = Low (Output On) –55 –40 – G
Release Points BRPS South pole to branded side; B < BRP
, VOUT = High (Output Off) 10 31 – G
BRPN North pole to branded side; B < BRP
, VOUT = High (Output Off) – –34 –10 G
Hysteresis BHYS |BOPx - BRPx| – 5.9 – G
Over Temperature Range L: TA = –40°C to 150°C
Operate Points BOPS South pole to branded side; B > BOP
, VOUT = Low (Output On) – 37 65 G
BOPN North pole to branded side; B > BOP
, VOUT = Low (Output On) –65 –40 – G
Release Points BRPS South pole to branded side; B < BRP
, VOUT = High (Output Off) 10 31 – G
BRPN North pole to branded side; B < BRP
, VOUT = High (Output Off) – –34 –10 G
Hysteresis BHYS |BOPx - BRPx| – 5.9 – G
NOTES: 1. Negative flux densities are defined as less than zero (algebraic convention), i.e., -50 G is less than +10 G.
2. BOPx = operate point (output turns on); BRPx = release point (output turns off).
3. Typical Data is at TA = +25°C and VDD = 2.75 V and is for design information only.
4. 1 gauss (G) is exactly equal to 0.1 millitesla (mT).
A3212 MAGNETIC CHARACTERISTICS over operating voltage range (unless otherwise specified)
Micropower, Ultrasensitive
Hall-Ef fect Switches
A3211 and
A3212
6
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
TYPICAL OPERATING CHARACTERISTICS
SUPPLY CURRENT
SWITCH POINTS
0 50 100
AMBIENT TEMPERATURE IN °°
°°C
-50
Dwg. GH-027-3
SWITCH POINTS IN GAUSS
0
20
40
-20
-40
V
DD
= 2.75 V
150
60
-60
-25 25 75 125
B
OPS
B
RPS
B
RPN
B
OPN
60
SWITCH POINTS IN GAUSS
20
0
-20
-40
2.8 3.0 3.2 3.4 3.6
SUPPLY VOLTAGE IN VOLTS
2.4
Dwg. GH-057-2
2.6
B
OPS
-60
40
B
RPS
B
RPN
B
OPN
T
A
= 25°C
0255075
100
AMBIENT TEMPERATURE IN °°
°°C
-50
Dwg. GH-028-11
125
-25
AVERAGE SUPPLY CURRENT IN μμ
μμA
7.0
6.0
5.0
3.0
V
DD
=3.5 V
150
V
DD
=2.75 V
V
DD
=2.5 V
4.0
7.0
AVERAGE SUPPLY CURRENT IN μμ
μμA
6.0
5.0
4.0
3.0
2.8 3.0 3.2 3.4 3.6
SUPPLY VOLTAGE IN VOLTS
2.4
Dwg. GH-058-7
2.6
T
A
= 25°C
Micropower, Ultrasensitive
Hall-Ef fect Switches
A3211 and
A3212
7
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
FUNCTIONAL DESCRIPTION
Low A verage Power . Internal timing circuitry activates the
IC for 45 μs and deactivates it for the remainder of the period
(45 ms). A short "awake" time allows for stabilization prior to
the sam pling and data latching on the falling edge of the timing
pulse. The output during the "sleep" time is latched in the last
sampled state. The supply current is not affected by the output
state.
Chopper-Stabilized Technique. The Hall element can be
considered as a resistor array similar to a Wheatstone bridge. A
large portion of the offset is a result of the mismatching of these
resistors. These devices use a proprietary dynamic offset cancel-
lation technique, with an internal high-frequency clock to reduce
the residual offset voltage of the Hall element that is normally
caused by device overmolding, temperature de pen den cies, and
thermal stress. The chopper-stabilizing technique cancels the
mismatching of the resistor circuit by changing the direction of
the current flowing through the Hall plate using CMOS switches
and Hall voltage measurement taps, while maintaing the Hall-
voltage signal that is induced by the external magnetic flux. The
signal is then captured by a sample-and-hold circuit and further
processed using low-offset bipolar circuitry. This technique
produces devices that have an extremely stable quiescent Hall
output voltage, are immune to thermal stress, and have precise
recoverability after temperature cycling. A relatively high sam-
pling frequency is used for faster signal processing capability
can be processed.
More detailed descriptions of the circuit operation can be found
in: Technical Paper STP 97-10, Monolithic Magnetic Hall
Sensing Using Dynamic Quadrature Offset Cancellation and
Technical Paper STP 99-1, Chopper-Stabilized Amplifiers With A
Track-and-Hold Signal Demodulator.
+V
HALL
VOLTAGE
B
+
—
Dwg. AH-011-2
Dwg. EH-012-1
SAMPLE
& HOLD
X
+V
Micropower, Ultrasensitive
Hall-Ef fect Switches
A3211 and
A3212
8
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Operation. The output of the A3212 switches low (turns on)
when a magnetic field perpendicular to the Hall element exceeds
the operate point BOPS (or is less than BOPN). After turn-on, the
output is capable of sinking up to 1 mA and the output voltage
is VOUT(ON). When the magnetic field is reduced below the
release point BRPS (or increased above BRPN), the device output
switches high (turns off). The dif fer ence in the magnetic operate
and release points is the hysteresis (Bhys) of the device. This
built-in hysteresis allows clean switching of the output even
in the presence of external mechanical vibration and electrical
noise. The A3211 functions in the same manner, except the out-
put voltage is reversed from the A3212, as shown in the figures
to the right.
As used here, negative flux densities are defined as less than
zero (algebraic convention), i.e., -50 G is less than +10 G.
Applications. Allegro's pole-independent processing tech-
nique allows for operation with either a north pole or south
pole magnet orientation, enhancing the manufacturability of the
device. The state-of-the-art technology provides the same output
polarity for either pole face.
It is strongly recommended that an external bypass ca pac i tor
be con nect ed (in close proximity to the Hall element) between
the supply and ground of the device to reduce both external
noise and noise generated by the chopper-sta bi li za tion tech nique.
This is especially true due to the relatively high im ped ance of
battery supplies.
The sim plest form of magnet that will op er ate these devices
is a bar magnet with either pole near the branded surface of the
device. Many oth er meth ods of operation are possible. Ex ten-
sive applications information for Hall-effect devices is available
in:
• Hall-Effect IC Applications Guide, Application Note 27701;
• Hall-Effect Devices: Soldering, Gluing, Potting, En cap su lat-
ing, and Lead Forming, Application Note 27703.1;
• Soldering of Through-Hole Hall-Sensing Dervices, Application
Note 27703; and
• Soldering of Surface-Mount Hall-Sensing Devices, Application
Note 27703.2.
All are provided at
www.allegromicro.com
FUNCTIONAL DESCRIPTION (cont'd)
0+B
0-B
OUTPUT ON
OUTPUT ON
5 V
MAX BOPS
BRPS
BOPN
BRPN
OUTPUT VOLTAGE
MAGNETIC FLUX
A3212
OUTPUT OFF
0+B
0-B
5 V
MAX
OUTPUT VOLTAGE
MAGNETIC FLUX
OUTPUT OFF
OUTPUT OFF
BRPS
OPS
BOPN
RPN
OUTPUT ON
B
A3211
B
OUTPUT
Dwg. E H-013-2
0.1 ∝F
SUPPLY
(3 V BATTERY)
50 k
X
V
DD
12
3
Micropower, Ultrasensitive
Hall-Ef fect Switches
A3211 and
A3212
9
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Package EH, 6-Contact DFN
C0.08
7X C
SEATING
PLANE
6
21
A
ATerminal #1 mark area
BExposed thermal pad (reference only, terminal #1
identifier appearance at supplier discretion)
For Reference Only, not for tooling use (reference DWG-2861;
reference JEDEC MO-229WCED, Type 1)
Dimensions in millimeters
Exact case and lead configuration at supplier discretion within limits shown
CReference land pattern layout;
All pads a minimum of 0.20 mm from all adjacent pads; adjust as
necessary to meet application process requirements and PCB layout
tolerances; when mounting on a multilayer PCB, thermal vias at the
exposed thermal pad land can improve thermal dissipation (reference
EIA/JEDEC Standard JESD51-5)
Hall Element (not to scale); U.S. customary dimensions controlling
Branding scale and appearance at supplier discretion
E
E
E
1
6
B
2
F
E
FActive Area Depth, 0.32 mm NOM
1.00
3.70 1.25
0.50
0.95
0.30
1
6
G
G
PCB Layout Reference View
C
2.00 ±0.15
0.88
1.57
3.00 ±0.15
0.75 ±0.05
1.224 ±0.050
1.042 +0.100
–0.150
0.25 ±0.05
0.5 BSC
0.55 ±0.10
D
DCoplanarity includes exposed thermal pad and terminals
Standard Branding Reference View
Y = Last two digits of year of manufacture
W = Week of manufacture
L = Lot number
N = Last two digits of device part number
YWW
LLL
NN
1
Micropower, Ultrasensitive
Hall-Ef fect Switches
A3211 and
A3212
10
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Package EL, 3-Contact DFN
1
3
C0.08
3X SEATING
PLANE C
2
3
1
2
2.00 ±0.15
2.00 ±0.15
0.30
0.30
0.325
0.138
2.40
0.65
0.50
0.925
0.50 ±0.05
0.40 ±0.05
1.00 BSC
0.25+0.07
–0.05
+0.050
–0.150
+0.10
–0.15
1.25
0.925
0.138
0.325
1
3
A
ATerminal #1 mark area
BExposed thermal pad (reference only, terminal #1
identifier appearance at supplier discretion)
For Reference Only, not for tooling use (reference DWG-2865;
reference JEDEC MO-229UCCD)
Dimensions in millimeters
Exact case and lead configuration at supplier discretion within limits shown
CReference land pattern layout (reference IPC7351);
All pads a minimum of 0.20 mm from all adjacent pads; adjust as
necessary to meet application process requirements and PCB layout
tolerances; when mounting on a multilayer PCB, thermal vias at the
exposed thermal pad land can improve thermal dissipation (reference
EIA/JEDEC Standard JESD51-5)
1.250
1.03
0.74
Hall Element (not to scale)
B
D
DCoplanarity includes exposed thermal pad and terminals
PCB Layout Reference View
C
Branding scale and appearance at supplier discretion
E
EE
E
F
F
G
G
Active Area Depth, 0.18 mm NOM
Standard Branding Reference View
Y = Last two digits of year of manufacture
W = Week of manufacture
N = Last two digits of device part number
YWW
NN
1
Micropower, Ultrasensitive
Hall-Ef fect Switches
A3211 and
A3212
11
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
0.55 REF
Gauge Plane
Seating Plane
0.25 BSC
0.95 BSC
0.95
1.00
0.70 2.40
2
1
AActive Area Depth, 0.28 mm REF
B
C
B
Reference land pattern layout
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances
Branding scale and appearance at supplier discretion
A
PCB Layout Reference View
Branded Face
CStandard Branding Reference View
N = Last two digits of device part number
T = Temperature code (letter)
1
NNT
N = Last three digits of device part number
1
NNN
2.90 +0.10
–0.20
4°±4°
8X 10° REF
0.180+0.020
–0.053
0.05 +0.10
–0.05
0.25 MIN
1.91 +0.19
–0.06
2.98 +0.12
–0.08
1.00 ±0.13
0.40 ±0.10
For Reference Only; not for tooling use (reference dwg. 802840)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
DHall element, not to scale
D
D
D
1.47
0.84
3
Package LH, 3-Pin; (SOT-23W)
Micropower, Ultrasensitive
Hall-Ef fect Switches
A3211 and
A3212
12
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Package UA, 3-Pin SIP
231
1.27 NOM
1.02
MAX
45°
45°
C
1.52 ±0.05
B
Gate and tie bar burr area
A
B
C
Dambar removal protrusion (6X)
A
D
E
E
E
1.32
1.98
E
Active Area Depth, 0.50 mm REF
Branding scale and appearance at supplier discretion
Hall element (not to scale)
For Reference Only; not for tooling use (reference DWG-9065)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
Mold Ejector
Pin Indent
DStandard Branding Reference View
= Supplier emblem
N = Last two digits of device part number
T = Temperature code
NNT
1
0.41 +0.03
–0.06
0.43 +0.05
–0.07
14.99 ±0.25
4.09 +0.08
–0.05
3.02 +0.08
–0.05
0.79 REF
10°
Branded
Face
Micropower, Ultrasensitive
Hall-Ef fect Switches
A3211 and
A3212
13
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Revision History
Revision Revision Date Description of Revision
Rev. 16 May 29, 2012 Update UA package drawing
Copyright ©2002-2012, Allegro MicroSystems, Inc.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per-
mit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, Allegro MicroSystems, Inc. assumes no re spon si bil i ty for its use;
nor for any in fringe ment of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
www.allegromicro.com