© 1988 Burr-Brown Corporation PDS-851D Printed in U.S.A. October, 1993
FEATURES
●COMPLETELY FLOATING:
No Power Supply or Ground Connections
●HIGH ACCURACY: 100µA ±0.5%
●LOW TEMPERATURE COEFFICIENT:
±25ppm/°C
●WIDE VOLTAGE COMPLIANCE:
2.5V to 40V
●ALSO INCLUDES CURRENT MIRROR
APPLICATIONS
●SENSOR EXCITATION
●BIASING CIRCUITRY
●OFFSETTING CURRENT LOOPS
●LOW VOLTAGE REFERENCES
●CHARGE-PUMP CIRCUITRY
●HYBRID MICROCIRCUITS
REF200
DUAL CURRENT SOURCE/CURRENT SINK
DESCRIPTION
The REF200 combines three circuit building-blocks
on a single monolithic chip—two 100µA current
sources and a current mirror. The sections are
dielectrically isolated, making them completely
independent. Also, since the current sources are two-
terminal devices, they can be used equally well as
current sinks. The performance of each section is
individually measured and laser-trimmed to achieve
high accuracy at low cost.
The sections can be pin-strapped for currents of 50µA,
100µA, 200µA, 300µA or 400µA. External circuitry
can be used to obtain virtually any current. These and
many other circuit techniques are shown in the
Applications section of this Data Sheet.
The REF200 is available in plastic 8-pin mini-DIP
and SOIC packages.
I
High I
High Substrate Mirror
In
I
Low I
Low Mirror
Out
Mirror
Common
12
12
8765
1234
100µA 100µA
®
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
REF200
REF200
SBVS020
®
REF200 2
SPECIFICATIONS
At TA = +25°C, VS = 15V, unless otherwise noted.
REF200AP, AU
PARAMETER CONDITION MIN TYP MAX UNITS
CURRENT SOURCES
Current Accuracy ±0.25 ±1%
Current Match ±0.25 ±1%
Temperature Drift Specified Temp Range 25 ppm/°C
Output Impedance 2.5V to 40V 20 100 MΩ
3.5V to 30V 200 500 MΩ
Noise BW = 0.1Hz to 10Hz 1 nAp-p
f = 10kHz 20 pA/√Hz
Voltage Compliance (1%) TMIN to TMAX See Curves
Capacitance 10 pF
CURRENT MIRROR I = 100µA Unless
Otherwise Noted
Gain 0.995 1 1.005
Temperature Drift 25 ppm/°C
Impedance (output) 2V to 40V 40 100 MΩ
Nonlinearity I = 0µA to 250µA 0.05 %
Input Voltage 1.4 V
Output Compliance Voltage See Curves
Frequency Response (–3dB) Transfer 5 MHz
TEMPERATURE RANGE
Specification –25 +85 °C
Operating –40 +85 °C
Storage –40 +125 °C
ELECTRICAL
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS
Applied Voltage .....................................................................–6V to +40V
Reverse Current ........................................................................... –350µA
Voltage Between Any Two Sections................................................. ±80V
Operating Temperature ................................................... –40°C to +85°C
Storage Temperature .....................................................–40°C to +125°C
Lead Temperature (soldering, 10s) .............................................. +300°C
(SOIC 3s)........................................................+260°C
I
I
Substrate
Mirror Input
Low
Low
Mirror Common
Mirror Output
1
2
3
4
8
7
6
5
1
2
High
High
1
2
I
I
Top View DIP/SOIC
PACKAGE
DRAWING TEMPERATURE
PRODUCT PACKAGE NUMBER(1) RANGE
REF200AP 8-Pin Plastic DIP 006 –25°C to +85°C
REF200AU 8-Pin SOIC 182 –25°C to +85°C
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book. (2) Grade designation “A”
may not be marked. Absence of grade designation indicates A grade.
PACKAGE/ORDERING INFORMATION
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
®
REF200
3
TYPICAL PERFORMANCE CURVES
At TA = +25°C, VS = +15V, unless otherwise noted.
100.1
100
99.9
99.8
99.7
99.6
99.5 –25–50 25 7550 1251000
Temperature (°C)
Current (µA)
85°C
Drift specified by
“box method”
(See text)
CURRENT SOURCE
TYPICAL DRIFT vs TEMPERATURE
600
500
400
300
200
100
05010
Temperature Drift (ppm/°C)
Quantity (Units)
Distribution of three
production lots —
1284 Current Sources.
2015 25 3530 40 5045 55 6560
25
117
30 15 6011
501 454
86 66
CURRENT SOURCE
TEMPERATURE DRIFT DISTRIBUTION
101
100.8
100.6
100.4
100.2
100
99.8
99.6
99.4
99.2
Current (µA)
99 0 5 10 15 20 25 30 35 40
Voltage (V)
CURRENT SOURCE
OUTPUT CURRENT vs VOLTAGE CURRENT SOURCE
OUTPUT CURRENT vs VOLTAGE
0
100.5
100.4
100.3
100.2
100.1
100
99.9
99.8
99.7
99.6
99.5
Voltage (V)
12345
Current (µA)
–55°C
25°C
125°C
1000
900
800
700
600
500
400
300
200
100
Reverse Current (µA)
00–2–4–6–8
–10 –12
Reverse Voltage (V)
CURRENT SOURCE
REVERSE CURRENT vs REVERSE VOLTAGE
Reverse Voltage
Circuit Model
12kΩ7V
5kΩ
Safe Reverse Current
Safe Reverse Voltage
Output Current (500pA/div)
CURRENT SOURCE
CURRENT NOISE (0.1Hz to 10Hz)
Time
(
500ms/div
)
®
REF200 4
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, VS = +15V, unless otherwise noted.
MIRROR TRANSFER NONLINEARITY
0
0.1
0.08
0.06
0.04
0.02
0
–0.02
–0.04
–0.06
–0.08
–0.01
Current (µA)
50 100 150 200 250
Nonlinearity (% of 250µA)
Data from Three
Representative Units
(Least-square fit)
5
4
3
2
1
0
–1
–2
–3
–4
Error (%)
–5
10µA 100µA 1mA
Mirror Current (A)
MIRROR GAIN ERROR vs CURRENT
V =
1.25V
V = 1V
V = 1.5V
O
O
O
Input Voltage (V)
01µA 10µA 100µA 1mA 10mA
Current
MIRROR INPUT VOTAGE/OUTPUT
COMPLIANCE VOLTAGE vs CURRENT
4
3
2
1
Input Voltage
Output
Compliance
Voltage
®
REF200
5
FIGURE 1. Simplified Circuit Diagram.
(Substrate)
Current
Source
(1 of 2)
4kΩ
8X
8,7
5kΩ
1kΩ
1,2
6
3
54
1kΩ
12kΩ
Current
Mirror
APPLICATIONS INFORMATION
The three circuit sections of the REF200 are electrically
isolated from one another using a dielectrically isolated
fabrication process. A substrate connection is provided (pin
6), which is isolated from all circuitry. This pin should be
connected to a defined circuit potential to assure rated DC
performance. The preferred connection is to the most nega-
tive constant potential in your system. In most analog
systems this would be –VS. For best AC performance, leave
pin 6 open and leave unused sections unconnected.
Drift performance is specified by the “box method,” as
illustrated in the Current vs Temperature plot of the typical
performance curves. The upper and lower current extremes
measured over temperature define the top and bottom of the
box. The sides are determined by the specified temperature
range of the device. The drift of the unit is the slope of the
diagonal—typically 25ppm/°C from –25°C to +85°C.
If the current sources are subjected to reverse voltage, a
protection diode may be required. A reverse voltage circuit
model of the REF200 is shown in the Reverse Current vs
Reverse Voltage curve. If reverse voltage is limited to less
than 6V or reverse current is limited to less than 350µA, no
protection circuitry is required. A parallel diode (Figure 2a)
will protect the device by limiting the reverse voltage across
the current source to approximately 0.7V. In some applica-
tions, a series diode may be preferable (Figure 2b) because
it allows no reverse current. This will, however, reduce the
compliance voltage range by one diode drop.
Applications for the REF200 are limitless. Application Bul-
letin AB-165 shows additional REF200 circuits as well as
other related current source techniques. A collection of
circuits is shown to illustrate some techniques. Also, see
AB-165A.
FIGURE 2. Reverse Voltage Protection.
100µA
Bidirectional
Current Source
D
4
D
2
DD
31
D
2
D
1
100µA
100µA
NOTE: All diodes = 1N4148.
Bidirectional
Current Source
(a) (b) (c) (d)
®
REF200 6
FIGURE 3. 50µA Current Source.
FIGURE 4. 200µA, 300µA, and 400µA Floating Current Sources.
FIGURE 5. 50µA Current Sinks.
300µA
100µA
45
3
In Out
Com
Mirror
100µA
Compliance = 4V
(b)
400µA
100µA
45
3
In Out
Com
Mirror
100µA
Compliance = 4V
(c)
(a)
200µA
100µA 100µA
(
b
)
50µA
100µA
45
3
In Out
Com
Mirror
–V
S
100kΩ
50µA
100µA
45
3
In Out
Com
Mirror
(
c
)
Compliance to
–V + 5.1V
S
+V
S
–V
S
5.1V
1N4689
27kΩ
0.01µF
100µA
45
3
In Out
Com
Mirror
(
a
)
–V
S
Compliance to
–V + 5V
S
+V
S
100µA
50µA
Compliance to
Ground
–V
S
+V
S
100µA
I
OUT
100µA
50µA
45
3
In Out
Com
Mirror
®
REF200
7
100µA/200µA
45
3
In Out
Com
Mirror
S
Compliance to –V + 1.5V
+V
S
100µA100µA
S
–V
FIGURE 6. Improved Low-Voltage Compliance. FIGURE 7. 100µA Current Source—80V Compliance.
100µA
100µA
± ±
40kΩ
40kΩ0.01µF
0.01µF
1N41481N4148
1N41481N4148
(e) Bidirectional 200µA
cascoded current source.
100µA
100µA
40kΩ
40kΩ 0.01µF
0.01µF
(d) Floating 200µA cascoded
current source.
100µA
L
o
a
d
–V
S
+V
S
(a) Compliance approximate
to Gnd. HV compliance
limited by FET breakdown.
100µA
L
o
a
d
+V
S
(b) Compliance to +V – 5V.
High
Low
100µA
–V
S
33kΩ
0.01µF
S
100µA
L
o
a
d
+V
S
(c)
–V
S
27kΩ
5.1V
1N4689
NOTES: (1) FET cascoded current sources offer improved output impedance and high frequency operation. Circuit in (b)
also provides improved PSRR.
(
2
)
For current sinks
(
Circuits
(
a
)
and
(
b
)
onl
y)
, invert circuits and use “N” channel JFETS.
FIGURE 8. FET Cascode Circuits.
101
100
99 0 1020304050607080
Applied Voltage (V)
Provides 2X Higher Compliance Voltage
SERIES-CONNECTED CURRENT SOURCES
CURRENT vs APPLIED VOLTAGE
Current (µA)
100µA
100µA
High
Low
®
REF200 8
FIGURE 9. Op Amp Offset Adjustment Circuits.
To
Other
Amps
Op Amp
V
R
+V
NOTE: (1) For N Op Amps, use Potentiometer Resistance = N • 100Ω.
100µA
51Ω
51Ω
S
IN
B
OUT
RA
V
–VS
Using Standard Potentiometer
V = V (–R /R )
Offset Adjustment Range = ±5mV
OUT IN B A
To
Other
Amps
Op Amp
V
R
+V
100µA
S
IN
B
OUT
RA
V
–VS
Using Bourns Op Amp Trimpot
V = –V (R /R )
Offset Adjustment Range = ±5mV
OUT IN B A
(1)
100Ω
Bourns Trimpot
®
(1)
2kΩ Linear
®
100µA 100µA
®
REF200
9
R
100µA
Reference
–V
100µA
S
R
2
0.01µF
R
(N • R )
2
1
I = N • 100µA
OUT
(1)
R
(N • R )
2
1
I = N • 100µA
OUT
(1)
100µA
0.01µF
R
2
+V
S
+V
100µA
S
OPA602
0.01µF NR
I = (N +1) 100µA
O
R
0.01µF NR
I = (N +1) 100µA
O
R
100µA
OPA602
0.01µF NR
I = (N +1) 100µA
O
10pF
(a) (b)
(d)(c)
(e)
–V
S
OPA602
RNRI
OUT
1kΩ4kΩ500µA
1kΩ 9kΩ1mA
100kΩ9.9kΩ10mA
EXAMPLES
FEATURES:
(1) Zero volts shunt compliance.
(2) Adjustable only to values above
reference value.
NOTE:
Current source/sink swing to the
“Load Return” rail is limited only
by the op amp's input common
mode range and output swing
capability. Voltage drop across “R”
can be tailored for any amplifier to
allow swing to zero volts from rail.
NOTE: (1) Burr Brown® OPA602 or OPA128
EXAMPLES
R1R2IOUT
100Ω10MΩ1nA
10kΩ 1MΩ1µA
10kΩ1kΩ1mA
Use OPA128
IO = 100µA (N + 1). Compliance ≈ 3.5V
with 0.1V across R. Max IO limited by FET.
For IO = 1A, R = 0.1Ω, NR = 1kΩ.
FIGURE 10. Adjustable Current Sources.
®
REF200 10
FIGURE 12. Precision Triangle Waveform Generator.
FIGURE 11. RTD Excitation With Three Wire Lead Resistance Compensation.
1N41481N4148
1N41481N4148
Bidirectional
Current Source
1/2
REF200
OPA602
R
C
Triangle Output
Square Output
2Vp-p
2Vp-p
10kΩ
Frequency = 1/4RC (Hz)
Frequency = 25/C (Hz)
(C is in µF and R = 10kΩ)
7
V = Gain • 200µA • ∆ RTD
OUT
AB
O
C
I
–V
S
+V
S
RTD Cable Shield
200µA
Reference
Current
200µA
Compensation
Current
REF200
1
R
OFFSET
INA110
Instrumentation Amplifier
234
865
®
REF200
11
FIGURE 13. Precision Duty-Cycle Modulator.
–15V
100µA
0.1µF
Siliconix
J109
50kΩ
I
OUT
For current source,
invert circuitry and
use P-Channel FET.
–15V
100µA
0.1µF
Siliconix
J109
50kΩ
I
OUT
For current source,
invert circuitry and
use P-Channel FET.
50kΩ
0.1µF
100µA
FIGURE 14. Low Noise Current Sink. FIGURE 15. Low Noise Current Sink with Compliance
Below Ground.
100kΩ
1/4
OPA404
60kΩ
100µA + Bridge
(See Figure 12)
V = +10V: 100% Duty CycleV = +10V: 100% Duty Cycle
V = 0V: 50% Duty Cycle
V = –10V: 0% Duty Cycle
IN
IN
IN
12Vp-p
Duty Cycle Out
C
V
IN
–10V ≤ V ≤ +10V
IN
100µA + Bridge
(See Figure 12)
1/4
OPA404
1/4
OPA404
®
REF200 12
FIGURE 17. Rate Limiter.
FIGURE 16. Floating 300µA and 400µA Cascoded Current Sources.
FIGURE 18. 25mA Floating Current Source.
27kΩ
In Out
Mirror
Com
20kΩ0.01µF
0.01µF
100µA
100µA
High
300µA
2N5116
2N4340
5 4
3
300µA
Low
(a) Regulation (15V to 30V = 0.00003%/V (10G(a) Regulation (15V to 30V = 0.00003%/V (10GΩ)
In Out
Mirror
Com
20kΩ0.01µF
100µA
High
400µA
2N5116
2N4340
5 4
3
400µA
Low
(a) Regulation (15V to 30V = 0.000025%/V (10G(a) Regulation (15V to 30V = 0.000025%/V (10GΩ)
100µA
100Ω
100Ω
100Ω
100Ω
40.2Ω10kΩ
Low
–V
100µA
High
25mA
Compliance
4V to 30V
NOTE: Each amplifier 1/4 LM324.
Op amp power supplies are derived
within the circuitry, and this quiescent
current is included in the 25mA.
S
+V
S
10kΩ
10kΩ
OPA602
C
100µA
–V
S
+V
S
V = –V
I
100µA
V
I
V Rate Limit = 100µA/C
O
Diodes: 1N4148
or PWS740-3
Diode Bridge for
reduced V .
OS
O
®
REF200
13
–10 –5 +5 +10
–10
–5
+5
+10
OPA602
100µA
1N4148
1N4148
R
(50kΩ)
V
I
R
(50kΩ)
+15V
10pF
V
O
OPA602 1N4148
1N4148
R
(50kΩ)
V
I
R
(50kΩ)
10pF
V
O
100µA
–15V
–10 –5 +5 +10
–10
–5
+5
+10
For V > –5V: V = 0
For V < –5V: V = –V – 5V
(Dead to 100µA • R)
O
O
I
I I
For V < 5V: V = 0
For V > 5V: V = 5V – V
(Dead to –100µA • R)
O
O
I
I I
O
V
O
V
V
I
V
I
FIGURE 19. Dead-Band Circuit.
OPA602
100µA
1N4148
1N4148
R
(50kΩ) R
(50kΩ)
+15V
10pF
OPA602 1N4148
1N4148
R
(50kΩ)
V
I
R
(50kΩ)
10pF
100µA
–15V
–10 –5 +5 +10
–10
–5
+5
+10
For V > 5V: V = V – 5V
For V < –5V: V = V + 5V
(Dead to ±100µA • R)
O
O
I
I I
O
V
V
I
I
OPA602 V
O
10kΩ
10kΩ
10kΩ
FIGURE 20. Double Dead-Band Circuit.
®
REF200 14
FIGURE 22. Voltage Reference.FIGURE 21. Low-Voltage Reference.
FIGURE 23. Bipolar Limiting Circuit.
FIGURE 24. Limiting Circuit.
100µA
1Ω
+V
V = 100µV
S
O
100µA
10kΩ
+V
V = 1V
S
O
OPA602
0.01µF
100µA
with bridge
(See Figure 2)
OPA121
100µF V
O
OPA121
V
I
R
(50kΩ)
1kΩ
V = V (–5V < V < 5V)
V = 5V (V > 5V)
V = –5V (V < –5V)
(Bound = 100µA • R)
O
O
O
I I
I
I
–10 –5 +5 +10
–10
–5
+5
+10
O
V
V
I
+7.5V (R = 75kΩ)
+5V (R = 50kΩ)
+2.5V (R = 25kΩ)
–2.5V (R = 25kΩ)
+5V (R = 50kΩ)
+7.5V (R = 75kΩ)
R
(50kΩ)
OPA121
100µF
V
O
OPA121
V
I
100µA
1kΩ
1N4148
V = V (V < 5V)
V = 5V (V > 5V)
(V = 100µA • R)
O
O
I I
I
LIMIT
–10 –5 +5 +10
–10
–5
+5
+10
O
V
V
I
+7.5V (R = 75kΩ)
+5V (R = 50kΩ)
+2.5V (R = 25kΩ)
®
REF200
15
V
V
CENTER
O
I
W
–V , +V = 100µA • R
W
W
–V
W
+V
V
5V The
Window
0
1kΩ
–V
S
V
O
CENTER
V
V
I
100µA
100µA
0.01µF
R
(3)
(2)
(1)
0.01µF
(1)
R
(3)
+5V
1/2
LM393
1/2
LM393
NOTES: (1) Capacitors optional to reduce noise and switching time.
(2) Programs center of threshold voltage. (3) Programs window voltage.
+V
S
(2)
FIGURE 25. Window Comparator.
FIGURE 26. Instrumentation Amplifier with Compliance to –VS.
100µA
V = +In – (–In)
O
100µA
–V
S
INA105
+V
S
–In
PMI
MAT03
+In
1/2
OPA1013 1/2
OPA1013
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
REF200AP OBSOLETE PDIP P 8 TBD Call TI Call TI
REF200AU ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
REF200AU/2K5 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
REF200AU/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
REF200AUE4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
REF200AUG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 16-Feb-2009
Addendum-Page 1
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm) W
(mm) Pin1
Quadrant
REF200AU/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 11-Mar-2008
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
REF200AU/2K5 SOIC D 8 2500 346.0 346.0 29.0
PACKAGE MATERIALS INFORMATION
www.ti.com 11-Mar-2008
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,and other changes to its products and services at any time and to discontinue any product or service without notice. Customers shouldobtain the latest relevant information before placing orders and should verify that such information is current and complete. All products aresold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standardwarranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except wheremandated by government requirements, testing of all parameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products andapplications using TI components. To minimize the risks associated with customer products and applications, customers should provideadequate design and operating safeguards.TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Informationpublished by TI regarding third-party products or services does not constitute a license from TI to use such products or services or awarranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectualproperty of the third party, or a license from TI under the patents or other intellectual property of TI.Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompaniedby all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptivebusiness practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additionalrestrictions.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids allexpress and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is notresponsible or liable for any such statements.TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonablybe expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governingsuch use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, andacknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their productsand any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may beprovided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products insuch safety-critical applications.TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products arespecifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet militaryspecifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely atthe Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products aredesignated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designatedproducts in automotive applications, TI will not be responsible for any failure to meet such requirements.Following are URLs where you can obtain information on other Texas Instruments products and application solutions:Products ApplicationsAmplifiers amplifier.ti.com Audio www.ti.com/audioData Converters dataconverter.ti.com Automotive www.ti.com/automotiveDLP® Products www.dlp.com Broadband www.ti.com/broadbandDSP dsp.ti.com Digital Control www.ti.com/digitalcontrolClocks and Timers www.ti.com/clocks Medical www.ti.com/medicalInterface interface.ti.com Military www.ti.com/militaryLogic logic.ti.com Optical Networking www.ti.com/opticalnetworkPower Mgmt power.ti.com Security www.ti.com/securityMicrocontrollers microcontroller.ti.com Telephony www.ti.com/telephonyRFID www.ti-rfid.com Video & Imaging www.ti.com/videoRF/IF and ZigBee® Solutions www.ti.com/lprf Wireless www.ti.com/wireless
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265Copyright © 2009, Texas Instruments Incorporated
