1
LT1180A/LT1181A
11801afb
DESCRIPTIO
U
FEATURES
APPLICATIO S
U
TYPICAL APPLICATIO
U
Low Power 5V RS232
Dual Driver/Receiver with
0.1µF Capacitors
R
Output Waveforms
LT1180A • TA02
DRIVER
OUTPUT
R
L
= 3k
C
L
= 2500pF
RECEIVER
OUTPUT
C
L
= 50pF
INPUT
5k
5k
0.1µF
LOGIC
INPUTS
LOGIC
OUTPUTS
ON/OFF 18
10
13
11
12
6
5
4
2
16
9
14
8
15
7
3
17 5V INPUT
V
+
OUT
V
–
OUT
RS232 OUTPUT
RS232 OUTPUT
RS232 INPUT
RS232 INPUT
LT1180A • TA01
LT1180A
+
0.1µF
+
0.1µF
+
0.1µF
+
■
ESD Protection over ±10kV
■
Uses Small Capacitors: 0.1µF
■
120kBaud Operation for R
L
= 3k, C
L
= 2500pF
■
250kBaud Operation for R
L
= 3k, C
L
= 1000pF
■
Outputs Withstand ±30V Without Damage
■
CMOS Comparable Low Power: 40mW
■
Operates from a Single 5V Supply
■
Rugged Bipolar Design
■
Outputs Assume a High Impedance State When Off
or Powered Down
■
Meets All RS232 Specifications
■
Available With or Without Shutdown
■
Absolutely No Latch-up
■
Available in SO Package
■
Portable Computers
■
Battery-Powered Systems
■
Power Supply Generator
■
Terminals
■
Modems
, LTC and LT are registered trademarks of Linear Technology Corporation.
TransZorb is a registered trademark of General Instruments, GSI
The LT
®
1180A/LT1181A are dual RS232 driver/receiver
pairs with integral charge pump to generate RS232 volt-
age levels from a single 5V supply. These circuits feature
rugged bipolar design to provide operating fault tolerance
and ESD protection unmatched by competing CMOS
designs. Using only 0.1µF external capacitors, these cir-
cuits consume only 40mW of power, and can operate to
120k baud even while driving heavy capacitive loads. New
ESD structures on the chip allow the LT1180A/LT1181A to
survive multiple ±10kV strikes, eliminating the need for
costly TransZorbs
®
on the RS232 line pins. The LT1180A/
LT1181A are fully compliant with EIA RS232 standards.
Driver outputs are protected from overload, and can be
shorted to ground or up to ±30V without damage. During
shutdown or power-off conditions, driver and receiver
outputs are in a high impedance state, allowing line
sharing.
The LT1181A is available in 16-pin DIP and SO packages.
The LT1180A is supplied in 18-pin DIP and SO packages
for applications which require shutdown.
2
LT1180A/LT1181A
11801afb
A
U
G
W
A
W
U
W
ARBSOLUTEXI T
IS
Supply Voltage (V
CC
) ................................................ 6V
V
+
........................................................................ 13.2V
V
–
...................................................................... –13.2V
Input Voltage
Driver ........................................................... V
–
to V
+
Receiver ............................................... – 30V to 30V
ON/OFF ................................................. –0.3V to 12V
Output Voltage
Driver ...................................... V
+
– 30V to V
–
+ 30V
Receiver .................................... – 0.3V to V
CC
+ 0.3V
Short-Circuit Duration
V
+
................................................................... 30 sec
V
–
................................................................... 30 sec
Driver Output.............................................. Indefinite
Receiver Output.......................................... Indefinite
Operating Temperature Range
LT1180AI/LT1181AI .......................... – 40°C to 85°C
LT1180AC/LT1181AC ............................. 0°C to 70°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
WU
U
PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER ORDER PART
NUMBER
ELECTRICAL C CHARA TERISTICS
PARAMETER CONDITIONS MIN TYP MAX UNITS
Power Supply Generator
V
+
Output 7.9 V
V
–
Output –7.0 V
Supply Current (V
CC
) (Note 3), T
A
= 25°C913mA
●16 mA
Supply Current When OFF (V
CC
) Shutdown (Note 4) LT1180A Only ●110 µA
Supply Rise Time C1 = C2 = C3 = C4 = 0.1µF 0.2 ms
Shutdown to Turn-On LT1180A Only 0.2 ms
ON/OFF Pin Thresholds Input Low Level (Device Shutdown) ●0.8 1.2 V
Input High Level (Device Enabled) ●1.6 2.4 V
T
JMAX
= 125°C, θ
JA
= 90°C/W, θ
JC
= 46°C/W (N)
T
JMAX
= 125°C, θ
JA
= 95°C/ W, θ
JC
= 27°C/W (SW)
LT1181ACN
LT1181ACSW
LT1181AIN
LT1181AISW
LT1181AMJ
LT1180ACN
LT1180ACSW
LT1180AIN
LT1180AISW
LT1180AMJ
T
JMAX
= 125°C, θ
JA
= 80°C/W, θ
JC
= 36°C/W (N)
T
JMAX
= 125°C, θ
JA
= 90°C/ W, θ
JC
= 26°C/W (SW)
1
2
3
4
5
6
7
8
9
TOP VIEW
18
17
16
15
14
13
12
11
10
NC
C1
+
V
+
C1
–
C2
+
C2
–
V
–
TR2 OUT
REC2 IN
N PACKAGE
18-LEAD PDIP
ON/OFF
V
CC
GND
TR1 OUT
REC1 IN
REC1 OUT
TR1 IN
TR2 IN
REC2 OUT
SW PACKAGE
18-LEAD PLASTIC SO (WIDE)
1
2
3
4
5
6
7
8
TOP VIEW
16
15
14
13
12
11
10
9
C1
+
V
+
C1
–
C2
+
C2
–
V
–
TR2 OUT
REC2 IN
V
CC
GND
TR1 OUT
REC1 IN
REC1 OUT
TR1 IN
TR2 IN
REC2 OUT
N PACKAGE
16-LEAD PDIP SW PACKAGE
16-LEAD PLASTIC SO (WIDE)
(Note 1)
Consult LTC Marketing for parts specified with wider operating temperature ranges.
J PACKAGE
18-LEAD CERDIP
TJMAX = 150°C, θJA = 100°C/W, θJC = 40°C/W (J)
OBSOLETE PACKAGE
Consider N Package for Alternate Source
The ● denotes specifications which apply over the operating temperature
range (0°C ≤ TA ≤ 70°C for commercial grade, and –40°C ≤ TA ≤ 85°C for industrial grade. (Note 2)
J PACKAGE
16-LEAD CERDIP
TJMAX = 150°C, θJA = 100°C/W, θJC = 40°C/W (J)
OBSOLETE PACKAGE
Consider N Package for Alternate Source
3
LT1180A/LT1181A
11801afb
ELECTRICAL C CHARA TERISTICS
The ● denotes specifications which apply over the operating temperature
range (0°C ≤ TA ≤ 70°C for commercial grade, and –40°C ≤ TA ≤ 85°C for industrial grade. (Note 2)
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: Testing done at V
CC
= 5V and V
ON/OFF
= 3V, unless otherwise
specified.
Note 3: Supply current is measured as the average over several charge
pump cycles. C
+
= C
–
= C1 = C2 = 0.1µF. All outputs are open, with all
driver inputs tied high.
Note 4: Supply current measurements in SHUTDOWN are performed with
V
ON/OFF
≤ 0.1V.
Note 5: For driver delay measurements, R
L
= 3k and C
L
= 51pF. Trigger
points are set between the driver’s input logic threshold and the output
transition to the zero crossing (t
HL
= 1.4V to 0V and t
LH
= 1.4V to 0V).
Note 6: For receiver delay measurements, C
L
= 51pF. Trigger points are
set between the receiver’s input logic threshold and the output transition
to standard TTL/CMOS logic threshold (t
HL
= 1.3V to 2.4V and t
LH
= 1.7V
to 0.8V).
Note 7: Data rate operation guaranteed by slew rate, short-circuit current
and propagation delay tests.
PARAMETER CONDITIONS MIN TYP MAX UNITS
ON/OFF Pin Current 0V ≤ V
ON/OFF
≤ 5V ●–15 80 µA
Oscillator Frequency 130 kHz
Driver
Output Voltage Swing Load = 3k to GND Positive 5.0 7.5 V
Negative ●–6.3 –5.0 V
Logic Input Voltage Level Input Low Level (V
OUT
= High) ●1.4 0.8 V
Input High Level (V
OUT
= Low) ●2.0 1.4 V
Logic Input Current 0.8V ≤ V
IN
≤ 2.0V ●520 µA
Output Short-Circuit Current V
OUT
= 0V ±917 mA
Output Leakage Current Shutdown V
OUT
= ±30V (Note 4) ●10 100 µA
Date Rate (Note 7) R
L
= 3k, C
L
= 2500pF 120 kBaud
R
L
= 3k, C
L
= 1000pF 250 kBaud
Slew Rate R
L
= 3k, C
L
= 51pF 15 30 V/µs
R
L
= 3k, C
L
= 2500pF 47 V/µs
Propagation Delay Output Transition t
HL
High-to-Low (Note 5) 0.6 1.3 µs
Output Transition t
LH
Low-to-High 0.5 1.3 µs
Receiver
Input Voltage Thresholds Input Low Threshold (V
OUT
= High) C Grade ●0.8 1.3 V
Input High Threshold (V
OUT
= Low) C Grade ●1.7 2.4 V
Input LowI, M Grade ●0.2 1.3 V
Input HighI, M Grade ●1.7 3.0 V
Hysteresis ●0.1 0.4 1.0 V
Input Resistance V
IN
= ±10V 3 5 7 kΩ
Output Leakage Current Shutdown (Note 4) 0 ≤ V
OUT
≤ V
CC
●110 µA
Output Voltage Output Low, I
OUT
= –1.6mA ●0.2 0.4 V
Output High, I
OUT
= 160µA (V
CC
= 5V) ●3.5 4.2 V
Output Short-Circuit Current Sinking Current, V
OUT
= V
CC
–20 –10 mA
Sourcing Current, V
OUT
= 0V 10 20 mA
Propagation Delay Output Transition t
HL
High-to-Low (Note 6) 250 600 ns
Output Transition t
LH
Low-to-High 350 600 ns
4
LT1180A/LT1181A
11801afb
CCHARA TERISTICS
UW
ATYPICALPER
FORCE
Receiver Input Thresholds
Supply Current Driver Leakage in Shutdown
TEMPERATURE (°C)
–55
0.50
THRESHOLD VOLTAGE (V)
0.75
1.25
1.50
1.75
3.00
2.25
050 75
LT1180A • TPC04
1.00
2.50
2.75
2.00
–25 25 100 125
INPUT HIGH
INPUT LOW
Supply Current vs Data Rate ON/OFF Thresholds
TEMPERATURE (°C)
–55
THRESHOLD VOLTAGE (V)
2.0
2.5
3.0
25 75
LT1180A • TPC06
1.5
1.0
–25 0 50 100 125
0.5
0
ON THRESHOLD
OFF THRESHOLD
TEMPERATURE (°C)
0.1
LEAKAGE CURRENT (µA)
10
100
LT1180A • TPC08
1
–55 0 50 75
–25 25 100 125
V
OUT
= –30V
V
OUT
= 30V
Driver Short-Circuit Current
DATA RATE (kBAUD)
0
0
SUPPLY CURRENT (mA)
10
20
30
40
50
25 50 75 100
LT1180A • TPC05
125 150
2 DRIVERS ACTIVE
R
L
= 3k
C
L
= 2500pF
TEMPERATURE (°C)
–55
0
SUPPLY CURRENT (mA)
10
25
050 75
LT1180A • TPC07
5
20
15
–25 25 100 125
2 DRIVERS LOADED RL = 3k
1 DRIVER LOADED RL = 3k
NO LOAD
Driver Output Voltage
Driver Maximum Output Voltage
vs Load Capacitance
TEMPERATURE (°C)
–55
–10
DRIVER OUTPUT VOLTAGE (V)
–8
–4
–2
0
10
4
050 75
LT1180A • TPC03
–6
6
8
2
–25 25 100 125
OUTPUT HIGH
OUTPUT LOW
R
L
= 3k
V
CC
= 5V
V
CC
= 4.5V
V
CC
= 5.5V
V
CC
= 4.5V
V
CC
= 5V
V
CC
= 5.5V
LOAD CAPACITANCE (nF)
0
5.0
PEAK OUTPUT VOLTAGE (V)
5.5
6.0
6.5
7.0
7.5
8.0
2468
LT1180A • TPC01
1013579
20kBAUD
60kBAUD
120kBAUD
LOAD CAPACITANCE (nF)
0
–7.0
PEAK OUTPUT VOLTAGE (V)
–6.5
–6.0
–5.5
–5.0
–4.5
–4.0
2468
LT1180A • TPC02
1013579
120kBAUD
60kBAUD
20kBAUD
Driver Minimum Output Voltage
vs Load Capacitance
TEMPERATURE (°C)
–55
SHORT-CIRCUIT CURRENT (mA)
20
25
30
25 75
LT1180A • TPC09
15
10
–25 0 50 100 125
5
0
ISC+
ISC–
5
LT1180A/LT1181A
11801afb
CCHARA TERISTICS
UW
ATYPICALPER
FORCE
LOAD CAPACITANCE (nF)
0
SLEW RATE (V/µs)
12
16
4.0
LT1180A • TPC11
8
4
01.0 2.0 3.0 5.0
10
14
6
2
3.5
0.5 1.5 2.5 4.5
+SLEW
–SLEW
LT1180A • TPC13
LT1180A • TPC12
INPUT
DRIVER OUTPUT
R
L
= 3k
DRIVER OUTPUT
R
L
= 3k
C
L
= 2500pF
DRIVER 1
OUTPUT
ON/OFF PIN
Shutdown to Driver Outputs Driver Output Waveforms
10V
5V
GND
GND
–10V
–5V
DRIVER 2
OUTPUT
Slew Rate vs Load Capacitance
Receiver Short-Circuit Current
PI FU CTIO S
U
UU
V
+
: Positive Supply Output (RS232 Drivers). V
+
≈ 2V
CC
–
1.5V. This pin requires an external charge storage capaci-
tor C ≥ 0.1µF, tied to ground or V
CC
. Larger value capaci-
tors may be used to reduce supply ripple. With multiple
transceivers, the V
+
and V
–
pins may be paralleled into
common capacitors.
V
–
: Negative Supply Output (RS232 Drivers). V
–
≈ –(2V
CC
– 2.5V). This pin requires an external charge storage
capacitor C ≥ 0.1µF. Larger value capacitors may be used
to reduce supply ripple. With multiple transceivers, the V
+
and V
–
pins may be paralleled into common capacitors.
TEMPERATURE (°C)
–55
0
SHORT-CIRCUIT CURRENT (mA)
20
50
050 75
LT1180A • TPC10
10
40
30
–25 25 100 125
RX I
SC–
RX I
SC+
V
CC
: 5V Input Supply Pin. This pin should be decoupled
with a 0.1µF ceramic capacitor close to the package pin.
Insufficient supply bypassing can result in low output
drive levels and erratic charge pump operation.
GND: Ground Pin.
ON/OFF: A TTL/CMOS Compatible Operating Mode Con-
trol. A logic low puts the LT1180A in shutdown mode.
Supply current drops to zero and both driver and receiver
outputs assume a high impedance state. A logic high fully
enables the device.
6
LT1180A/LT1181A
11801afb
PI FU CTIO S
U
UU
TR1 IN, TR2 IN: RS232 Driver Input Pins. These inputs are
TTL/CMOS compatible. Inputs should not be allowed to
float. Tie unused inputs to V
CC
.
TR1 OUT, TR2 OUT: Driver Outputs at RS232 Voltage
Levels. Driver output swing meets RS232 levels for loads
up to 3k. Slew rates are controlled for lightly loaded lines.
Output current capability is sufficient for load conditions
up to 2500pF. Outputs are in a high impedance state when
in shutdown mode, V
CC
= 0V, or when the driver disable
pin is active. Outputs are fully short-circuit protected from
V
–
+ 30V to V
+
– 30V. Applying higher voltages will not
damage the device if the overdrive is moderately current
limited. Short circuits on one output can load the power
supply generator and may disrupt the signal levels of the
other outputs. The driver outputs are protected against
ESD to ±10kV for human body model discharges.
REC1 IN, REC2 IN: Receiver Inputs. These pins accept
RS232 level signals (±30V) into a protected 5k terminating
resistor. The receiver inputs are protected against ESD to
±10kV for human body model discharges. Each receiver
provides 0.4V of hysteresis for noise immunity. Open
receiver inputs assume a logic low state.
REC1 OUT, REC2 OUT: Receiver outputs with TTL/CMOS
Voltage Levels. Outputs are in a high impedance state
when in shutdown mode to allow data line sharing. Outputs
are fully short-circuit protected to ground or V
CC
with the
power on, off or in the shutdown mode.
C1
+
, C1
–
, C2
+
, C2
–
: Commutating Capacitor Inputs.
These pins require two external capacitors C ≥ 0.1µF: one
from C1
+
to C1
–
and another from C2
+
to C2
–
. C1 should
be deleted if a separate 12V supply is available and con-
nected to pin C1
+
. Similarly, C2 should be deleted if a
separate –12V supply is connected to pin V
–
.
ESD Test Circuit
ESD PROTECTIO
U
The RS232 line inputs of the LT1180A/LT1181A have on-
chip protection from ESD transients up to ±10kV. The
protection structures act to divert the static discharge
safely to system ground. In order for the ESD protection to
function effectively, the power supply and ground pins of
the circuit must be connected to ground through low
impedances. The power supply decoupling capacitors and
charge pump storage capacitors provide this low imped-
ance in normal application of the circuit. The only con-
straint is that low ESR capacitors must be used for
bypassing and charge storage. ESD testing must be done
with pins V
CC
, V
L
, V
+
, V
–
, and GND shorted to ground or
connected with low ESR capacitors.
LT1180A • ESD TC
RS232
LINE PINS
PROTECTED
TO ±10kV
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
0.1µF0.1µF
NC
C1
+
V
+
C1
–
C2
+
C2
–
V
–
DR2 OUT
LT1180A
ON/OFF
5V V
CC
GND
DR1 OUT
RX1 IN
RX1 OUT
DR1 IN
DR2 IN
RS232
LINE PINS
PROTECTED
TO ±10kV
RX2 IN RX2 OUT
+
0.1µF
+
0.1µF
0.1µF
+
+
+
7
LT1180A/LT1181A
11801afb
U
A
O
PPLICATITYPICAL
30k
30k
RS232 OUTPUT
RS232 OUTPUT
RS232 INPUT
RS232 INPUT
LT1180A • TA04
LT1039
TTL INPUT
30k
RS232 INPUT
V
CC
TTL INPUT
TTL INPUT
TTL OUTPUT
TTL OUTPUT
TTL OUTPUT
ON/OFF
RS232 OUTPUT
5k
RS232 OUTPUT
RS232 INPUT
LT1180A
TTL INPUT
5k
RS232 INPUT
V
CC
TTL INPUT
TTL OUTPUT
TTL OUTPUT
ON/OFF
RS232 OUTPUT
2
4
5
6
3
7
18 17
GND
16
GND
10
V
+
V
–
1
9
18 17
5V
SHUTDOWN
C2
–
C2
+
C1
–
C1
+
V
+
V
–
11
12
13
10
15
14
9
8
12
14
16
11
13
15
7
5
3
8
6
4
1µF
1µF
1µF1µF
+
+
+
+
Supporting an LT1039 (Triple Driver/Receiver)
8
LT1180A/LT1181A
11801afb
PACKAGE DESCRIPTIO
U
J18 1298
0.015 – 0.060
(0.380 – 1.520)
0.100
(2.54)
BSC
0.014 – 0.026
(0.360 – 0.660)
0.045 – 0.065
(1.143 – 1.651)
0.200
(5.080)
MAX
0.125
(3.175)
MIN
0.008 – 0.018
(0.203 – 0.457) 0° – 15°
12345678
0.220 – 0.310
(5.590 – 7.870)
0.960
(24.384)
MAX
0.005
(0.127)
MIN 16 13
9
10
11
12
1415
17
18
0.025
(0.635)
RAD TYP
0.300 BSC
(0.762 BSC)
0.045 – 0.068
(1.143 – 1.727)
FULL LEAD
OPTION
0.023 – 0.045
(0.584 – 1.143)
HALF LEAD
OPTION
CORNER LEADS OPTION
(4 PLCS)
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS
J16 1298
0.015 – 0.060
(0.380 – 1.520)
0.100
(2.54)
BSC
0.014 – 0.026
(0.360 – 0.660)
0.045 – 0.065
(1.143 – 1.651)
0.200
(5.080)
MAX
0.125
(3.175)
MIN
0.008 – 0.018
(0.203 – 0.457) 0° – 15°
12345678
0.220 – 0.310
(5.588 – 7.874)
0.840
(21.336)
MAX
0.005
(0.127)
MIN 16 13 9
10
11121415
0.025
(0.635)
RAD TYP
0.300 BSC
(0.762 BSC)
0.045 – 0.068
(1.143 – 1.727)
FULL LEAD
OPTION
0.023 – 0.045
(0.584 – 1.143)
HALF LEAD
OPTION
CORNER LEADS OPTION
(4 PLCS)
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS
J Package
16-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110)
J Package
18-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110)
OBSOLETE PACKAGES
9
LT1180A/LT1181A
11801afb
PACKAGE DESCRIPTIO
U
N16 1098
0.255 ± 0.015*
(6.477 ± 0.381)
0.770*
(19.558)
MAX
16
12345678
910
11
12
13
14
15
0.020
(0.508)
MIN
0.125
(3.175)
MIN
0.130 ± 0.005
(3.302 ± 0.127)
0.065
(1.651)
TYP
0.045 – 0.065
(1.143 – 1.651)
0.018 ± 0.003
(0.457 ± 0.076)
0.100
(2.54)
BSC
0.009 – 0.015
(0.229 – 0.381)
0.300 – 0.325
(7.620 – 8.255)
0.325 +0.035
–0.015
+0.889
–0.381
8.255
()
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
N18 1098
0.020
(0.508)
MIN
0.125
(3.175)
MIN
0.130 ± 0.005
(3.302 ± 0.127)
0.065
(1.651)
TYP
0.045 – 0.065
(1.143 – 1.651)
0.018 ± 0.003
(0.457 ± 0.076)
0.005
(0.127)
MIN
0.100
(2.54)
BSC
0.255 ± 0.015*
(6.477 ± 0.381)
0.900*
(22.860)
MAX
18
123456789
1011
121314
16 1517
0.009 – 0.015
(0.229 – 0.381)
0.300 – 0.325
(7.620 – 8.255)
0.325 +0.035
–0.015
+0.889
–0.381
8.255
()
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
N Package
16-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
N Package
18-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
10
LT1180A/LT1181A
11801afb
PACKAGE DESCRIPTIO
U
S16 (WIDE) 1098
NOTE 1
0.398 – 0.413*
(10.109 – 10.490)
16 15 14 13 12 11 10 9
12345678
0.394 – 0.419
(10.007 – 10.643)
0.037 – 0.045
(0.940 – 1.143)
0.004 – 0.012
(0.102 – 0.305)
0.093 – 0.104
(2.362 – 2.642)
0.050
(1.270)
BSC 0.014 – 0.019
(0.356 – 0.482)
TYP
0° – 8° TYP
NOTE 1
0.009 – 0.013
(0.229 – 0.330) 0.016 – 0.050
(0.406 – 1.270)
0.291 – 0.299**
(7.391 – 7.595)
× 45°
0.010 – 0.029
(0.254 – 0.737)
NOTE:
1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
*
**
SW Package
16-Lead Plastic Small Outline (Wide .300 Inch)
(Reference LTC DWG # 05-08-1620)
11
LT1180A/LT1181A
11801afb
PACKAGE DESCRIPTIO
U
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
S18 (WIDE) 1098
NOTE 1
0.447 – 0.463*
(11.354 – 11.760)
15 14 13 12 11 10
16
9
12345678
0.394 – 0.419
(10.007 – 10.643)
1718
0.037 – 0.045
(0.940 – 1.143)
0.004 – 0.012
(0.102 – 0.305)
0.093 – 0.104
(2.362 – 2.642)
0.050
(1.270)
BSC 0.014 – 0.019
(0.356 – 0.482)
TYP
0° – 8° TYP
NOTE 1
0.009 – 0.013
(0.229 – 0.330) 0.016 – 0.050
(0.406 – 1.270)
0.291 – 0.299**
(7.391 – 7.595)
× 45°
0.010 – 0.029
(0.254 – 0.737)
NOTE:
1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
*
**
SW Package
18-Lead Plastic Small Outline (Wide .300 Inch)
(Reference LTC DWG # 05-08-1620)
12
LT1180A/LT1181A
11801afb
LINEAR TECHNOLOGY CORPORATION 1994
LT/CPI 11/01 REV B 1.5K • PRINTED IN USA
U
A
O
PPLICATITYPICAL
PART NUMBER DESCRIPTION COMMENTS
LT1280A/LT1281A 5V 2-Driver/2-Receiver RS232 Transceivers Pin Compatible with LT1180A/LT1181A, I
CC
= 10mA Max
LT1381 5V 2-Driver/2-Receiver RS232 Transceiver Narrow 16-Pin SO Package
LT1780/LT1781 5V 2-Driver/2-Receiver RS232 Transceivers IEC 1000-4-2 Level 4 Compliance
Operation Using 5V and 12V Power Supplies
RELATED PARTS
5k
5k
LOGIC INPUTS
LOGIC OUTPUTS
ON/OFF 18
10
13
11
12
6
5
4
2
16
9
14
8
15
7
3
17 5V INPUT
–12V
OUT
RS232 OUTPUT
RS232 OUTPUT
RS232 INPUT
RS232 INPUT
LT1180A • TA03
LT1180A
12V INPUT
0.1µF
+
0.1µF
+
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear.com
