
AN015401-1103 Hardware Architecture
6
Application Note
CompactFlash® Interface for eZ80Acclaim!™ MCUs
As described in the Modes of Operation section on page 3, the change from mem-
ory mode to any of the I/O modes is achieved through the software. However,
such a mode change also requires a change in hardware. In the memory mode,
the RD and WR strobes from the host are connected to the OE and WE signals of
the CompactFlash card. In the I/O modes, the host signals are connected to IORD
and IOWR signals of the CompactFlash card.
The switching functionality is achieved through the use of a de-mux (de-multi-
plexer). The chip select (as decided by the A[16:23]) and PB7 pin control the
action of the de-mux. When the chip select is asserted, the PB7 pin is HIGH for
the memory mode, and LOW for other modes of CompactFlash operation.
For all modes other than the memory mode, the de-mux routes RD and WR sig-
nals from the eZ80F91 to IORD and IOWR, respectively. For the memory mode,
the de-mux routes the WR signal directly to the CompactFlash WE signal. The RD
signal, however, is not directly connected to the OE pin because the OE pin also
handles the other functionality, such as determining if the CompactFlash card
resets into the memory mode or the TrueIDE mode at RESET. The RD signal is
therefore routed out of the de-mux and is referred to as MEM_MODE.
The memory mode is the default mode of operation. If the OE signal is not
grounded, this default mode of operation is functional at power ON or RESET.
However, if the OE pin is grounded, the CompactFlash card enters the True IDE
mode on RESET. Thus, the hardware must be able to perform the following oper-
ations.
To RESET the CompactFlash Storage Card at Run-time. To achieve this functional-
ity, the eZ80F91 port pin, PB4, is connected directly to the CompactFlash RESET
pin. By toggling PB4, the CompactFlash card can be RESET at any point of time.
To Control the OE pin at RESET. To achieve this functionality, the eZ80F91 port
pin, PB6, and the MEM_MODE signal issuing out of the de-multiplexer are AND-
ed, using the AND gate (74LVC08AD), to control the OE pin. The AND operation
forces a 0 (LOW) on the OE that is held at 1 (HIGH) when there are no RD trans-
actions on the CompactFlash.
Table 2. Demultiplexer Logic Truth Table
CSx PB7 WR RD Action Remarks
001 0I
ORD = RD
000 1IOWR = WR
011 0MEM_MODE = RD If PB6 = 1, then
OE = MEM_MODE
010 1WE = WR